CDC337 TI | Alldatasheet
Document overview
- Manufacturer or author: Provided By alldatasheet.com(free datasheet download site)
- PDF pages: 10
Technical content
SCAS330B – DECEMBER 1990 – REVISED OCTOBER 1998 1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 /C0068Low Output Skew, Low Pulse Skew for Clock-Distribution and Clock-Generation
Applications
/C0068TTL-Compatible Inputs and CMOS-Compatible Outputs /C0068Distributes One Clock Input to Eight Outputs – Four Same-Frequency Outputs – Four Half-Frequency Outputs /C0068Distributed VCC and Ground Pins Reduce Switching Noise /C0068High-Drive Outputs (–48-mA IOH , 48-mA IOL ) /C0068State-of-the-Art EPIC-ΙΙB BiCMOS Design Significantly Reduces Power Dissipation /C0068Package Options Include Plastic Small-Outline (DW)
description
The CDC337 is a high-performance, low-skew clock driver. It is specifically designed for applications requiring synchronized output signals at both the clock frequency and one-half the clock frequency. The four Y outputs switch in phase and at the same frequency as the clock (CLK) input. The four Q outputs switch at one-half the frequency of CLK. When the output-enable (OE ) input is low and the clear (CLR) input is high, the Y outputs follow CLK and the Q outputs toggle on low-to-high transitions at CLK. Taking CLR low asynchronously resets the Q outputs to the low level. When OE is high, the outputs are in the high-impedance state. The CDC337 is characterized for operation from –40°C to 85°C. FUNCTION TABLE INPUTS OUTPUTS OE CLR CLK Y1–Y4 Q1–Q4 H X X Z Z L LL L L L LH H L L HL L Q 0† L H ↑ H Q 0† † The level of the Q outputs before the indicated steady-state input conditions were established Copyright 1998, Texas Instruments IncorporatedPRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. EPIC-ΙΙB is a trademark of Texas Instruments Incorporated. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. GND VCC OE CLR VCC GND GND V CC CLK GND V CC GND DW PACKAGE (TOP VIEW)
SCAS330B – DECEMBER 1990 – REVISED OCTOBER 1998
2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic symbol† logic diagram (positive logic) EN R CLK † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. T CLR OE T R CLK CLR OE 5 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)‡ Voltage range applied to any output in the high state or power-off state, /C0277Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. The maximum package power dissipation is calculated using a junction temperature of 150°C and a board trace length of 750 mils. For more information, refer to the Package Thermal Considerations application note in the 1994 ABT Advanced BiCMOS Technology Data Book, literature number SCBD002B.
SCAS330B – DECEMBER 1990 – REVISED OCTOBER 1998 3POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 recommended operating conditions (see Note 3) MIN MAX UNIT VCC Supply voltage 4.75 5.25 V VIH High-level input voltage 2 V VIL Low-level input voltage 0.8 V VI Input voltage 0 VCC V IOH High-level output current –48 mA IOL Low-level output current 48 mA fclock Input clock frequency 80 MHz TA Operating free-air temperature –40 85 °C NOTE 3: Unused pins (input or I/O) must be held high or low to prevent them from floating. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP † MAX UNIT VIK VCC = 4.75 V, II = –18 mA –1.2 V VOH VCC = 4.75 V, IOH = – 32 mA 3.75 V VOL VCC = 4.75 V, IOL = 32 mA 0.55 V IIH VCC = 5.25 V, VI = 2.7 V 50 µA IIL VCC = 5.25 V, VI = 0.5 V –50 µA IOZ VCC = 5.25 V, VO = VCC or GND ± 50 µA Outputs high 70 ICC VCC = 5.25 V, V I = VCC or GND, IO = 0 Outputs low 85 mA Outputs disabled 70 C i VI = 2.5 V or 0.5 V 3 pF C o VO = VCC or GND 10 pF † All typical values are at VCC = 5 V, TA = 25°C. timing requirements over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) MIN MAX UNIT fclock Clock frequency 80 MHz CLR low 4 tw Pulse duration CLK low 4 ns CLK high 4 tsu Setup time, CLR inactive before CLK↑ 2 ns Clock duty cycle 40% 60%
SCAS330B – DECEMBER 1990 – REVISED OCTOBER 1998
4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
switching characteristics over recommended ranges of supply voltage and operating free-air temperature, CL = 50 pF (unless otherwise noted) (see Note 4 and Figures 1 and 2) PARAMETER FROM (INPUT) TO (OUTPUT) MIN TYP † MAX UNIT fmax 80 MHz tPLH CLK A n yYo rQ 4 9 ns tPHL CLK Any Y or Q 4 9 ns tPHL CLR Any Q 4 10 ns tPZH OE A n yYo rQ 3 7 ns tPZL OE Any Y or Q 3 7 ns tPHZ OE A n yYo rQ 2 7 ns tPLZ OE Any Y or Q 2 7 ns Y↑ 0.75 tsk(o) CLK ↑ Q ↑ 0.9 ns() Y↑ and Q↑ 0.9 tr 0.9 ns tf 0.7 ns † All typical values are at VCC = 5 V, TA = 25°C. NOTE 4: All specifications are valid only for all outputs switching.
3 VData Input
NOTES: A. C L includes probe and jig capacitance. B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω , tr ≤ 2.5 ns, tf≤ 2.5 ns. C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. D. The outputs are measured one at a time with one transition per measurement. Figure 1. Load Circuit and Voltage Waveforms
6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Figure 2. Waveforms for Calculation of tsk(o)
SCAS330B – DECEMBER 1990 – REVISED OCTOBER 1998 7POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MECHANICAL INFORMATION DW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE
16 PIN SHOWN
0.400 (10,15) 0.419 (10,65) 0.104 (2,65) MAX 0.012 (0,30) 0.004 (0,10) A 0.020 (0,51) 0.014 (0,35) 0.293 (7,45) 0.299 (7,59) 0.010 (0,25) 0.050 (1,27) 0.016 (0,40) (15,24) (15,49) PINS ** 0.010 (0,25) NOM A MAX DIM A MIN Gage Plane 0.500 (12,70) (12,95) 0.510 (10,16) (10,41) 0.400 0.410 0.600 0.610 0.004 (0,10) M0.010 (0,25) 0.050 (1,27) 0°–8° NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15). D. Falls within JEDEC MS-013
www.ti.com 23-May-2025 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) CDC337DW Active Production SOIC (DW) | 20 25 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 CDC337 CDC337DW.B Active Production SOIC (DW) | 20 25 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 CDC337 CDC337DWG4.B Active Production SOIC (DW) | 20 25 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 CDC337 (1) Status: For more details on status, see our product life cycle. (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1
PACKAGE MATERIALS INFORMATION www.ti.com 23-May-2025 TUBE L - Tube length T - Tube height W - Tube width B - Alignment groove width *All dimensions are nominal Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm) CDC337DW DW SOIC 20 25 507 12.83 5080 6.6 CDC337DW.B DW SOIC 20 25 507 12.83 5080 6.6 CDC337DWG4.B DW SOIC 20 25 507 12.83 5080 6.6 Pack Materials-Page 1
IMPORTANT NOTICE AND DISCLAIMER TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATA SHEETS), DESIGN RESOURCES (INCLUDING REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS. These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable standards, and any other safety, security, regulatory or other requirements. These resources are subject to change without notice. TI grants you permission to use these resources only for development of an application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these resources. TI’s products are provided subject to TI’s Terms of Sale or other applicable terms available either on ti.com or provided in conjunction with such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for TI products. TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2025, Texas Instruments Incorporated