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CD54AC05, CD74AC05 HEX INVERTERS WITH OPEN-DRAIN OUTPUTS SCHS306C – JANUARY 2001 –REVISED JUNE 2002 1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 /C0068 AC Types Feature 1.5-V to 5.5-V Operation and Balanced Noise Immunity at 30% of the Supply Voltage /C0068 Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption /C0068 Balanced Propagation Delays /C0068 ±24-mA Output Drive Current – Fanout to 15 F Devices /C0068 SCR-Latchup-Resistant CMOS Process and Circuit Design /C0068 Exceeds 2-kV ESD Protection Per MIL-STD-883, Method 3015
description
The ’AC05 devices contain six independent inverters. These devices perform the Boolean function Y = A. The open-drain outputs require pullup resistors to perform correctly, and can be connected to other open-drain outputs to implement active-low wired-OR or active-high wired-AND functions.
ORDERING INFORMATION
TA PACKAGE † ORDERABLE PART NUMBER TOP-SIDE MARKING PDIP – E Tube CD74AC05E CD74AC05E 55°Ct o1 2 5°C SOIC M Tube CD74AC05M AC05M–55°C to 125°C SOIC – M Tape and reel CD74AC05M96 AC05M CDIP – F Tube CD54AC05F3A CD54AC05F3A † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. FUNCTION TABLE (each inverter) INPUT A OUTPUT Y H L L Z logic diagram, each inverter (positive logic) YA GND V CC CD54AC05 ...F PACKAGE CD74AC05 ...E O R M PACKAGE (TOP VIEW) PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright 2002, Texas Instruments Incorporated Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.
CD54AC05, CD74AC05 HEX INVERTERS WITH OPEN-DRAIN OUTPUTS SCHS306C – JANUARY 2001 –REVISED JUNE 2002
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absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7. recommended operating conditions (see Note 3) TA = 25°C –40°C TO 85°C –55°C TO 125°C UNIT MIN MAX MIN MAX MIN MAX VCC = 1.5 V 1.2 1.2 1.2 VIH High-level input voltage VCC = 3 V 2.1 2.1 2.1 V VCC = 5.5 V 3.85 3.85 3.85 VCC = 1.5 V 0.3 0.3 0.3 VIL Low-level input voltage VCC = 3 V 0.9 0.9 0.9 V VCC = 5.5 V 1.65 1.65 1.65 VI Input voltage 0 VCC 0 VCC 0 VCC V VO Output voltage 0 5.5 0 5.5 0 5.5 V IOH High-level output current VCC = 4.5 V to 5.5 V –24 –24 –24 mA IOL Low-level output current VCC = 4.5 V to 5.5 V 24 24 24 mA ∆t/∆v Input transition rise or fall rate VCC = 1.5 V to 3 V 50 50 50 ns/V∆t/∆v Input transition rise or fall rate VCC = 3.6 V to 5.5 V 20 20 20 ns/V NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
CD54AC05, CD74AC05 HEX INVERTERS WITH OPEN-DRAIN OUTPUTS SCHS306C – JANUARY 2001 –REVISED JUNE 2002 3POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VCC TA = 25°C –40°C TO 85°C –55°C TO 125°C UNITCC MIN MAX MIN MAX MIN MAX 1.5 V 0.1 0.1 0.1 IOL = 50 µA 3 V 0.1 0.1 0.1 4.5 V 0.1 0.1 0.1 VOL VI = VIH or VIL IOL = 12 mA 3 V 0.36 0.44 0.5 V IOL = 24 mA 4.5 V 0.36 0.44 0.5 IOL = 50 mA† 5.5 V 1.65 IOL = 75 mA† 5.5 V 1.65 II VI = VCC or GND 5.5 V ±0.1 ±1 ±1 µA ICC VI = VCC or GND, IO = 0 5.5 V 4 40 80 µA C i 10 10 10 pF † Test one output at a time, not exceeding 1-second duration. Measurement is made by forcing indicated current and measuring voltage to minimize power dissipation. Test verifies a minimum 50-Ω transmission-line drive capability at 85°C and 75-Ω transmission-line drive capability at 125°C. switching characteristics over recommended operating free-air temperature range, VCC = 1.5 V, CL = 50 pF (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) –40°C TO 85°C –55°C TO 125°C UNIT(INPUT) (OUTPUT) MIN MAX MIN MAX tPLZ A Y 94 103 ns tPZL A Y 74 81 ns switching characteristics over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V, CL = 50 pF (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) –40°C TO 85°C –55°C TO 125°C UNIT(INPUT) (OUTPUT) MIN MAX MIN MAX tPLZ A Y 3 10.4 2.9 11.5 ns tPZL A Y 2.3 8.3 2.3 9.1 ns switching characteristics over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V, CL = 50 pF (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) –40°C TO 85°C –55°C TO 125°C UNIT(INPUT) (OUTPUT) MIN MAX MIN MAX tPLZ A Y 2.2 7.5 2.1 8.2 ns tPZL A Y 1.7 5.9 1.6 6.5 ns operating characteristics, VCC = 5 V, TA = 25°C PARAMETER TYP UNIT C pd Power dissipation capacitance 105 pF
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NOTES: A. C L includes probe and jig capacitance. B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω , tr ≤ 3 ns, tf ≤ 3 ns. C. The outputs are measured one at a time with one input transition per measurement. Figure 1. Load Circuit and Voltage Waveforms
www.ti.com 11-Apr-2013 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3) Op Temp (°C) Top-Side Markings (4) Samples CD54AC05F3A ACTIVE CDIP J 14 1 TBD A42 N / A for Pkg Type -55 to 125 CD54AC05F3A CD74AC05E ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type -55 to 125 CD74AC05E CD74AC05EE4 ACTIVE PDIP N 14 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type -55 to 125 CD74AC05E CD74AC05M ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -55 to 125 AC05M CD74AC05M96 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -55 to 125 AC05M CD74AC05M96E4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -55 to 125 AC05M CD74AC05M96G4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -55 to 125 AC05M CD74AC05ME4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -55 to 125 AC05M CD74AC05MG4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -55 to 125 AC05M (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
www.ti.com 11-Apr-2013 Addendum-Page 2 (4) Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Top-Side Marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF CD54AC05, CD74AC05 :
- Catalog: CD74AC05
- Military: CD54AC05 NOTE: Qualified Version Definitions:
- Catalog - TI's standard catalog product
- Military - QML certified for Military and Defense Applications
*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 Pack Materials-Page 1
*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) CD74AC05M96 SOIC D 14 2500 367.0 367.0 38.0 PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 Pack Materials-Page 2
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