CD54AC00F3A INTERSIL | Alldatasheet

Document overview

  • Manufacturer or author: Provided By alldatasheet.com(free datasheet download site)
  • PDF pages: 4

Technical content

Features

  • This Circuit is Processed in Accordance to MIL-STD- 883 and is Fully Conformant Under the Provisions of Paragraph 1.2.1.
  • Exceeds 2kV ESD Protection MIL-STD-883, Method 3015
  • Meets JEDEC Standard No. 20
  • SCR - Latch-Up-Resistant CMOS Process and Circuit Design
  • Speed of Bipolar FAST/A/S with Significantly Reduced Power Consumption
  • Functionally and Pin-Compatible with Industry 54 Bipolar Types in the FAST, AS and S Series
  • Balanced Propagation Delays
  • Military Operating Temperature Range oC
  • ±24mA Output Drive Current, Drives 75Ω Lines with- out Need for Terminations
  • Fan Out (Over Temperature)
  • Balanced Noise Immunity at 30% of Supply for AC Types
  • Supply Voltage Range Pinout

Description

The CD54AC00F3A and CD54ACT00F3A are quad 2-input NAND gates that utilize the Harris Advanced CMOS Logic technology. Functional Diagram GND VCC

Ordering Information

TEMP. RANGE ( oC) PACKAGE PKG. NO. CD54AC00F3A -55 to 125 14 Ld CERDIP F14.3 CD54ACT00F3A -55 to 125 14 Ld CERDIP F14.3 NOTE: 1. Wafer and die for this part number is available which meets all elec- trical specifications. Please contact your local sales office or Harris customer service for ordering information. TRUTH TABLE INPUTS OUTPUTS ABY LLH HLH LHH HHL GND = 7 V CC = 14 July 1998 CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright © Harris Corporation 1998 CD54AC00F3A, CD54ACT00F3A Quad 2-Input NAND Gate File Number 3876.1

Absolute Maximum Ratings Thermal Information DC Input Diode Current, IIK DC Output Diode Current, IOK DC Output Source or Sink Current per Output Pin, IO Operating Conditions Supply Voltage Range, VCC (Note 3) DC Input or Output Voltage, V Input Rise and Fall Slew Rate, dt/dv AC Types Thermal Resistance (Typical, Note 4)θ JA (oC/W) θJC (oC/W) Maximum Junction Temperature (Hermetic Package or Die) . . . 175oC CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES: 2. For up to 4 outputs per device, add±25mA for each additional output. 3. Unless otherwise specified, all voltages are referenced to ground. 4. θ JA is measured with the component mounted on an evaluation PC board in free air. PARAMETER SYMBOL TEST CONDITIONS VCC (V) 25oC -55 oC TO 125oC UNITSVI(V) I O (mA) MIN MAX MIN MAX AC TYPES High Level Input Voltage V 3 2.1 - 2.1 - V 4.5 3.15 (Note 5) - 3.15 (Note 5) Low Level Input Voltage V IL - - 1.5 - 0.3 - 0.3 V 3 - 0.9 - 0.9 V 4.5 - 1.35 (Note 5) - 1.35 (Note 5) V High Level Output Voltage V OH VIH or VIL -0.05 1.5 1.4 - 1.4 - V -24 4.5 3.94 (Note 5) - 3.7 (Note 5) -50 (Note 6, 7) 5.5 - - 3.85 - V CD54AC00F3A, CD54ACT00F3A

Low Level Output Voltage V OL VIH or VIL 0.05 1.5 - 0.1 - 0.1 V 0.05 3 - 0.1 - 0.1 V 12 3 - 0.36 - 0.5 V 24 4.5 - 0.36 (Note 5) - 0.5 (Note 5) V (Note 6, 7) 5.5 - - - 1.65 V Input Leakage Current I I VCC or GND - 5.5 - ±0.1 (Note 5) - ±1 (Note 5) µA Quiescent Device Current I CC 0 5.5 - 4 (Note 5) -8 0 (Note 5) µA ACT TYPES High Level Input Voltage V IH - - 4.5 to 5.5 2 (Note 5) (Note 5) Low Level Input Voltage V IL - - 4.5 to 5.5 - 0.8 (Note 5) - 0.8 (Note 5) V High Level Output Voltage V OH VIH or VIL -0.05 4.5 4.4 - 4.4 - V -24 4.5 3.94 (Note 5) - 3.7 (Note 5) -50 (Note 6, 7) 5.5 - - 3.85 - V Low Level Output Voltage V OL VIH or VIL 0.05 4.5 - 0.1 - 0.1 V 24 4.5 - 0.36 (Note 5) - 0.5 (Note 5) V (Note 6, 7) 5.5 - - - 1.65 V Input Leakage Current I I VCC or GND - 5.5 - ±0.1 (Note 5) - ±1 (Note 5) µA Quiescent Device Current I CC VCC or GND 0 5.5 - 4 (Note 5) -8 0 (Note 5) µA Additional Supply Current per Input Pin TTL Inputs High

1 Unit Load

ΔI CC VCC -2.1 - 4.5 to 5.5 - 2.4 - 3 mA NOTES: 5. Tested at 100%. 6. Test one output at a time for a 1-second maximum duration. Measurement is made by forcing current and measuring voltage to minimize power dissipation. 7. Test verifies a minimum transmission-line-drive capability of 75Ω for 54AC/ACT Series. ACT Input Load Table INPUT UNIT LOAD All 0.15 NOTE: Unit load isΔICC limit specified in DC Electrical Specifications Table, e.g., 2.4mA max at 25oC. PARAMETER SYMBOL TEST CONDITIONS VCC (V) 25oC -55 oC TO 125oC UNITSVI(V) I O (mA) MIN MAX MIN MAX CD54AC00F3A, CD54ACT00F3A