CD4503BM NSC | Alldatasheet

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Y Wide supply voltage range 3.0 V DC to 18 V DC Y TRI-STATE outputs Y Symmetrical turn on/turn off delays Y Symmetrical output rise and fall times Y Pin-for-pin replacement for MM80C97 and MC14503 Schematic and Connection Diagrams TL/F/5989–1 Dual-In-Line Package TL/F/5989–2 Top View Order Number CD4503B Truth Table In Disable OutInput 00 0 10 1 X 1 TRI-STATE X e Don’t Care TRI-STATEÉ is a registered trademark of National Semiconductor Corporation. C1995 National Semiconductor Corporation RRD-B30M105/Printed in U. S. A.

Absolute Maximum Ratings (Notes 1 and 2) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications. Supply Voltage (V DD) b0.5V to a18V Input Voltage (V IN) b0.5V to a0.5V Storage Temperature Range (T S) b65§Ct o a150§C Power Dissipation (P D) Dual-In-Line 700 mW Small Outline 500 mW Lead Temperature (T (Soldering, 10 seconds) 260 §C Recommended Operating Conditions (Note 2) Supply Voltage (V DD) a3V to a15V Operating Temperature Range (T A) CD4503BM b55§Ct o a125§C CD4503BC b40§Ct o a85§C Symbol Parameter Conditions b55§C a25§ a125§C Units Min Max Min Typ Max Min Max IDD Quiescent Device V DD e 5V, 1 1 30 mA Current V IN e VDD or V SS VDD e 10V, 2 2 60 mA VIN e VDD or V SS VDD e 15V, 4 4 120 mA VIN e VDD or V SS VOL Low Level V IN e VDD or 0 Output Voltage V DD e 5V 0.05 0 0.05 0.05 V VDD e 10V 0.05 0 0.05 0.05 V VDD e 15V 0.05 0 0.05 0.05 V VOH High Level V IN e VDD or 0 Output Voltage V DD e 5V 4.95 4.95 5 4.95 V VDD e 10V 9.95 9.95 10 9.95 V VDD e 15V 14.95 14.95 15 14.95 V IOZ TRI-STATE Leakage Current V DD e 15V g0.1 g10b4 g0.1 g1.0 mA IIN Input Current V DD e 15V g0.1 g10b4 g0.1 g1.0 mA Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices should be operated at these limits. The tables of ‘‘Recommended Operating Conditions’’ and ‘‘Electrical Characteristics’’ provide conditions for actual device operation. Note 2: V SS e 0V unless otherwise specified. Note 3: IOH and I OL are tested one output at a time.

Symbol Parameter Conditions b40§C a25§C a85§C Units Min Max Min Typ Max Min Max IDD Quiescent Device V DD e 5V, 4 4 30 mA Current V IN e VDD or V SS VDD e 10V, 8 8 60 mA VIN e VDD or V SS VDD e 15V, 16 16 120 mA VIN e VDD or V SS VOL Low Level V IN e VDD or 0 Output Voltage V DD e 5V 0.05 0 0.05 0.05 V VDD e 10V 0.05 0 0.05 0.05 V VDD e 15V 0.05 0 0.05 0.05 V VOH High Level V IN e VDD or 0 Output Voltage V DD e 5V 4.95 4.95 4.95 V VDD e 10V 9.95 9.95 9.95 V VDD e 15V 14.95 14.95 14.95 V ITL TRI-STATE Leakage Current V DD e 15V g0.3 g10b4 g0.3 g1.0 mA IIN Input Current V DD e 15V g0.3 g10b5 g0.3 g1.0 mA Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the devices should be operated at these limits. The tables of ‘‘Recommended Operating Conditions’’ and ‘‘Electrical Characteristics’’ provide conditions for actual device operation. Note 2: V SS e 0V unless otherwise specified.

TA e 25§C, C L e 50 pF, R L e 200 k X, Input t r e tf e 20 ns, unless otherwise specified Symbol Parameter Conditions Min Typ Max Units tPHL,t PLH Propagation Delay Time V DD e 5V 75 100 ns VDD e 10V 35 40 ns VDD e 15V 25 30 ns tPLZ,t PHZ Propagation Delay Time, V DD e 5V 80 125 ns Logical Level to High V DD e 10V 40 90 ns Impedance State V DD e 15V 35 70 ns tPZL,t PZH Propagation Delay Time, V DD e 5V 95 175 ns High Impedance State to V DD e 10V 40 80 ns Logical Level V DD e 15V 35 70 ns tTLH Output Rise Time V DD e 5V 45 80 ns VDD e 10V 23 40 ns VDD e 15V 18 35 ns tTHL Output Fall Time V DD e 5V 45 80 ns VDD e 10V 23 40 ns VDD e 15V 18 35 ns *AC Parameters are guaranteed by DC correlated testing. AC Test Circuits and Switching Time Waveforms tPHL,t PLH TL/F/5989–3 CMOS to CMOS TL/F/5989–4 tPHZ and t PZH TL/F/5989–5 tPLZ and t PZL TL/F/5989–6

AC Test Circuits and Switching Time Waveforms (Continued) tPHZ TL/F/5989–7 tPLZ TL/F/5989–8 tPZH TL/F/5989–9 Note: Delays measured with input t r,t f s 20 ns. tPZL TL/F/5989–10 Physical Dimensions inches (millimeters) Ceramic Dual-In-Line Package (J) Order Number CD4503BMJ or CD4503BCJ

CD4503BM/CD4503BC Hex Non-Inverting TRI-STATE Buffer Physical Dimensions inches (millimeters) (Continued) Molded Dual-In-Line Package (N) Order Number CD4503BMN or CD4503BCN LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life systems which, (a) are intended for surgical implant support device or system whose failure to perform can into the body, or (b) support or sustain life, and whose be reasonably expected to cause the failure of the life failure to perform, when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can effectiveness. be reasonably expected to result in a significant injury to the user. National Semiconductor National Semiconductor National Semiconductor National Semiconductor Corporation Europe Hong Kong Ltd. Japan Ltd.

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