CC3235MODx and CC3235MODAx SimpleLink™ Wi-Fi CERTIFIED™ Dual-Band Wireless MCU Modules datasheet (Rev. C)
Document overview
- Manufacturer or author: Texas Instruments, Incorporated [SWRS243,C]
- PDF pages: 114
Technical content
CC3235MODx and CC3235MODAx SimpleLink™ Wi-Fi CERTIFIED™ Dual-Band Wireless MCU Modules
1 Features
- Fully integrated and green and RoHS modules include all required clocks, SPI flash, and passives
- 802.11a/b/g/n: 2.4GHz and 5GHz
- FCC, IC/ISED, ETSI/CE, MIC, and SRRC 1certified
- FIPS 140-2 Level 1 validated IC inside
- Multilayered security features help developers protect identities, data, and software IP
- Low-power modes for battery-powered
applications
- Coexistence with 2.4GHz radios
- Industrial temperature: –40°C to +85°C
- CC3235MODx multiple-core architecture, system- on-chip (SoC)
- CC3235MODAx modules include an integrated PCB antenna for easy integration into the host system
- 1.27mm pitch QFM package for easy assembly and low-cost PCB design
- Transferable Wi-Fi Alliance® certification
- Application microcontroller subsystem: – Arm® Cortex®-M4 core at 80MHz – User-dedicated memory
- 256KB of RAM
- Optional 1MB of executable flash – Rich set of peripherals and timers
- McASP supports two I2S channels
- SD, SPI, I2C, UART
- 8-bit synchronous imager interface
- 4-channel 12-bit ADCs
- 4 general-purpose timers (GPT) with 16-bit PWM mode
- Watchdog timer
- Up to 27 GPIO pins
- Debug interfaces: JTAG, cJTAG, SWD
- Wi-Fi network processor subsystem: – Wi-Fi® core:
- 802.11 a/b/g/n 2.4GHz and 5GHz
- Modes: – Access point (AP) – Station (STA) – Wi-Fi Direct® (only supported on 2.4GHz)
- Security: – WEP – WPA™/ WPA2™ PSK – WPA2 Enterprise – WPA3™ Personal – WPA3™ Enterprise – Internet and application protocols:
- HTTPs server, mDNS, DNS-SD, DHCP
- IPv4 and IPv6 TCP/IP stack
- 16 BSD sockets (fully secured TLS v1.2 and SSL 3.0) – Built-in power management subsystem:
- Configurable low-power profiles (always on, intermittently connected, tag)
- Advanced low-power modes
- Integrated DC/DC regulators
- Multilayered security features: – Separate execution environments – Networking security – Device identity and key – Hardware accelerator cryptographic engines (AES, DES, SHA/MD5, CRC) – File system security (encryption, authentication, access control) – Initial secure programming – Software tamper detection – Secure boot – Certificate signing request (CSR) – Unique per device key pair
- Application throughput – UDP: 16Mbps – TCP: 13Mbps
- Power-Management Subsystem: – Integrated DC/DC converters support a wide range of supply voltage:
- Single wide-voltage supply, VBAT: 2.3V to 3.6V – Advanced low-power modes:
- Shutdown: 1µA, Hibernate: 5.5µA
- Low-power deep sleep (LPDS): 120µA
- Idle connected (MCU in LPDS): 710µA
- RX traffic (MCU active): 59mA
- TX traffic (MCU active): 223mA 1 Contact TI for more information on using SRRC ID Certification: www.ti.com/tool/SIMPLELINK-CC3XXX-CERTIFICATION CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA.
– Wi-Fi TX power
- 2.4GHz: 16dBm at 1 DSSS
- 5GHz: 15.1dBm at 6 OFDM – Wi-Fi RX sensitivity
- 2.4GHz: –94.5dBm at 1 DSSS
- 5GHz: –89dBm at 6 OFDM
- Additional integrated components – 40.0MHz crystal – 32.768kHz crystal (RTC) – 32Mbit SPI serial flash – RF filters, diplexer and passive components
- Footprint-compatible QFM package – CC3235MODx: 1.27mm pitch, 63-pin, 20.5mm × 17.5mm – CC3235MODAx: 1.27mm pitch, 63-pin, 20.5mm × 25.0mm
- Module supports the SimpleLink Developer's Ecosystem
2 Applications
- For Internet of Things applications, such as: – Medical and healthcare
- Multiparameter patient monitor
- Electrocardiogram (ECG)
- Electronic hospital bed and bed control
- Telehealth systems – Building and home automation:
- HVAC systems and thermostats
- Video surveillance, video doorbells, and low- power camera
- Building security systems and e-locks – Appliances – Asset tracking – Factory automation – Grid infrastructure
3 Description
Start your design with the fully programmable FCC, IC/ISED, ETSI/CE, MIC, and SRRC certified wireless microcontroller (MCU) module with built-in dual-band Wi-Fi connectivity. The modules integrate the 40MHz crystal, 32.768kHz RTC clock, 32Mb SPI serial flash, RF filters, diplexer, and passive components. The SimpleLink™ CC3235MODx module is available in two variants:
- CC3235MODS includes 256KB of RAM, IoT networking security, device identity and keys, and MCU-level security features such as file system encryption, user IP (MCU image) encryption, secure boot, and debug security.
- CC3235MODSF builds on the CC3235MODS and integrates a user-dedicated 1MB of executable flash in addition to the 256KB of RAM. The SimpleLink™ CC3235MODAx module is available in two variants:
- CC3235MODAS includes 256KB of RAM, IoT networking security, device identity and keys, and MCU-level security features such as file system encryption, user IP (MCU image) encryption, secure boot, and debug security.
- CC3235MODASF builds on the CC3235MODAS and integrates a user-dedicated 1MB of executable flash in addition to the 256KB of RAM. Created for IoT, the SimpleLink™ Wi-Fi® CC3235MODx and CC3235MODAx module family from Texas Instruments is a wireless module that integrates two physically separated on-chip MCUs.
- Application processor—Arm® Cortex®-M4 MCU with a user-dedicated 256KB of RAM and an optional 1MB of executable flash.
- Network processor to run all Wi-Fi and Internet logical layers. This ROM-based subsystem completely offloads the host MCU and includes an 802.11 a/b/g/n dual-band 2.4GHz and 5GHz radio, baseband, and MAC with a powerful hardware cryptography engine. This generation introduces new capabilities that further simplify the connectivity of things to the Internet. The main new features include:
- 802.11a/b/g/n: 2.4GHz and 5GHz support
- 2.4GHz coexistence with Bluetooth® low energy radio
- Antenna diversity
- Enhanced security with FIPS 140-2 Level 1 validated IC inside: certification.
- More concurrent secure sockets (up to 16)
- Certificate signing request (CSR)
- Online certificate status protocol (OCSP) CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 www.ti.com
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- Wi-Fi Alliance® certified for IoT applications with low-power capabilities and more
- Hostless mode for offloading template packet transmissions
- Improved fast scan The CC3235MODx and CC3235MODAx device family is part of the SimpleLink MCU platform—a common, easy-to-use development environment based on a single-core software development kit (SDK) with a rich tool set and reference designs. The E2E™ support forums support Wi-Fi, Bluetooth low energy, Sub1GHz, and host Device Information (1) PART NUMBER PACKAGE PACKAGE SIZE CC3235MODSM2MOB QFM (63) 20.5mm × 17.5mm CC3235MODSF12MOB QFM (63) 20.5mm × 17.5mm CC3235MODASM2MON QFM (63) 20.5mm × 25mm CC3235MODASF12MON QFM (63) 20.5mm × 25mm (1) For more information, see Section 13. www.ti.com CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 3 Product Folder Links: CC3235MODS CC3235MODSF CC3235MODAS CC3235MODASF
4 Functional Block Diagrams
Figure 4-1 shows the functional block diagram of the CC3235MODx module. CC3235 MAC/PHY WRF_BGN F BGN RF_ABG 32-Mbit SFlash External SPI Programming
40 MHz
32.768 kHz UART SPI nReset PM 2.3 V to 3.6 V VBAT User GPIOx Aband F D
5 GHz
WRF_A Figure 4-1. CC3235MODx Functional Block Diagram CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 www.ti.com
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Figure 4-2 shows the functional block diagram of the CC3235MODAx module. CC3235 MAC/PHY WRF_BGN F BGN RF_ABG 32-Mbit SFlash External SPI Programming 32.768 kHz UART SPI nReset PM 2.3 V to 3.6 V VBAT User GPIOx Aband F D WRF_A Figure 4-2. CC3235MODAx Functional Block Diagram www.ti.com CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 5 Product Folder Links: CC3235MODS CC3235MODSF CC3235MODAS CC3235MODASF
Figure 4-3 shows the an overview of the CC3235x hardware. CC32xx ± Single-Chip Wireless MCU ARM Cortex-M4
80 MHz
1-MB Flash (optional) 256-KB RAM ROM Peripherals 1x SPI 2x UART 1x I2C 1x I2S/PCM 1x SD/MMC 8-bit Camera 4x ADC System DMA Timers GPIOs Network Processor Application Protocols RAM ROM Crypto Engine Wi-Fi Driver TCP/IP Stack (ARM Cortex) Power Management Oscillators DC-DC RTC Baseband MAC Processor Radio Synthesizer Dual Band Wi-Fi COEX I/Os Antenna Selection Figure 4-3. CC3235x Hardware Overview CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 www.ti.com
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6.4 Drive Strength and Reset States for Analog-
6.5 Pad State After Application of Power to Chip, but
7.4 Current Consumption (CC3235MODS and
7.5 Current Consumption (CC3235MODSF and
7.15 Thermal Resistance Characteristics for MOB
10 Environmental Requirements and SMT
13 Mechanical, Packaging, and Orderable
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5 Device Comparison
Table 5-2 shows the features supported across different CC3x35 modules. Table 5-1. Device Features Comparison FEATURE DEVICE CC3135MOD CC3235MODS CC3235MODSF On-board chip CC3135 CC3235S CC3235SF On-board ANT No No No sFlash 32-Mbit 32-Mbit 32-Mbit Regulatory certifications FCC, IC/ISED, ETSI/CE, MIC FCC, IC/ISED, ETSI/CE, MIC FCC, IC/ISED, ETSI/CE, MIC Wi-Fi Alliance® Certification Yes Yes Yes Operating temperature range –40°C to +85°C –40°C to +85°C –40°C to +85°C Classification Wi-Fi Network Processor Wireless Microcontroller Wireless Microcontroller Standard 802.11 a/b/g/n 802.11 a/b/g/n 802.11 a/b/g/n Frequency 2.4GHz, 5 GHz 2.4GHz, 5 GHz 2.4GHz, 5 GHz TCP/IP Stack IPv4, IPv6 IPv4, IPv6 IPv4, IPv6 Secured sockets 16 16 16 Integrated MCU – Arm Cortex-M4 at 80 MHz Arm Cortex-M4 at 80 MHz ON-CHIP APPLICATION MEMORY RAM – 256KB 256KB Flash – – 1MB PERIPHERALS AND INTERFACES Universal Asynchronous Receiver/Transmitter (UART) 1 2 2 Serial Port Interface (SPI) 1 1 1 Multichannel Audio Serial Port (McASP)- I2S or PCM – 2-ch 2-ch Inter-Integrated Circuit (I2C) – 1 1 Analog-to-digital converter (ADC) – 4-ch, 12-bit 4-ch, 12-bit Parallel interface (8-bit PI) – 1 1 General-purpose timers – 4 4 Multimedia card (MMC / SD) – 1 1 SECURITY FEATURES www.ti.com CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 9 Product Folder Links: CC3235MODS CC3235MODSF CC3235MODAS CC3235MODASF
Table 5-1. Device Features Comparison (continued) FEATURE DEVICE CC3135MOD CC3235MODS CC3235MODSF Additional networking security Unique Device Identity Trusted Root-Certificate Catalog TI Root-of-Trust Public key Unique Device Identity Trusted Root-Certificate Catalog TI Root-of-Trust Public key Unique Device Identity Trusted Root-Certificate Catalog TI Root-of-Trust Public key Hardware acceleration Hardware Crypto Engines Hardware Crypto Engines Hardware Crypto Engines Secure boot – Yes Yes Enhanced Application Level Security – File system security Secure key storage Software tamper detection Cloning protection Initial secure programming File system security Secure key storage Software tamper detection Cloning protection Initial secure programming FIPS 140-2 Level 1 Certification Yes Yes Yes Table 5-2. Device Features Comparison FEATURE DEVICE CC3135MOD CC3235MODS CC3235MODSF CC3235MODAS CC3235MODASF On-board chip CC3135 CC3235S CC3235SF CC3235S CC3235SF On-board ANT No No No Yes Yes sFlash 32-Mbit 32-Mbit 32-Mbit 32-Mbit 32-Mbit Regulatory certifications FCC, IC/ISED, ETSI/CE, MIC FCC, IC/ISED, ETSI/CE, MIC FCC, IC/ISED, ETSI/CE, MIC FCC, IC/ISED, ETSI/CE, MIC, SRRC(1) FCC, IC/ISED, ETSI/CE, MIC, SRRC(1) Wi-Fi Alliance® Certification Yes Yes Yes Yes Yes Operating temperature range –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C –40°C to +85°C Classification Wi-Fi Network Processor Wireless Microcontroller Wireless Microcontroller Wireless Microcontroller Wireless Microcontroller TCP/IP Stack IPv4, IPv6 IPv4, IPv6 IPv4, IPv6 IPv4, IPv6 IPv4, IPv6 Secured Sockets 16 16 16 16 16 Integrated MCU – Arm Cortex-M4 at 80 MHz Arm Cortex-M4 at 80 MHz Arm Cortex-M4 at 80 MHz Arm Cortex-M4 at 80 MHz ON-CHIP APPLICATION MEMORY RAM – 256KB 256KB 256KB 256KB Flash – – 1MB – 1MB PERIPHERALS AND INTERFACES Universal Asynchronous Receiver/Transmitter (UART) 1 2 2 2 2 Serial Port Interface (SPI) 1 1 1 1 1 CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 www.ti.com
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Table 5-2. Device Features Comparison (continued) FEATURE DEVICE CC3135MOD CC3235MODS CC3235MODSF CC3235MODAS CC3235MODASF Multichannel Audio Serial Port (McASP)- I2S or PCM – 2-ch 2-ch 2-ch 2-ch Inter-Integrated Circuit (I2C) – 1 1 1 1 Analog-to-digital converter (ADC) – 4-ch, 12-bit 4-ch, 12-bit 4-ch, 12-bit 4-ch, 12-bit Parallel interface (8-bit PI) – 1 1 1 1 General-purpose timers – 4 4 4 4 Multimedia card (MMC / SD) – 1 1 1 1 SECURITY FEATURES Additional networking security Unique Device Identity Trusted Root-Certificate Catalog TI Root-of-Trust Public key Unique Device Identity Trusted Root-Certificate Catalog TI Root-of-Trust Public key Unique Device Identity Trusted Root-Certificate Catalog TI Root-of-Trust Public key Unique Device Identity Trusted Root-Certificate Catalog TI Root-of-Trust Public key Unique Device Identity Trusted Root-Certificate Catalog TI Root-of-Trust Public key Hardware acceleration Hardware Crypto Engines Hardware Crypto Engines Hardware Crypto Engines Hardware Crypto Engines Hardware Crypto Engines Secure boot – Yes Yes Yes Yes Enhanced Application Level Security – File system security Secure key storage Software tamper detection Cloning protection Initial secure programming File system security Secure key storage Software tamper detection Cloning protection Initial secure programming File system security Secure key storage Software tamper detection Cloning protection Initial secure programming File system security Secure key storage Software tamper detection Cloning protection Initial secure programming FIPS 140-2 Level 1 Certification Yes Yes Yes Yes Yes (1) Contact TI for more information on using SRRC ID Certification: www.ti.com/tool/SIMPLELINK-CC3XXX-CERTIFICATION www.ti.com CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 11 Product Folder Links: CC3235MODS CC3235MODSF CC3235MODAS CC3235MODASF
5.1 Related Products
For information about other devices in this family of products or related products see the links below. The SimpleLink™ MCU Portfolio Offers a single development environment that delivers flexible hardware, software and tool options for customers developing wired and wireless applications. With 100 percent code reuse across host MCUs, Wi-Fi®, Bluetooth® low energy, Sub1GHz devices and more, choose the MCU or connectivity standard that fits your design. A one-time investment with the SimpleLink software development kit (SDK) allows you to reuse often, opening the door to create unlimited applications. SimpleLink™ Wi-Fi® Family The SimpleLink Wi-Fi Family offers several Internet-on-a chip solutions, which address the need of battery operated, security enabled products. Texas instruments offers a single chip wireless microcontroller and a wireless network processor which can be paired with any MCU, to allow developers to design new wi-fi products, or upgrade existing products with wi-fi capabilities. BoosterPack™ Plug-In Modules BoosterPack™ Plug-In Modules extend the functionality of TI LaunchPad Kit. Application specific BoosterPack Plug in modules allow you to explore a broad range of applications, including capacitive touch, wireless sensing, LED Lighting control, and more. Stack multiple BoosterPack modules onto a single LaunchPad kit to further enhance the functionality of your design. Reference Designs for CC3200, CC3220, and CC3235 Modules TI Designs Reference Design Library is a robust reference design library spanning analog, embedded processor and connectivity. Created by TI experts to help you jump start your system design, all TI Designs include schematic or block diagrams, BOMs and design files to speed your time to market. SimpleLink™ Wi-Fi® CC3235 SDK The SDK contains drivers for the CC3235 programmable MCU, sample applications, and documentation required to start development with CC3235x solutions. CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 www.ti.com
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6 Pin Configuration and Functions
6.1 CC3235MODx and CC3235MODAx Pin Diagram
Figure 6-1 shows the pin diagram for the CC3235MODx module. CC3235MODx 62 61 5756 FLASH_SPI_nCS_IN FLASH_SPI_MOSI GND FLASH_SPI_CLK FLASH_SPI_MISO JTAG_TDI GPIO22 GPIO13 GPIO12 GPIO17 GPIO16 GPIO15 GPIO14 GPIO11 GPIO10 GND GND 26232221 27252420191817 GND GND GND SOP1 SOP2 JTAG_TMS JTAG_TCK NC GPIO28 JTAG_TDO GPIO0 NC GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8 GPIO9 45484950 44464751525354 Figure 6-1 shows the approximate location of pins on the module. Figure 6-1. CC3235MODx Pin Diagram Bottom View www.ti.com CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 13 Product Folder Links: CC3235MODS CC3235MODSF CC3235MODAS CC3235MODASF
Figure 6-2 shows the pin diagram for the CC3235MODAx module. CC3235MODAx 62 61 5756 FLASH_SPI_nCS_IN FLASH_SPI_MOSI GND FLASH_SPI_CLK FLASH_SPI_MISO JTAG_TDI GPIO22 GPIO13 GPIO12 GPIO17 GPIO16 GPIO15 GPIO14 GPIO11 GPIO10 GND GND 26232221 27252420191817 GND GND GND SOP1 SOP2 JTAG_TMS JTAG_TCK NC GPIO28 JTAG_TDO GPIO0 NC GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8 GPIO9 45484950 44464751525354 2.4/5 GHz dual-band PCB Antenna Figure 6-2. CC3235MODAx Pin Diagram Bottom View
6.2 Pin Attributes and Pin Multiplexing
Section 6.2.1 lists the pin descriptions of the CC3235MODx and CC3235MODAx module. CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 www.ti.com
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6.2.1 Module Pin Descriptions
TYPE (1) CC3235 DEVICE PIN NO. MODULE PIN DESCRIPTION NO. NAME
1 GND – – Ground
2 GND – – Ground
3 GPIO10 I/O 1 GPIO (2)
4 GPIO11 I/O 2 GPIO (2)
5 GPIO14 I/O 5 GPIO (2)
6 GPIO15 I/O 6 GPIO (2)
7 GPIO16 I/O 7 GPIO (2)
8 GPIO17 I/O 8 GPIO (2)
9 GPIO12 I/O 3 GPIO (2)
10 GPIO13 I/O 4 GPIO (2)
11 GPIO22 I/O 15 GPIO (2)
12 JTAG_TDI I/O 16 JTAG TDI input. Leave unconnected if not used on product (2)
13 FLASH_SPI_MISO I – External serial flash programming: SPI data in
14 FLASH_SPI_nCS_IN I – External serial flash programming: SPI chip select (active low)
15 FLASH_SPI_CLK I – External serial flash programming: SPI clock
16 GND – – Ground
17 FLASH_SPI_MOSI O – External serial flash programming: SPI data out
18 JTAG_TDO I/O 17 JTAG TDO output. Leave unconnected if not used on the product. (1)
19 GPIO28 I/O 18 GPIO (2)
20 NC – – No Connect
21 JTAG_TCK I/O 19 JTAG TCK input. Leave unconnected if not used on the product. (2) An internal 100kΩ pulldown resistor is tied to this pin. 22 JTAG_TMS I/O 20 JTAG TMS input. Leave unconnected if not used on the product. (2) 23 SOP2 – 21 An internal 100kΩ pulldown resistor is tied to this SOP pin. An external 10kΩ resistor is required to pull this pin high. See Section 8.11.1 for SOP[2:0] configuration modes. 24 SOP1 – 34 An internal 100kΩ pulldown resistor is tied to this SOP pin. An external 10kΩ resistor is required to pull this pin high. See Section 8.11.1 for SOP[2:0] configuration modes.
25 GND – – Ground
26 GND – – Ground
27 GND – – Ground
28 GND – – Ground
29 GND – – Ground
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TYPE (1) CC3235 DEVICE PIN NO. MODULE PIN DESCRIPTION NO. NAME
30 GND – – Ground
31 CC3235MODx: RF ABG band
CC3235MODAx: NC I/O 31 2.4GHz and 5 GHz RF input/output
32 GND – – Ground
33 NC – – No Connect
34 SOP0 – 35 An internal 100kΩ pulldown resistor is tied to this SOP pin. An external 10kΩ resistor is required to pull this pin high. See Section 8.11.1 for SOP[2:0] configuration modes. 35 nRESET I 32 There is an internal, 100kΩ pullup resistor option from the nRESET pin to VBAT_RESET. Note: VBAT_RESET is not connected to VBAT1 or VBAT2 within the module. The following connection schemes are recommended:
- Connect nRESET to a switch, external controller, or host, only if nRESET will be in a defined state under all operating conditions. Leave VBAT_RESET unconnected to save power.
- If nRESET cannot be in a defined state under all operating conditions, connect VBAT_RESET to the main module power supply (VBAT1 and VBAT2). Due to the internal pullup resistor a leakage current of 3.3V / 100kΩ is expected.
36 VBAT_RESET – 37
37 VBAT1 Power 39 Power supply for the module, must be connected to battery (2.3V to 3.6V)
38 GND – – Ground
39 NC – 47 No Connect
40 VBAT2 Power 10, 44, 54 Power supply for the module, must be connected to battery (2.3V to 3.6V)
41 NC – – No Connect
42 GPIO30 I/O 53 GPIO (2)
43 GND – – Ground
44 GPIO0 I/O 50 GPIO (2)
45 NC – – No Connect
46 GPIO1 I/O 55 GPIO (2)
47 GPIO2 I/O 57 GPIO (2)
48 GPIO3 I/O 58 GPIO (2)
49 GPIO4 I/O 59 GPIO (2)
50 GPIO5 I/O 60 GPIO (2)
51 GPIO6 I/O 61 GPIO (2)
52 GPIO7 I/O 62 GPIO (2)
53 GPIO8 I/O 63 GPIO (2)
54 GPIO9 I/O 64 GPIO (2)
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TYPE (1) CC3235 DEVICE PIN NO. MODULE PIN DESCRIPTION NO. NAME
55 GND – – Thermal ground
56 GND – – Thermal ground
57 GND – – Thermal ground
58 GND – – Thermal ground
59 GND – – Thermal ground
60 GND – – Thermal ground
61 GND – – Thermal ground
62 GND – – Thermal ground
63 GND – – Thermal ground
(1) I = input; O = output; I/O = bidirectional (2) For pin multiplexing details, see Table 6-1. The module makes extensive use of pin multiplexing to accommodate the large number of peripheral functions in the smallest possible package. To achieve this configuration, pin multiplexing is controlled using a combination of hardware configuration (at module reset) and register control. The board and software designers are responsible for the proper pin multiplexing configuration. Hardware does not ensure that the proper pin multiplexing options are selected for the peripherals or interface mode used. Table 6-1 describes the general pin attributes and presents an overview of pin multiplexing. All pin multiplexing options are configurable using the pin MUX registers. The following special considerations apply:
- All I/Os support drive strengths of 2mA, 4mA, and 6mA. Drive strength is individually configurable for each pin.
- All I/Os support 10µA pullup and pulldown resistors.
- By default, all I/Os float in the Hibernate state. However, the default state can be changed by SW.
- All digital I/Os are non-failsafe. www.ti.com CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 17 Product Folder Links: CC3235MODS CC3235MODSF CC3235MODAS CC3235MODASF
If an external device drives a positive voltage to the signal pads and the CC3235MODx or CC3235MODAx module is not powered, DC is drawn from the other device. If the drive strength of the external device is adequate, an unintentional wakeup and boot of the CC3235MODx or CC3235MODAx module can occur. To prevent current draw, TI recommends any one of the following conditions:
- All devices interfaced to the CC3235MODx and CC3235MODAx modules must be powered from the same power rail as the chip.
- Use level shifters between the device and any external devices fed from other independent rails.
- The nRESET pin of the CC3235MODx and CC3235MODAx modules must be held low until the VBAT supply to the module is driven and stable.
- All GPIO pins default to high impedance unless programmed by the MCU. The bootloader sets the TDI, TDO, TCK, TMS, and Flash_SPI pins to mode 1. All the other pins are left in the Hi-Z state. The ADC inputs are tolerant up to 1.8 V (see Table 7-24 for more details about the usable range of the ADC). On the other hand, the digital pads can tolerate up to 3.6 V. Hence, take care to prevent accidental damage to the ADC inputs. TI recommends first disabling the output buffers of the digital I/Os corresponding to the desired ADC channel (that is, converted to Hi-Z state), and thereafter disabling the respective pass switches (S7 [Pin 47], S8 [Pin 48], S9 [Pin 49], and S10 [Pin 50]). For more information, see Table 6-3. Table 6-1. Pin Attributes and Pin Multiplexing GENERAL PIN ATTRIBUTES FUNCTION PAD STATES Pkg. Pin Pin Alias Use Select as Wakeup Source Config. Addl. Analog Mux Muxed With JTAG Dig. Pin Mux Config. Reg. Dig. Pin Mux Config. Mode Value Signal Name Signal Description Signal Directio n LPDS (1) Hib (2) nRESET = 0
1 GND GND N/A N/A N/A N/A N/A GND GND N/A N/A N/A N/A
2 GND GND N/A N/A N/A N/A N/A GND GND N/A N/A N/A N/A
3 GPIO10 I/O No No No
GPIO_PAD_ CONFIG_10 (0x4402 E0C8)
0 GPIO10 GPIO I/O
Hi-Z, Pull, Drive Hi-Z, Pull, Drive Hi-Z
1 I2C_SCL I2C clock
(open drain) Hi-Z, Pull, Drive
3 GT_PWM06 Pulse-width
Hi-Z, Pull, Drive
7 UART1_TX UART TX data O 1
6 SDCARD_CLK SD card clock O 0
12 GT_CCP01 Timer capture port I
Hi-Z, Pull, Drive CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 www.ti.com
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Table 6-1. Pin Attributes and Pin Multiplexing (continued) GENERAL PIN ATTRIBUTES FUNCTION PAD STATES Pkg. Pin Pin Alias Use Select as Wakeup Source Config. Addl. Analog Mux Muxed With JTAG Dig. Pin Mux Config. Reg. Dig. Pin Mux Config. Mode Value Signal Name Signal Description Signal Directio n LPDS (1) Hib (2) nRESET = 0
4 GPIO11 I/O Yes No No
GPIO_PAD_ CONFIG_11 (0x4402 E0CC)
0 GPIO11 GPIO I/O
Hi-Z, Pull, Drive Hi-Z, Pull, Drive Hi-Z
1 I2C_SDA I2C data
(open drain) Hi-Z, Pull, Drive
3 GT_PWM07 Pulse-width
Hi-Z, Pull, Drive 4 pXCLK (XVCLK) Free clock to parallel camera O 0
6 SDCARD_CMD SD card command
(open drain) Hi-Z, Pull, Drive
7 UART1_RX UART RX data I
Hi-Z, Pull, Drive
12 GT_CCP02 Timer capture port I
Hi-Z, Pull, Drive
13 MCAFSX I2S audio port
Hi-Z, Pull, Drive
5 GPIO14 I/O No No No
GPIO_PAD_ CONFIG_14 (0x4402 E0D8)
0 GPIO14 GPIO I/O
Hi-Z, Pull, Drive Hi-Z, Pull, Drive Hi-Z
5 I2C_SCL I2C clock
(open drain)
7 GSPI_CLK General SPI clock I/O
(CAM_D4) Parallel camera data bit 4 I
12 GT_CCP05 Timer capture port I
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Table 6-1. Pin Attributes and Pin Multiplexing (continued) GENERAL PIN ATTRIBUTES FUNCTION PAD STATES Pkg. Pin Pin Alias Use Select as Wakeup Source Config. Addl. Analog Mux Muxed With JTAG Dig. Pin Mux Config. Reg. Dig. Pin Mux Config. Mode Value Signal Name Signal Description Signal Directio n LPDS (1) Hib (2) nRESET = 0
6 GPIO15 I/O No No No
GPIO_PAD_ CONFIG_15 (0x4402 E0DC)
0 GPIO15 GPIO I/O
Hi-Z, Pull, Drive Hi-Z, Pull, Drive Hi-Z
5 I2C_SDA I2C data
(open drain)
7 GSPI_MISO General SPI MISO I/O
(CAM_D5) Parallel camera data bit 5 I
13 GT_CCP06 Timer capture port I
8 SDCARD_
7 GPIO16 I/O No No No
GPIO_PAD_ CONFIG_16 (0x4402 E0E0)
0 GPIO16 GPIO I/O
Hi-Z, Pull, Drive Hi-Z, Pull, Drive Hi-Z Hi-Z, Pull, Drive Hi-Z, Pull, Drive
7 GSPI_MOSI General SPI MOSI I/O
Hi-Z, Pull, Drive 4 pDATA10 (CAM_D6) Parallel camera data bit 6 I Hi-Z, Pull, Drive
5 UART1_TX UART1 TX data O 1
13 GT_CCP07 Timer capture port I
Hi-Z, Pull, Drive
8 SDCARD_CLK SD card clock O Zero
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Table 6-1. Pin Attributes and Pin Multiplexing (continued) GENERAL PIN ATTRIBUTES FUNCTION PAD STATES Pkg. Pin Pin Alias Use Select as Wakeup Source Config. Addl. Analog Mux Muxed With JTAG Dig. Pin Mux Config. Reg. Dig. Pin Mux Config. Mode Value Signal Name Signal Description Signal Directio n LPDS (1) Hib (2) nRESET = 0
8 GPIO17 I/O Yes No No
GPIO_PAD_ CONFIG_17 (0x4402 E0E4)
0 GPIO17 GPIO I/O
Hi-Z, Pull, Drive Hi-Z, Pull, Drive Hi-Z
5 UART1_RX UART1 RX data I
7 GSPI_CS General SPI chip
(CAM_D7) Parallel camera data bit 7 I
9 GPIO12 I/O No No No
GPIO_PAD_ CONFIG_12 (0x4402 E0D0)
0 GPIO12 GPIO I/O
Hi-Z, Pull, Drive Hi-Z, Pull, Drive Hi-Z
3 McACLK I2S audio port clock
Hi-Z, Pull, Drive 4 pVS (VSYNC) Parallel camera vertical sync I Hi-Z, Pull, Drive (open drain) Hi-Z, Pull, Drive
7 UART0_TX UART0 TX data O 1
12 GT_CCP03 Timer capture port I
Hi-Z, Pull, Drive
10 GPIO13 I/O Yes No No
GPIO_PAD_ CONFIG_13 (0x4402 E0D4)
0 GPIO13 GPIO I/O
Hi-Z, Pull, Drive Hi-Z, Pull, Drive Hi-Z (open drain) 4 pHS (HSYNC) Parallel camera horizontal sync I
7 UART0_RX UART0 RX data I
12 GT_CCP04 Timer capture port I
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Table 6-1. Pin Attributes and Pin Multiplexing (continued) GENERAL PIN ATTRIBUTES FUNCTION PAD STATES Pkg. Pin Pin Alias Use Select as Wakeup Source Config. Addl. Analog Mux Muxed With JTAG Dig. Pin Mux Config. Reg. Dig. Pin Mux Config. Mode Value Signal Name Signal Description Signal Directio n LPDS (1) Hib (2) nRESET = 0
11 GPIO22 I/O No No No
GPIO_PAD_ CONFIG_22 (0x4402 E0F8)
0 GPIO22 GPIO I/O
Hi-Z, Pull, Drive Hi-Z, Pull, Drive Hi-Z7 McAFSX I2S audio port frame sync O
5 GT_CCP04 Timer capture port I
12 JTAG_TDI I/O No No
GPIO_PAD_ CONFIG_23 (0x4402 E0FC) 1 TDI JTAG TDI. Reset default pinout. I Hi-Z, Pull, Drive Hi-Z, Pull, Drive Hi-Z
0 GPIO23 GPIO I/O
2 UART1_TX UART1 TX data O 1
9 I2C_SCL I2C clock
(open drain) Hi-Z, Pull, Drive FLASH_ SPI_ MISO N/A N/A N/A N/A N/A N/A FLASH_SPI_MISO Data from SPI serial flash (fixed default) N/A Hi-Z Hi-Z Hi-Z FLASH_ SPI_ nCS_IN N/A N/A N/A N/A N/A N/A FLASH_SPI_nCS_ IN Chip select to SPI serial flash (fixed default) N/A 1 Hi-Z, Pull, Drive Hi-Z
15 FLASH_
SPI_CLK N/A N/A N/A N/A N/A N/A FLASH_SPI_ CLK Clock to SPI serial flash (fixed default) N/A Hi-Z, Pull, Drive (3) Hi-Z, Pull, Drive Hi-Z
16 GND GND N/A N/A N/A N/A N/A GND GND N/A N/A N/A N/A
FLASH_ SPI_ MOSI N/A N/A N/A N/A N/A N/A FLASH_SPI_MOSI Data to SPI serial flash (fixed default) N/A Hi-Z, Pull, Drive (3) Hi-Z, Pull, Drive Hi-Z CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 www.ti.com
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Table 6-1. Pin Attributes and Pin Multiplexing (continued) GENERAL PIN ATTRIBUTES FUNCTION PAD STATES Pkg. Pin Pin Alias Use Select as Wakeup Source Config. Addl. Analog Mux Muxed With JTAG Dig. Pin Mux Config. Reg. Dig. Pin Mux Config. Mode Value Signal Name Signal Description Signal Directio n LPDS (1) Hib (2) nRESET = 0
18 JTAG_TDO I/O Yes No
GPIO_PAD_ CONFIG_ 24 (0x4402 E100) 1 TDO JTAG TDO. Reset default pinout. O Hi-Z, Pull, Drive Driven high in SWD; driven low in 4- wire JTAG Hi-Z
0 GPIO24 GPIO I/O
5 PWM0 Pulse-width
2 UART1_RX UART1 RX data I
9 I2C_SDA I2C data
(open drain)
4 GT_CCP06 Timer capture port I
6 McAFSX I2S audio port
19 GPIO28 I/O No No No
GPIO_PAD_ CONFIG_ 40 (0x4402 E140)
0 GPIO28 GPIO I/O
Hi-Z, Pull, Drive Hi-Z, Pull, Drive Hi-Z
20 NC WLAN
analog N/A N/A N/A N/A N/A NC Reserved N/A N/A N/A N/A
21 JTAG_TCK I/O No No
GPIO_PAD_ CONFIG_ 28 (0x4402 E110)
1 TCK
JTAG/SWD TCK. Reset default pinout. I Hi-Z, Pull, Drive Hi-Z, Pull, Drive Hi-Z
8 GT_PWM03 Pulse-width
22 JTAG_TMS I/O No No
GPIO_PAD_ CONFIG_ 29 (0x4402 E114)
1 TMS
JTAG/SWD TMS. Reset default pinout. I/O Hi-Z, Pull, Drive Hi-Z, Pull, Drive Hi-Z
0 GPIO29 GPIO
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Table 6-1. Pin Attributes and Pin Multiplexing (continued) GENERAL PIN ATTRIBUTES FUNCTION PAD STATES Pkg. Pin Pin Alias Use Select as Wakeup Source Config. Addl. Analog Mux Muxed With JTAG Dig. Pin Mux Config. Reg. Dig. Pin Mux Config. Mode Value Signal Name Signal Description Signal Directio n LPDS (1) Hib (2) nRESET = 0 23 (4) SOP2 O only No No No GPIO_PAD_ CONFIG_ 25 (0x4402 E104)
0 GPIO25 GPIO O
Hi-Z, Pull, Drive Driven Low Hi-Z
9 GT_PWM02 Pulse-width
Hi-Z, Pull, Drive
2 McAFSX I2S audio port
Hi-Z, Pull, Drive See (5) TCXO_EN Enable to optional external 40-MHz TCXO O 0 See (6) SOP2 Sense-on-power 2 I Hi-Z, Pull, Drive
24 SOP1 Config
sense N/A N/A N/A N/A N/A SOP1 Sense-on-power 1 N/A N/A N/A N/A
25 GND GND N/A N/A N/A N/A N/A GND GND N/A N/A N/A N/A
26 GND GND N/A N/A N/A N/A N/A GND GND N/A N/A N/A N/A
27 GND GND N/A N/A N/A N/A N/A GND GND N/A N/A N/A N/A
28 GND GND N/A N/A N/A N/A N/A GND GND N/A N/A N/A N/A
29 GND GND N/A N/A N/A N/A N/A GND GND N/A N/A N/A N/A
30 GND GND N/A N/A N/A N/A N/A GND GND N/A N/A N/A N/A
31 RF_ABG WLAN
analog N/A N/A N/A N/A N/A CC3235MODx: RF ABG band N/A N/A N/A N/A N/A
32 GND GND N/A N/A N/A N/A N/A GND GND N/A N/A N/A N/A
33 NC WLAN
analog N/A N/A N/A N/A NC Reserved
34 SOP0 Config
sense N/A N/A N/A N/A N/A SOP0 Sense-on-power 0 N/A N/A N/A N/A 35 nRESET Global reset N/A N/A N/A N/A N/A nRESET Master chip reset. Active low. N/A N/A N/A N/A CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 www.ti.com
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Table 6-1. Pin Attributes and Pin Multiplexing (continued) GENERAL PIN ATTRIBUTES FUNCTION PAD STATES Pkg. Pin Pin Alias Use Select as Wakeup Source Config. Addl. Analog Mux Muxed With JTAG Dig. Pin Mux Config. Reg. Dig. Pin Mux Config. Mode Value Signal Name Signal Description Signal Directio n LPDS (1) Hib (2) nRESET = 0
36 VBAT_
RESET Global reset N/A N/A N/A N/A N/A VBAT_RESET VBAT to nRESET pullup resistor N/A N/A N/A N/A
37 VBAT1 Supply
input N/A N/A N/A N/A N/A VBAT1 Analog DC/DC input (connected to chip input supply [VBAT]) N/A N/A N/A N/A
38 GND GND N/A N/A N/A N/A N/A GND GND N/A N/A N/A N/A
39 NC WLAN
analog N/A N/A N/A N/A N/A NC Reserved N/A N/A N/A N/A
40 VBAT2 Supply
input N/A N/A N/A N/A N/A VBAT2 Analog input supply VBAT N/A N/A N/A N/A
41 NC WLAN
analog N/A N/A N/A N/A N/A NC Reserved N/A N/A N/A N/A
42 GPIO30 I/O No
(7) No GPIO_PAD_ CONFIG_30 (0x4402 E118)
0 GPIO30 GPIO I/O
Hi-Z, Pull, Drive Hi-Z, Pull, Drive Hi-Z
9 UART0_TX UART0 TX data O 1
2 McACLK I2S audio port clock O
Hi-Z, Pull, Drive
3 McAFSX I2S audio port
Hi-Z, Pull, Drive
4 GT_CCP05 Timer capture port I
Hi-Z, Pull, Drive Hi-Z, Pull, Drive
43 GND GND N/A N/A N/A N/A N/A GND GND N/A N/A N/A N/A
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Table 6-1. Pin Attributes and Pin Multiplexing (continued) GENERAL PIN ATTRIBUTES FUNCTION PAD STATES Pkg. Pin Pin Alias Use Select as Wakeup Source Config. Addl. Analog Mux Muxed With JTAG Dig. Pin Mux Config. Reg. Dig. Pin Mux Config. Mode Value Signal Name Signal Description Signal Directio n LPDS (1) Hib (2) nRESET = 0
44 GPIO0 I/O No
(7) No GPIO_PAD_ CONFIG_0 (0x4402 E0A0)
0 GPIO0 GPIO I/O
Hi-Z, Pull, Drive Hi-Z, Pull, Drive Hi-Z
12 UART0_CTS
Send input (active low) I Hi-Z, Pull, Drive Hi-Z, Pull, Drive Hi-Z
6 McAXR1 I2S audio port data
1 (RX/TX) I/O Hi-Z, Pull, Drive
7 GT_CCP00 Timer capture port I
Hi-Z, Pull, Drive
9 GSPI_CS General SPI chip
Hi-Z, Pull, Drive
10 UART1_RTS UART1 Request-to-
Send (active low) O 1
3 UART0_RTS UART0 Request-to-
Send (active low) O 1
4 McAXR0 I2S audio port data
0 (RX/TX) I/O Hi-Z, Pull, Drive
45 NC WLAN
analog N/A N/A N/A N/A N/A NC Reserved N/A N/A N/A N/A
46 GPIO1 I/O No No No
GPIO_PAD_ CONFIG_1 (0x4402 E0A4)
0 GPIO1 GPIO I/O
Hi-Z, Pull, Drive Hi-Z, Pull, Drive Hi-Z
3 UART0_TX UART0 TX data O 1
4 pCLK (PIXCLK) Pixel clock from parallel camera sensor I Hi-Z, Pull, Drive
6 UART1_TX UART1 TX data O 1
7 GT_CCP01 Timer capture port I
Hi-Z, Pull, Drive CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 www.ti.com
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Table 6-1. Pin Attributes and Pin Multiplexing (continued) GENERAL PIN ATTRIBUTES FUNCTION PAD STATES Pkg. Pin Pin Alias Use Select as Wakeup Source Config. Addl. Analog Mux Muxed With JTAG Dig. Pin Mux Config. Reg. Dig. Pin Mux Config. Mode Value Signal Name Signal Description Signal Directio n LPDS (1) Hib (2) nRESET = 0 47 (9) GPIO2 Analog input (up to
1.8 V)/
Yes See (8) No GPIO_PAD_ CONFIG_2 (0x4402 E0A8) See (5) ADC_CH0 ADC channel 0 input (1.5-V max) I Hi-Z, Pull, Drive Hi-Z, Pull, Drive Hi-Z
0 GPIO2 GPIO I/O
Hi-Z, Pull, Drive
3 UART0_RX UART0 RX data I
Hi-Z, Pull, Drive
6 UART1_RX UART1 RX data I
Hi-Z, Pull, Drive
7 GT_CCP02 Timer capture port I
Hi-Z, Pull, Drive 48 (9) GPIO3 Analog input (up to No See (8) No GPIO_PAD_ CONFIG_3 (0x4402 E0AC) See (5) ADC_CH1 ADC channel 1 input (1.5-V max) I Hi-Z, Pull, Drive Hi-Z, Pull, Drive Hi-Z
0 GPIO3 GPIO I/O
Hi-Z, Pull, Drive (CAM_D3) Parallel camera data bit 3 I Hi-Z, Pull, Drive www.ti.com CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 27 Product Folder Links: CC3235MODS CC3235MODSF CC3235MODAS CC3235MODASF
Table 6-1. Pin Attributes and Pin Multiplexing (continued) GENERAL PIN ATTRIBUTES FUNCTION PAD STATES Pkg. Pin Pin Alias Use Select as Wakeup Source Config. Addl. Analog Mux Muxed With JTAG Dig. Pin Mux Config. Reg. Dig. Pin Mux Config. Mode Value Signal Name Signal Description Signal Directio n LPDS (1) Hib (2) nRESET = 0 49 (9) GPIO4 Analog input (up to Yes See (8) Yes GPIO_PAD_ CONFIG_4 (0x4402 E0B0) See (5) ADC_CH2 ADC channel 2 input (1.5-V max) I Hi-Z, Pull, Drive Hi-Z, Pull, Drive Hi-Z
0 GPIO4 GPIO I/O
Hi-Z, Pull, Drive Hi-Z, Pull, Drive 4 pDATA6 (CAM_D2) Parallel camera data bit 2 I Hi-Z, Pull, Drive 50 (9) GPIO5 Analog input up to 1.5 V No See (8) No GPIO_PAD_ CONFIG_5 (0x4402 E0B4) See (5) ADC_CH3 ADC channel 3 input (1.5 V max) I i-Z, Pull, Drive Hi-Z, Pull, Drive Hi-Z
0 GPIO5 GPIO I/O
Hi-Z, Pull, Drive 4 pDATA5 (CAM_D1) Parallel camera data bit 1 I Hi-Z, Pull, Drive 1 (RX, TX) I/O Hi-Z, Pull, Drive
7 GT_CCP05 Timer capture port I
Hi-Z, Pull, Drive CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 www.ti.com
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Table 6-1. Pin Attributes and Pin Multiplexing (continued) GENERAL PIN ATTRIBUTES FUNCTION PAD STATES Pkg. Pin Pin Alias Use Select as Wakeup Source Config. Addl. Analog Mux Muxed With JTAG Dig. Pin Mux Config. Reg. Dig. Pin Mux Config. Mode Value Signal Name Signal Description Signal Directio n LPDS (1) Hib (2) nRESET = 0
51 GPIO6 I/O No No No
GPIO_PAD_ CONFIG_6 (0x4402 E0B8)
0 GPIO6 GPIO I/O
Hi-Z, Pull, Drive Hi-Z, Pull, Drive Hi-Z
5 UART0_RTS UART0 Request-to-
Send (active low) O 1 4 pDATA4 (CAM_D0) Parallel camera data bit 0 I Hi-Z, Pull, Drive
3 UART1_CTS UART1 Clear to
send (active low) I Hi-Z, Pull, Drive
6 UART0_CTS UART0 Clear to
send (active low) I Hi-Z, Pull, Drive
7 GT_CCP06 Timer capture port I
Hi-Z, Pull, Drive
52 GPIO7 I/O No No No
GPIO_PAD_ CONFIG_7 (0x4402 E0BC)
0 GPIO7 GPIO I/O
Hi-Z, Pull, Drive Hi-Z, Pull, Drive Hi-Z
13 McACLK I2S audio port clock O
Hi-Z, Pull, Drive
3 UART1_RTS UART1 Request to
send (active low) O 1
10 UART0_RTS UART0 Request to
send (active low) O 1
11 UART0_TX UART0 TX data O 1
53 GPIO8 I/O No No No
GPIO_PAD_ CONFIG_8 (0x4402 E0C0)
0 GPIO8 GPIO I/O
Hi-Z, Pull, Drive Hi-Z, Pull, Drive Hi-Z
6 SDCARD_IRQ
SD card (future support) I
7 McAFSX I2S audio port
12 GT_CCP06 Timer capture port I
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Table 6-1. Pin Attributes and Pin Multiplexing (continued) GENERAL PIN ATTRIBUTES FUNCTION PAD STATES Pkg. Pin Pin Alias Use Select as Wakeup Source Config. Addl. Analog Mux Muxed With JTAG Dig. Pin Mux Config. Reg. Dig. Pin Mux Config. Mode Value Signal Name Signal Description Signal Directio n LPDS (1) Hib (2) nRESET = 0
54 GPIO9 I/O No No No
GPIO_PAD_ CONFIG_9 (0x4402 E0C4)
0 GPIO9 GPIO I/O
Hi-Z, Pull, Drive Hi-Z, Pull, Drive Hi-Z
3 GT_PWM05 Pulse-width
6 SDCARD_
7 McAXR0 I2S audio port data
(RX, TX) I/O
12 GT_CCP00 Timer capture port I
55 GND GND N/A N/A N/A N/A N/A GND GND N/A N/A N/A N/A
56 GND GND N/A N/A N/A N/A N/A GND GND N/A N/A N/A N/A
57 GND GND N/A N/A N/A N/A N/A GND GND N/A N/A N/A N/A
58 GND GND N/A N/A N/A N/A N/A GND GND N/A N/A N/A N/A
59 GND GND N/A N/A N/A N/A N/A GND GND N/A N/A N/A N/A
60 GND GND N/A N/A N/A N/A N/A GND GND N/A N/A N/A N/A
61 GND GND N/A N/A N/A N/A N/A GND GND N/A N/A N/A N/A
62 GND GND N/A N/A N/A N/A N/A GND GND N/A N/A N/A N/A
63 GND GND N/A N/A N/A N/A N/A GND GND N/A N/A N/A N/A
(1) LPDS state: The state of unused I/Os is Hi-Z. Software may program the I/Os to be input with pull or drive (regardless of active pin configuration), according to the need. (2) Hibernate mode: The state of the I/Os is Hi-Z. Software may program the I/Os to be input with pull or drive (regardless of active pin configuration), according to the need. (3) To minimize leakage in some serial flash vendors during LPDS, TI recommends that the user application always enables internal weak pulldowns on FLASH_SPI_DIN, FLASH_SPI_DOUT, and FLASH_SPI_CLK pins. (4) Pin has dual functions: as a SOP[2] (device operation mode), and as an external TCXO enable. As a TCXO enable, the pin is an output on power up and driven logic high. During hibernate low-power mode, the pin is in a Hi-Z state but is pulled down for SOP mode to disable TCXO. Because of the SOP functionality, the pin must be used as an output only. (5) For details on proper use, see Drive Strength and Reset States for Analog-Digital Multiplexed Pins. (6) Pin is one of three that must have a passive pullup or pulldown resistor onboard to configure the chip hardware power-up mode. For this reason, the pin must be output only when used for digital functions. (7) Device firmware automatically enables the digital path during ROM boot. (8) Requires user configuration to enable the analog switch of the ADC channel. (The switch is off by default.) The digital I/O is always connected and must be made Hi-Z before enabling the ADC switch. (9) Pin is shared by the ADC inputs and digital I/O pad cells. CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 www.ti.com
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up to 3.6V. Hence, take care to prevent accidental damage to the ADC inputs. TI recommends first disabling the output buffers of the digital I/Os corresponding to the desired ADC channel (that is, converted to Hi-Z state), and thereafter disabling the respective pass switches (S7 [Pin 47], S8 [Pin 48], S9 [Pin 49], and S10 [Pin 50]). For more information, see Drive Strength and Reset States for Analog-Digital Multiplexed Pins. www.ti.com CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 31 Product Folder Links: CC3235MODS CC3235MODSF CC3235MODAS CC3235MODASF
6.3 Signal Descriptions
Table 6-2. Signal Descriptions FUNCTION SIGNAL NAME PIN NO. PIN TYPE SIGNAL DIRECTION DESCRIPTION ADC ADC_CH0 47 I/O I ADC channel 0 input (maximum of 1.5 V) ADC_CH1 48 I/O I ADC channel 1 input (maximum of 1.5 V) ADC_CH2 49 I/O I ADC channel 2 input (maximum of 1.5 V) ADC_CH3 50 I I ADC channel 3 input (maximum of 1.5 V) BLE/2.4 GHz radio coexistence (2) GPIO10 3 I/O I/O Coexistence inputs and outputs GPIO14 5 I/O I/O GPIO15 6 I/O I/O GPIO16 7 I/O I/O GPIO17 8 I/O I/O GPIO12 9 I/O I/O GPIO22 11 I/O I/O GPIO28 19 (1) I/O I/O GPIO0 44 I/O I/O GPIO30 42 (1) I/O I/O GPIO5 50 I/O I/O GPIO6 51 I/O I/O GPIO8 53 I/O I/O GPIO9 54 I/O I/O Hostless mode HM_IO
3 I/O I/O
Hostless mode inputs and outputs
4 I/O O
5 I/O I/O
6 I/O I/O
7 I/O I/O
8 I/O I/O
9 I/O I/O
10 I/O O
11 I/O I/O
19 (1) I/O I/O
23 O O
42 (1) I/O I/O
44 I/O I/O
48 O O
49 O O
50 I/O I/O
51 I/O I/O
53 I/O I/O
54 I/O I/O
TDI 12 I/O I JTAG TDI. Reset default pinout. TDO 18 I/O O JTAG TDO. Reset default pinout. TCK 21 I/O I JTAG/SWD TCK. Reset default pinout. TMS 22 I/O I/O JTAG/SWD TMS. Reset default pinout. CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 www.ti.com
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Table 6-2. Signal Descriptions (continued) FUNCTION SIGNAL NAME PIN NO. PIN TYPE SIGNAL DIRECTION DESCRIPTION I2C I2C_SCL I/O I/O (open drain) I2C clock data I2C_SDA I/O I/O (open drain) I2C data Timers GT_PWM06 3 I/O O Pulse-width modulated O/P GT_CCP01 46 I/O I Timer capture port GT_PWM07 4 I/O O Pulse-width modulated O/P GT_CCP02 47 I/O I Timer capture ports GT_CCP03 9 I/O I GT_CCP04
10 I/O I
11 I/O I
GT_CCP05 5 I/O I GT_CCP06
6 I/O I
18 I/O I
51 I/O I
53 I/O I
GT_CCP07 7 I/O I PWM0 18 I/O O Pulse-width modulated outputsGT_PWM03 21 I/O O GT_PWM02 23 O O GT_CCP00
44 I/O I
54 I/O I
GT_CCP05 42 I/O I GT_CCP01 46 I/O I GT_CCP02 47 I/O I GT_CCP05 50 I I Timer capture port Input GT_PWM05 54 I/O O Pulse-width modulated output www.ti.com CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 33 Product Folder Links: CC3235MODS CC3235MODSF CC3235MODAS CC3235MODASF
Table 6-2. Signal Descriptions (continued) FUNCTION SIGNAL NAME PIN NO. PIN TYPE SIGNAL DIRECTION DESCRIPTION GPIO GPIO10 3 I/O I/O General-purpose inputs or outputs GPIO11 4 I/O I/O GPIO14 5 I/O I/O GPIO15 6 I/O I/O GPIO16 7 I/O I/O GPIO17 8 I/O I/O GPIO12 9 I/O I/O GPIO13 10 I/O I/O GPIO22 11 I/O I/O GPIO23 12 I/O I/O GPIO24 18 I/O I/O GPIO28 19 I/O I/O GPIO29 22 I/O I/O GPIO25 23 O O GPIO0 44 I/O I/O GPIO30 42 I/O I/O GPIO1 46 I/O I/O GPIO2 47 I/O I/O GPIO3 48 I/O I/O GPIO4 49 I/O I/O GPIO5 50 I/O I/O GPIO6 51 I/O I/O GPIO7 52 I/O I/O GPIO8 53 I/O I/O GPIO9 54 I/O I/O McASP I2S or PCM MCAFSX I/O O I2S audio port frame sync McACLK
9 I/O O
I2S audio port clock outputs
42 I/O O
44 I/O I/O I2S audio port data 1 (RX/TX)
50 I I/O I2S audio port data 1 (RX and TX)
44 I/O I/O I2S audio port data 0 (RX and TX)
54 I/O I/O I2S audio port data (RX and TX)
McACLKX 52 I/O O I2S audio port clock CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 www.ti.com
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Table 6-2. Signal Descriptions (continued) FUNCTION SIGNAL NAME PIN NO. PIN TYPE SIGNAL DIRECTION DESCRIPTION Multimedia card (MMC or SD) SDCARD_CLK I/O O SD card clock data SDCARD_CMD
4 I/O I/O (open drain)
SDCARD_DATA0 I/O I/O SD card data SDCARD_IRQ 53 I/O I Interrupt from SD card (3) Parallel interface (8-bit π) pXCLK (XVCLK) 4 I/O O Free clock to parallel camera pVS (VSYNC) 9 I/O I Parallel camera vertical sync pHS (HSYNC) 10 I/O I Parallel camera horizontal sync pDATA8 (CAM_D4) 5 I/O I Parallel camera data bit 4 pDATA9 (CAM_D5) 6 I/O I Parallel camera data bit 5 pDATA10 (CAM_D6) 7 I/O I Parallel camera data bit 6 pDATA11 (CAM_D7) 8 I/O I Parallel camera data bit 7 pCLK (PIXCLK) 46 I/O I Pixel clock from parallel camera sensor pDATA7 (CAM_D3) 48 I/O I Parallel camera data bit 3 pDATA6 (CAM_D2) 49 I/O I Parallel camera data bit 2 pDATA5 (CAM_D1) 50 I I Parallel camera data bit 1 pDATA4 (CAM_D0) 51 I/O I Parallel camera data bit 0 Power VBAT1 37 — — Power supply for the module VBAT2 40 — — Power supply for the module RF (4) RF_ABG 31 I/O I WLAN analog RF 802.11 a/b/g/n bands SPI GSPI_CLK 5 I/O I/O General SPI clock GSPI_MISO
42 I/O I/O
GSPI_CS GSPI_MOSI 7 I/O I/O General SPI MOSI FLASH SPI FLASH_SPI_CLK 15 O O Clock to SPI serial flash (fixed default) FLASH_SPI_DOUT 17 O O Data to SPI serial flash (fixed default) FLASH_SPI_DIN 13 I I Data from SPI serial flash (fixed default) FLASH_SPI_CS 14 O O Device select to SPI serial flash (fixed default) www.ti.com CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 35 Product Folder Links: CC3235MODS CC3235MODSF CC3235MODAS CC3235MODASF
Table 6-2. Signal Descriptions (continued) FUNCTION SIGNAL NAME PIN NO. PIN TYPE SIGNAL DIRECTION DESCRIPTION UART UART1_TX
3 I/O O
7 I/O O
12 I/O O
46 I/O O
48 I/O O UART1 TX data
UART1_RX
4 I/O I
47 I/O I
49 I/O I
UART1_RTS
44 I/O O
UART1 request-to-send (active low)
52 I/O O
UART1_CTS 51 I/O I UART1 clear-to-send (active low) UART0_TX UART0_RX
10 I/O I UART0 RX data
47 I/O I UART0 RX data
UART0_CTS I/O I UART0 clear-to-send input (active low) UART0_RTS UART0 request-to-send (active low)51 I/O O SOP2 23 (5) O I Sense-on-power 2 SOP1 24 I I Configuration sense-on-power 1 SOP0 34 I I Configuration sense-on-power 0 (1) LPDS retention is unavailable. (2) The CC3235MODx or CC3235MODAx modules are compatible with TI BLE modules using an external RF switch. (3) Future support. (4) This pin is not accessible on the CC3235MODAx devices as it is directly tied to the integrated antenna. (5) This pin has dual functions: as a SOP[2] (device operation mode), and as an external TCXO enable. As a TXCO enable, the pin is an output on power up and driven logic high. During hibernate low-power mode, the pin is in a Hi-Z state but is pulled down for SOP mode to disable TCXO. Because of the SOP functionality, the pin must be used as an output only. CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 www.ti.com
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6.4 Drive Strength and Reset States for Analog-Digital Multiplexed Pins
Table 6-3 describes the use, drive strength, and default state of analog- and digital-multiplexed pins at first-time power up and reset (nRESET pulled low). Table 6-3. Drive Strength and Reset States for Analog-Digital Multiplexed Pins PIN BOARD LEVEL CONFIGURATION AND USE DEFAULT STATE AT FIRST POWER UP OR FORCED RESET STATE AFTER CONFIGURATION OF ANALOG SWITCHES (ACTIVE, LPDS, and HIB POWER MODES) MAXIMUM EFFECTIVE DRIVE STRENGTH (mA) 42 Generic I/O Analog is isolated. The digital I/O cell is also isolated. Determined by the I/O state, as are other digital I/Os. 4 44 Generic I/O Analog is isolated. The digital I/O cell is also isolated. Determined by the I/O state, as are other digital I/Os. 4 47 Analog signal (1.8-V absolute, 1.46-V full scale) ADC is isolated. The digital I/O cell is also isolated. Determined by the I/O state, as are other digital I/Os. 4 48 Analog signal (1.8-V absolute, 1.46-V full scale) ADC is isolated. The digital I/O cell is also isolated. Determined by the I/O state, as are other digital I/Os. 4 49 Analog signal (1.8-V absolute, 1.46-V full scale) ADC is isolated. The digital I/O cell is also isolated. Determined by the I/O state, as are other digital I/Os. 4 50 Analog signal (1.8-V absolute, 1.46-V full scale) ADC is isolated. The digital I/O cell is also isolated. Determined by the I/O state, as are other digital I/Os. 4
6.5 Pad State After Application of Power to Chip, but Before Reset Release
When a stable power is applied to the CC3235MODx or CC3235MODAx module for the first time or when supply voltage is restored to the proper value following a prior period with supply voltage below 1.5 V, the level of the digital pads are undefined in the period starting from the release of nRESET and until the DIG_DCDC of the CC3235x chip powers up. This period is less than approximately 10 ms. During this period, pads can be internally pulled weakly in either direction. If a certain set of pins are required to have a definite value during this pre-reset period, an appropriate pullup or pulldown must be used at the board level. The recommended value of these external pullup or pulldown resistors is 2.7 kΩ.
6.6 Connections for Unused Pins
All unused pin should be configured as stated in Table 6-4. Table 6-4. Connections for Unused Pins FUNCTION SIGNAL DESCRIPTION PIN NUMBER ACCEPTABLE PRACTICE GPIO General-purpose input or output Wake up I/O source should not be floating during hibernate. All the I/O pins will float while in Hibernate and Reset states. Ensure pullup and pulldown resistors are available on board to maintain the state of the I/O. Leave unused GPIOs as NC No Connect NC 20, 31(1), 33, 39, 41, 45 Unused pin, leave as NC. SOP Configuration sense-on-power 23, 24, 34 Leave as NC (Modules contain internal 100-kΩ pulldown resistors on the SOP lines). An external 10-kΩ pullup resistor is required to pull these pins high. See Section 8.11.1 for SOP[2:0] configuration modes. Reset RESET input for the device Never leave the reset pin floating JTAG JTAG interface Leave as NC if unused (1) The CC3235MODAx's RF_ABG pin is a NC as it is directly tied to the integrated PCB antenna. www.ti.com CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 37 Product Folder Links: CC3235MODS CC3235MODSF CC3235MODAS CC3235MODASF
7 Specifications
7.1 Absolute Maximum Ratings
All measurements are referenced at the module pins unless otherwise indicated. All specifications are over process and voltage unless otherwise indicated. Over operating free-air temperature range (unless otherwise noted)(1) (2) MIN MAX UNIT VBAT –0.5 3.8 V Digital I/O –0.5 VBAT + 0.5 V RF pin –0.5 2.1 V Analog pins –0.5 2.1 V Operating temperature (TA) –40 85 °C Storage temperature (Tstg) –40 85 °C Junction temperature (Tj)(3) 120 °C (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) All voltage values are with respect to VSS, unless otherwise noted. (3) Junction temperature is for the CC3235x device that is contained within the module.
7.2 ESD Ratings
VESD Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS001(1) ±2000 VCharged device model (CDM), per JESD22-C101(2) All pins ±500 (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
Over operating free-air temperature range (unless otherwise noted)(2) (1) (3) MIN TYP MAX UNIT VBAT 2.3 3.3 3.6 V Operating temperature –40 25 85 °C Ambient thermal slew –20 20 °C/minute (1) When operating at an ambient temperature of over 75°C, the transmit duty cycle must remain below 50% to avoid the auto-protect feature of the power amplifier. If the auto-protect feature triggers, the device takes a maximum of 60 seconds to restart the transmission. (2) To ensure WLAN performance, the ripple on the power supply must be less than ±300 mV. The ripple should not cause the supply to fall below the brownout voltage. (3) The minimum voltage specified includes the ripple on the supply voltage and all other transient dips. The brownout condition is also 2.1 V, and care must be taken when operating at the minimum specified voltage. CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 www.ti.com
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7.4 Current Consumption (CC3235MODS and CC3235MODAS)
Table 7-1. Current Consumption Summary (CC3235MODS and CC3235MODAS) 2.4GHz RF Band TA = 25°C, VBAT = 3.6 V PARAMETER TEST CONDITIONS(1) (5) MIN TYP(6) MAX UNIT MCU ACTIVE NWP ACTIVE TX
1 DSSS
TX power level = 0 272 mA TX power level = 4 190
6 OFDM
TX power level = 0 248 TX power level = 4 182
54 OFDM
TX power level = 0 223 TX power level = 4 160 RX
1 DSSS 59
54 OFDM 59
NWP idle connected(3) 15.3 MCU SLEEP NWP ACTIVE TX TX power level = 0 269 mA TX power level = 4 187 TX power level = 0 245 TX power level = 4 179 TX power level = 0 220 TX power level = 4 157 RX
1 DSSS 56
54 OFDM 56
NWP idle connected(3) 12.2 MCU LPDS NWP ACTIVE TX TX power level = 0 266 mA TX power level = 4 184 TX power level = 0 242 TX power level = 4 176 TX power level = 0 217 TX power level = 4 154 RX
1 DSSS 53
54 OFDM 53
NWP LPDS(2) SRAM Retention
64 KB 120
µA256 KB 135 NWP idle connected(3) 710 MCU SHUTDOWN MCU shutdown 1 µA MCU HIBERNATE MCU hibernate 5.5 µA Peak calibration current(4) VBAT = 3.6 V 420 mAVBAT = 3.3 V 450 VBAT = 2.3 V 610 (1) TX power level = 0 implies maximum power (see Figure 7-1, Figure 7-2, and Figure 7-3). TX power level = 4 implies output power backed off approximately 4 dB. (2) LPDS current does not include the external serial flash. The CC3235MODS and CC3235MODAS device can be configured to retain 0 KB, 64 KB, 128 KB, 192 KB, or 256 KB of SRAM in LPDS. Each 64-KB block of MCU retained SRAM increases LPDS current by 4 µA. (3) DTIM = 1 (4) The complete calibration can take up to 17 mJ of energy from the battery over a time of 24 ms. In default mode, calibration is performed sparingly, and typically occurs when re-enabling the NWP and when the temperature has changed by more than 20°C. There are two additional calibration modes that may be used to reduced or completely eliminate the calibration event. For further details, see CC31xx, CC32xx SimpleLink™ Wi-Fi® and IoT Network Processor Programmer's Guide. (5) The CC3235MODS and CC3235MODAS system is a constant power-source system. The active current numbers scale based on the VBAT voltage supplied. www.ti.com CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 39 Product Folder Links: CC3235MODS CC3235MODSF CC3235MODAS CC3235MODASF
(6) Typical numbers assume a VSWR of 1.5:1. Table 7-2. Current Consumption Summary (CC3235MODS and CC3235MODAS) 5 GHz RF Band TA = 25°C, VBAT = 3.6 V PARAMETER TEST CONDITIONS(1) (4) MIN TYP(5) MAX UNIT MCU ACTIVE NWP ACTIVE TX
6 OFDM 318
54 OFDM 293
NWP idle connected(3) 15.3 MCU SLEEP NWP ACTIVE TX
6 OFDM 315
54 OFDM 290
NWP idle connected(3) 12.2 MCU LPDS NWP ACTIVE TX
6 OFDM 312
NWP LPDS(2) SRAM Retention µA256 KB 135 NWP idle connected(3) 710 MCU SHUTDOWN MCU shutdown 1 µA MCU HIBERNATE MCU hibernate 5.5 µA Peak calibration current(6) VBAT = 3.6 V 290 mA VBAT = 3.3 V 310 VBAT = 2.7 V 310 VBAT = 2.3 V 365 (1) Measurements taken at maximum TX power (2) LPDS current does not include the external serial flash. The CC3235MODx and CC3235MODAx can be configured to retain 0 KB, 64 KB, 128 KB, 192 KB, or 256 KB of SRAM in LPDS. Each 64-KB block of MCU retained SRAM increases LPDS current by 4 µA. (3) DTIM = 1 (4) The CC3235MODx and CC3235MODAx system is a constant power-source system. The active current numbers scale based on the VBAT voltage supplied. (5) Typical numbers assume a VSWR of 1.5:1. (6) The complete calibration can take up to 17 mJ of energy from the battery over a time of 24 ms. In default mode, calibration is performed sparingly, and typically occurs when re-enabling the NWP and when the temperature has changed by more than 20°C. There are two additional calibration modes that may be used to reduced or completely eliminate the calibration event. For further details, see CC31xx, CC32xx SimpleLink™ Wi-Fi® and IoT Network Processor Programmer's Guide. CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 www.ti.com
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7.5 Current Consumption (CC3235MODSF and CC3235MODASF)
Table 7-3. Current Consumption Summary (CC3235MODSF and CC3235MODASF) 2.4GHz RF Band TA = 25°C, VBAT = 3.6 V PARAMETER TEST CONDITIONS(1) (5) MIN TYP(5) MAX UNIT MCU ACTIVE NWP ACTIVE TX TX power level = 0 286 mA TX power level = 4 202 TX power level = 0 255 TX power level = 4 192 TX power level = 0 232 TX power level = 4 174 RX
1 DSSS 74
54 OFDM 74
NWP idle connected(3) 25.2 MCU SLEEP NWP ACTIVE TX TX power level = 0 282 mA TX power level = 4 198 TX power level = 0 251 TX power level = 4 188 TX power level = 0 228 TX power level = 4 170 RX
1 DSSS 70
54 OFDM 70
NWP idle connected(3) 21.2 MCU LPDS NWP active TX TX power level = 0 266 mA TX power level = 4 184 TX power level = 0 242 TX power level = 4 176 TX power level = 0 217 TX power level = 4 154 RX NWP LPDS(2) SRAM Retention µA256 KB 135 NWP idle connected(3) 710 MCU SHUTDOWN MCU shutdown 1 µA MCU HIBERNATE MCU hibernate 5.5 µA Peak calibration current(4) VBAT = 3.6 V 420 mAVBAT = 3.3 V 450 VBAT = 2.3 V 610 (1) TX power level = 0 implies maximum power (see Figure 7-2, Figure 7-2, and Figure 7-3). TX power level = 4 implies output power backed off approximately 4dB. (2) LPDS current does not include the external serial flash. The CC3235MODx and CC3235MODAx can be configured to retain 0KB, 64KB, 128KB, 192KB, or 256KB of SRAM in LPDS. Each 64-KB block of MCU retained SRAM increases LPDS current by 4µA. (3) DTIM = 1 (4) The complete calibration can take up to 17 mJ of energy from the battery over a period of 24 ms. Calibration is performed sparingly, typically when coming out of HIBERNATE, and only if the temperature has changed by more than 20°C. The calibration event can be controlled by a configuration file in the serial flash. (5) Typical numbers assume a VSWR of 1.5:1. www.ti.com CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 41 Product Folder Links: CC3235MODS CC3235MODSF CC3235MODAS CC3235MODASF
Table 7-4. Current Consumption Summary (CC3235MODS and CC3235MODAS) 5 GHz RF Band TA = 25°C, VBAT = 3.6 V PARAMETER TEST CONDITIONS(1) (4) MIN TYP(4) MAX UNIT MCU ACTIVE NWP ACTIVE TX
6 OFDM 329
54 OFDM 306
NWP idle connected(3) 25.2 MCU SLEEP NWP ACTIVE TX
6 OFDM 325
54 OFDM 302
NWP idle connected(3) 21.2 MCU LPDS NWP active TX NWP LPDS(2) SRAM Retention µA256 KB 135 NWP idle connected(3) 710 MCU SHUTDOWN MCU shutdown 1 µA MCU HIBERNATE MCU hibernate 5.5 µA Peak calibration current(5) VBAT = 3.6 V 290 mAVBAT = 3.3 V 310 VBAT = 2.7 V 310 VBAT = 2.3 V 333 (1) Measurements taken at maximum TX power (2) LPDS current does not include the external serial flash. The CC3235MODS and CC3235MODAS can be configured to retain 0 KB, 64 KB, 128 KB, 192 KB, or 256 KB of SRAM in LPDS. Each 64-KB block of MCU retained SRAM increases LPDS current by 4 µA. (3) DTIM = 1 (4) Typical numbers assume a VSWR of 1.5:1. (5) The complete calibration can take up to 17 mJ of energy from the battery over a period of 24 ms. Calibration is performed sparingly, typically when coming out of HIBERNATE and only if temperature has changed by more than 20°C. The calibration event can be controlled by a configuration file in the serial flash. CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 www.ti.com
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7.6 TX Power Control for 2.4 GHz Band The CC3235MODS and CC3235MODAS has several options for modifying the output power of the device when required. For the 2.4 GHz band it is possible to lower the overall output power at a global level using the global TX power level setting. In addition, the 2.4 GHz band allows the user to enter additional back-offs 2, per channel, region 3and modulation rates 4 5, through Image creator (see the Uniflash with Image Creator User Guide for more details). Figure 7-1 , Figure 7-2 , and Figure 7-3 show TX power and IBAT versus TX power level settings for the CC3235MODS module at modulations of 1 DSSS, 6 OFDM, and 54 OFDM, respectively. For the CC3235MODSF module, the IBAT current has an increase of approximately 10 mA to 15 mA depending on the transmitted rate. The TX power level remains the same.4 In Figure 7-1, the area enclosed in the circle represents a significant reduction in current during transition from TX power level 3 to level 4. In the case of lower range requirements (14-dBm output power), TI recommends using TX power level 4 to reduce the current. TX power level setting TX Power (dBm) 19.00 17.00 15.00 13.00 11.00 9.00 7.00 5.00 3.00 1.00 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 280.00 264.40 249.00 233.30 218.00 202.00 186.70 171.00 155.60 140.00 IBAT (VBAT @ 3.6 V)(mAmp) Color by TX Power (dBm) IBAT (VBAT @ 3.6 V) Figure 7-1. TX Power and IBAT vs TX Power Level Settings (1 DSSS) 2 The back-off range is between –6 dB to +6 dB in 0.25-dB increments. 3 FCC, IC/ISED, ETSI/CE, MIC, and SRRC are supported. 4 Back-off rates are grouped into 11b rates, high modulation rates (MCS7, 54 OFDM and 48 OFDM), and lower modulation rates (all other rates). 5 There will be a difference between the CC3135MOD and CC3135 IC TX power levels. www.ti.com CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 43 Product Folder Links: CC3235MODS CC3235MODSF CC3235MODAS CC3235MODASF
TX Power (dBm) 19.00 17.00 15.00 13.00 11.00 9.00 7.00 5.00 3.00 1.00 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 IBAT (VBAT @ 3.6 V)(mAmp) 280.00 264.40 249.00 233.30 218.00 202.00 186.70 171.00 155.60 140.00 TX Power (dBm) IBAT (VBAT @ 3.6 V) Figure 7-2. TX Power and IBAT vs TX Power Level Settings (6 OFDM) TX power level setting TX Power (dBm) 19.00 17.00 15.00 13.00 11.00 9.00 7.00 5.00 3.00 1.00 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 280.00 264.40 249.00 233.30 218.00 202.00 186.70 171.00 155.60 140.00 IBAT (VBAT @ 3.6 V)(mAmp) Color by TX Power (dBm) IBAT (VBAT @ 3.6 V) Figure 7-3. TX Power and IBAT vs TX Power Level Settings (54 OFDM) CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 www.ti.com
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7.7 TX Power Control for 5 GHz
5GHz power control is done via Image Creator where the maximum transmit power is provided 6. Within Image Creator, power control is possible per channel, region 7, and modulation rate 8. In addition, it is possible to enter an additional back-off 9factor per channel and modulation rate for further margin to regulatory requirements. It is also possible to set the TX and RX trace losses to the antenna per band 10. The peak antenna gain 11can also be provided, thus allowing further control. For a full description of options and capabilities see Uniflash with Image Creator User Guide.
7.8 Brownout and Blackout Conditions
The module enters a brownout condition whenever the input voltage dips below V BROWNOUT (see Figure 7-4 and Figure 7-5). This condition must be considered during design of the power supply routing, especially if operating from a battery. High-current operations, such as a TX packet or any external activity (not necessarily related directly to networking) can cause a drop in the supply voltage, potentially triggering a brownout. The resistance includes the internal resistance of the battery, contact resistance of the battery holder (four contacts for a 2× AA battery), and the wiring and PCB routing resistance. Note When the module is in HIBERNATE state, brownout is not detected. Only blackout is in effect during HIBERNATE state. 6 The maximum transmit power range is 18 dBm to 0.125 dBm in 0.125-dBm decrements. 7 FCC, IC/ISED, ETSI/CE, MIC, and SRRC are supported. 8 Rates are grouped into high modulation rates (MCS7, 54 OFDM and 48 OFDM) and lower modulation rates (all other rates). 9 The back-off range is 0 dBm to 18 dBm in 0.125-dBm increments, with the maximum back-off not exceed that of the maximum transmit power. 10 The range of losses if from 0 dBm to 7.75 dBm in 0.125-dBm increments. 11 The antenna gain has a range of -2 dBi to 5.75 dBi in 0.125-dBi increments. www.ti.com CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 45 Product Folder Links: CC3235MODS CC3235MODSF CC3235MODAS CC3235MODASF
Figure 7-4. Brownout and Blackout Levels (1 of 2) Figure 7-5. Brownout and Blackout Levels (2 of 2) In the brownout condition, all sections of the device shut down within the module except for the Hibernate block (including the 32-kHz RTC clock), which remains on. The current in this state can reach approximately 400 µA. The blackout condition is equivalent to a hardware reset event in which all states within the module are lost. Vbrownout = 2.1 V and Vblackout = 1.67 V Table 7-5 lists the brownout and blackout voltage levels. Table 7-5. Brownout and Blackout Voltage Levels CONDITION VOLTAGE LEVEL UNIT Vbrownout 2.1 V Vblackout 1.67 V CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 www.ti.com
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7.9 Electrical Characteristics for GPIO Pins
Table 7-6. GPIO Pins Except 25, 26, 42, and 44 (25°C) (1) TA = 25°C, VBAT = 3.3 V PARAMETER TEST CONDITIONS MIN NOM MAX UNIT CIN Pin capacitance 4 pF VIH High-level input voltage 0.65 × VDD VDD + 0.5 V V VIL Low-level input voltage –0.5 0.35 × VDD V IIH High-level input current 5 nA IIL Low-level input current 5 nA VOH High-level output voltage IL = 2 mA; configured I/O drive strength = 2 mA; 2.4 V ≤ VDD < 3.6 V VDD × 0.8 V IL = 4 mA; configured I/O drive strength = 4 mA; 2.4 V ≤ VDD < 3.6 V VDD × 0.7 IL = 6 mA; configured I/O drive strength = 6 mA; 2.4 V ≤ VDD < 3.6 V VDD × 0.7 IL = 2 mA; configured I/O drive strength = 2 mA; 2.3 V ≤ VDD < 2.4 V VDD × 0.75 VOL Low-level output voltage IL = 2 mA; configured I/O drive strength = 2 mA; 2.4 V ≤ VDD < 3.6 V VDD × 0.2 V IL = 4 mA; configured I/O drive strength = 4 mA; 2.4 V ≤ VDD < 3.6 V VDD × 0.2 IL = 6 mA; configured I/O drive strength = 6 mA; 2.4 V ≤ VDD < 3.6 V VDD × 0.2 IL = 2 mA; configured I/O drive strength = 2 mA; 2.3 V ≤ VDD < 2.4 V VDD × 0.25 IOH High-level source current, 2-mA drive 2 mA4-mA drive 4 6-mA drive 6 IOL Low-level sink current, 2-mA drive 2 mA4-mA drive 4 6-mA drive 6 (1) TI recommends using the lowest possible drive strength that is adequate for the applications. This recommendation minimizes the risk of interference to the WLAN radio and reduces any potential degradation of RF sensitivity and performance. The default drive strength setting is 6 mA. www.ti.com CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 47 Product Folder Links: CC3235MODS CC3235MODSF CC3235MODAS CC3235MODASF
Table 7-7. GPIO Pins 25, 26, 42, and 44 (25°C) (1) PARAMETER TEST CONDITIONS MIN NOM MAX UNIT CIN Pin capacitance 7 pF VIH High-level input voltage 0.65 × VDD VDD + 0.5 V V VIL Low-level input voltage –0.5 0.35 × VDD V IIH High-level input current 50 nA IIL Low-level input current 50 nA VOH High-level output voltage IL = 2 mA; configured I/O drive strength = 2 mA; 2.4 V ≤ VDD < 3.6 V VDD × 0.8 V IL = 4 mA; configured I/O drive strength = 4 mA; 2.4 V ≤ VDD < 3.6 V VDD × 0.7 IL = 6 mA; configured I/O drive strength = 6 mA; 2.4 V ≤ VDD < 3.6 V VDD × 0.7 IL = 2 mA; configured I/O drive strength = 2 mA; 2.3 V ≤ VDD < 2.4 V VDD × 0.75 VOL Low-level output voltage IL = 2 mA; configured I/O drive strength = 2 mA; 2.4 V ≤ VDD < 3.6 V VDD × 0.2 V IL = 4 mA; configured I/O drive strength = 4 mA; 2.4 V ≤ VDD < 3.6 V VDD × 0.2 IL = 6 mA; configured I/O drive strength = 6 mA; 2.4 V ≤ VDD < 3.6 V VDD × 0.2 IL = 2 mA; configured I/O drive strength = 2 mA; 2.3 V ≤ VDD < 2.4 V VDD × 0.25 IOH High-level source current, VOH = 2.4 2-mA drive 1.5 mA4-mA drive 2.5 6-mA drive 3.5 IOL Low-level sink current, 2-mA drive 1.5 mA4-mA drive 2.5 6-mA drive 3.5 VIL nRESET 0.6 V (1) TI recommends using the lowest possible drive strength that is adequate for the applications. This recommendation minimizes the risk of interference to the WLAN radio and reduces any potential degradation of RF sensitivity and performance. The default drive strength setting is 6 mA.
7.9.1 Electrical Characteristics for Pin Internal Pullup and Pulldown (25°C)
PARAMETER TEST CONDITIONS MIN NOM MAX UNIT IOH Pullup current (VDD = 3.0 V) 10 µA IOL Pulldown current (VDD = 3.0 V) 10 µA CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 www.ti.com
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7.10 CC3235MODAx Antenna Characteristics
TA = 25°C PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Polarization Linear Peak Gain 2.4 GHz Band 3.5 dBi 5 GHz Band 4.5 dBi Efficiency
2.4 GHz Band 70%
5 GHz Band 65%
7.11 WLAN Receiver Characteristics
Table 7-8. WLAN Receiver Characteristics: 2.4 GHz Band TA = 25°C, VBAT = 2.3 V to 3.6 V. Parameters are measured at the SoC pin on channel 6 (2437 MHz). PARAMETER TEST CONDITIONS (Mbps) MIN TYP MAX UNIT Sensitivity (8% PER for 11b rates, 10% PER for 11g/11n rates)(1) 1 DSSS –94.5 dBm 2 DSSS –92.5 11 CCK –86.5
6 OFDM –89
9 OFDM –88.5
18 OFDM –85
36 OFDM –79
54 OFDM –73
MCS7 (GF)(2) –70 Maximum input level (10% PER) 802.11b –2.5 dBm 802.11g –8.5 (1) Sensitivity is 1-dB worse on channel 13 (2472 MHz). (2) Sensitivity for mixed mode is 1-dB worse. Table 7-9. WLAN Receiver Characteristics: 5 GHz Band TA = 25°C, VBAT = 2.3 V to 3.6 V. PARAMETER TEST CONDITIONS (Mbps) MIN TYP MAX UNIT Sensitivity (10% PER for 11g/11n rates)
6 OFDM -89
9 OFDM -88
18 OFDM -85
36 OFDM -78.5
54 OFDM -72
MCS7 (GF)(1) -68 Maximum input level 802.11a -17 dBm (1) Sensitivity for mixed mode is 1-dB worse. www.ti.com CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 49 Product Folder Links: CC3235MODS CC3235MODSF CC3235MODAS CC3235MODASF
7.12 WLAN Transmitter Characteristics
Table 7-10. WLAN Transmitter Characteristics: 2.4 GHz Band TA = 25°C, VBAT = 2.3 V to 3.6 V.(1) Parameters measured at SoC pin on channel 6 (2437 MHz).(2) (3) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Operating frequency range(4) (5) 2412 2472 MHz Maximum RMS output power measured at 1 dB from IEEE spectral mask or EVM
1 DSSS 16
2 DSSS 16
11 CCK 16.3 6 OFDM 15.3 9 OFDM 15.3
18 OFDM 15
36 OFDM 14
54 OFDM 12.5 MCS7 11 Transmit center frequency accuracy –25 25 ppm (1) Transmit power will be reduced by 1.5dB for VBAT < 2.8V (2) The 11g/n low rates on edge channels (2412 and 2462 MHz) have reduced TX power to meet FCC emission limits. (3) Power of 802.11b rates are reduced to meet ETSI requirements in Europe. (4) Channels 1 (2142 MHz) through 11 (2462 MHz) are supported for FCC. (5) Channels 1 (2142 MHz) through 13 (2472MHz) are supported for Europe and Japan. Note that channel 14 is not supported for Japan. Table 7-11. WLAN Transmitter Characteristics: 5GHz Band TA = 25°C, VBAT = 2.3 V to 3.6V.(1) Parameters measured at SoC pin are the average of channels 40, 56, 120, and 157.(5) (6) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Operating frequency range(2) (3) (4) 5180 5825 MHz Maximum RMS output power measured at 1 dB from IEEE spectral mask or EVM 6 OFDM 15.1 dBm 9 OFDM 15.1 18 OFDM 15.1 36 OFDM 13.6
54 OFDM 12
Transmit center frequency accuracy -20 20 ppm (1) Transmit power will be reduced by 1.5dB for VBAT < 2.8V (2) FCC band covers U-NII-1, U-NII-2A, U-NII-2C, and U-NII-3 20MHz BW modulations. (3) Europe bands 1, 2, and 3, 20MHz BW modulations are supported. (4) For Japan, W52, W53 and W56, 20MHz BW modulations are supported. (5) FCC channels 36, 60, 64, 100, and 140, where harmonics/subharmonics of fall in the FCC restricted band, have reduced output power to meet the FCC RSE requirement. (6) The edge channels (100 and 140) have reduced TX power to meet FCC emissions limits. CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 www.ti.com
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7.13 BLE and WLAN Coexistence Requirements
For proper BLE and WLAN 2.4GHz radio coexistence, the following requirements must be met: Table 7-12. BLE/WLAN Coex (1) Isolation Requirement PARAMETER Band MIN TYP MAX UNIT Port-to-port isolation Dual antenna configuration(2) 20(3) dB (1) The CC3235MODS and CC3235MODAS modules are compatible with TI BLE modules using an external RF switch. (2) A single antenna configuration is possible using the CC3x35 devices. (3) For dual antenna configuration, the antenna placement must be such that isolation between the BLE and WLAN ports is at least 20dB.
7.14 Reset Requirement
PARAMETER MIN TYP MAX UNIT VIH Operation mode level 0.65 × VBAT V VIL Shutdown mode level(1) 0 0.6 V Minimum time for nReset low for resetting the module 5 ms Tr and Tf Rise and fall times 20 µs (1) The nRESET pin must be held below 0.6V for the module to register a reset.
7.15 Thermal Resistance Characteristics for MOB and MON Packages
NO. PARAMETER DESCRIPTION °C/W(1) (2) AIR FLOW (m/s)(3) T1 RΘJC Junction-to-case 11.4 N/A T2 RΘJB Junction-to-board 8.0 N/A RΘJA Junction-to-free air 19.1 0 Junction-to-moving air 14.7 1 T5 13.4 2 T6 12.5 3 ΨJT Junction-to-free air 5.4 0 Junction-to-package top 5.8 1 T9 6.1 2 T10 6.5 3 T11 ΨJB Junction-to-free air 6.8 0 T12 Junction-to-board 6.6 1 T13 6.6 2 T14 6.5 3 (1) °C/W = degrees Celsius per watt. (2) These values are based on a JEDEC-defined 2S2P system (with the exception of the Theta JC [RΘJC] value, which is based on a JEDEC-defined 1S0P system) and will change based on the environment as well as application. For more information, see these EIA/JEDEC standards:
- JESD51-2, Integrated Circuits Thermal Test Method Environmental Conditions - Natural Convection (Still Air)
- JESD51-3, Low Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages
- JESD51-7, High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages
- JESD51-9, Test Boards for Area Array Surface Mount Package Thermal Measurements Power dissipation of 2W and an ambient temperature of 70°C is assumed. (3) m/s = meters per second. www.ti.com CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 51 Product Folder Links: CC3235MODS CC3235MODSF CC3235MODAS CC3235MODASF
7.16 Timing and Switching Characteristics
7.16.1 Power-Up Sequencing
For proper start-up of the CC3235MODx and CC3235MODAx module, perform the recommended power-up sequencing as follows: 1. Tie VBAT1 (pin 37) and VBAT2 (pin 40) together on the board. 2. Hold the nRESET pin low while the supplies are ramping up. Figure 7-6 shows the reset timing diagram for the first-time power-up and reset removal. POWER OFF HW INIT FW INIT APP CODE EXECUTION VBAT nRESET STATE T1 T2 T3 RESET 32-kHz RTC CLK APP CODE LOAD Figure 7-6. First-Time Power-Up and Reset Removal Timing Diagram Table 7-13 lists the timing requirements for the first-time power-up and reset removal. Table 7-13. First-Time Power-Up and Reset Removal Timing Requirements ITEM NAME DESCRIPTION MIN TYP MAX UNIT T1 nReset time nReset timing after VBAT supplies are stable 1 ms T2 Hardware wake-up time 25 ms Time taken by ROM firmware to initialize hardware Includes internal 32kHz XOSC settling time 1.1 s App code load time for CC3235MODS and CC3235MODAS CC3235MODS and CC3235MODAS Image size (KB) × 1.7 ms App code load time for CC3235MODSF and CC3235MODASF CC3235MODSF and CC3235MODASF Image size (KB) × 0.06 ms
7.16.2 Power-Down Sequencing
For proper power down of the CC3235MODx and CC3235MODAx module, ensure that the nRESET (pin 35) and nHIB (pin 4) pins have remained in a known state for a minimum of 200ms before removing power from the module.
7.16.3 Device Reset
When a device restart is required, issue a negative pulse to the nRESET pin. Ensure the reset is properly applied: A negative reset pulse (on pin 35) of at least 200mS duration. CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 www.ti.com
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7.16.4 Wake Up From Hibernate Timing
Table 7-14 lists the software hibernate timing requirements. Note The internal 32.768kHz crystal is kept enabled by default when the module goes to hibernate. Table 7-14. Software Hibernate Timing Requirements ITEM NAME DESCRIPTION MIN TYP MAX UNIT THIB_MIN Minimum hibernate time 10 ms Twake_from_hib (1) Hardware wakeup time plus firmware initialization time 50(2) ms T_APP_CODE_LOAD App code load time for CC3235MODS and CC3235MODAS CC3235MODS and CC3235MODAS Image size (KB) × 1.7 ms App code load time for CC3235MODSF and CC3235MODASF CC3235MODSF and CC3235MODASF Image size (KB) × 0.06 ms (1) Twake_from_hib can be 200ms on rare occasions when calibration is performed. Calibration is performed sparingly, typically when exiting Hibernate, and only if temperature has changed by more than 20°C or more than 24 hours have elapsed since a prior calibration. (2) Wake-up time can extend to 75ms if a patch is downloaded from the serial flash. Figure 7-7 shows the timing diagram for wake up from the hibernate state. Hibernate HW WAKEUP FW INIT APP CODE LOAD EXECUTIONACTIVE Application software requests entry to hibernate moade VBAT nRESET STATE 32-kHz RTC CLK THIB_MIN Twake_from_hib TAPP_CODE_LOAD Figure 7-7. Wake Up From Hibernate Timing Diagram www.ti.com CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 53 Product Folder Links: CC3235MODS CC3235MODSF CC3235MODAS CC3235MODASF
7.16.5 Peripherals Timing
This section describes the peripherals that are supported by the CC3235MODx and CC3235MODAx module, as follows:
- SPI
- I2S
- GPIOs
- I2C
- IEEE 1149.1 JTAG
- ADC
- Camera parallel port
- External flash
- UART
- SD Host
- Timers
7.16.5.1 SPI
7.16.5.1.1 SPI Master
The CC3235MODx and CC3235MODAx MCU includes one SPI module, which can be configured as a master or slave device. The SPI includes a serial clock with programmable frequency, polarity, and phase; a programmable timing control between chip select and external clock generation; and a programmable delay before the first SPI word is transmitted. Slave mode does not include a dead cycle between two successive words. Figure 7-8 shows the timing diagram for the SPI master. T6 T7 CLK MISO MOSI Figure 7-8. SPI Master Timing Diagram Table 7-15 lists the timing parameters for the SPI master. Table 7-15. SPI Master Timing Parameters ITEM NAME DESCRIPTION MIN MAX UNIT F(1) Clock frequency 20 MHz T2 Tclk (1) Clock period 50 ns D(1) Duty cycle 45% 55% T6 tIS (1) RX data setup time 1 ns T7 tIH (1) RX data hold time 2 ns T8 tOD (1) TX data output delay 8.5 ns T9 tOH (1) TX data hold time 8 ns (1) The timing parameter assumes a maximum load of 20pF. CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 www.ti.com
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7.16.5.1.2 SPI Slave
Figure 7-9 shows the timing diagram for the SPI slave. T6 T7 CLK MISO MOSI Figure 7-9. SPI Slave Timing Diagram Table 7-16 lists the timing parameters for the SPI slave. Table 7-16. SPI Slave Timing Parameters ITEM NAME DESCRIPTION MIN MAX UNIT F(1) Clock frequency @ VBAT = 3.3V 20 MHz Clock frequency @ VBAT ≤ 2.3V 12 T2 Tclk (1) Clock period 50 ns D(1) Duty cycle 45% 55% T6 tIS (1) RX data setup time 4 ns T7 tIH (1) RX data hold time 4 ns T8 tOD (1) TX data output delay 20 ns T9 tOH (1) TX data hold time 24 ns (1) The timing parameter assumes a maximum load of 20pF at 3.3V. www.ti.com CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 55 Product Folder Links: CC3235MODS CC3235MODSF CC3235MODAS CC3235MODASF
7.16.5.2 I2S
The McASP interface functions as a general-purpose audio serial port optimized for multichannel audio applications and supports transfer of two stereo channels over two data pins. The McASP consists of transmit and receive sections that operate synchronously and have programmable clock and frame-sync polarity. A fractional divider is available for bit-clock generation.
7.16.5.2.1 I2S Transmit Mode
Figure 7-10 shows the timing diagram for the I2S transmit mode. T2 T1 T3 McACLKX McAFSX McAXR0/1 Figure 7-10. I2S Transmit Mode Timing Diagram Table 7-17 lists the timing parameters for the I2S transmit mode. Table 7-17. I2S Transmit Mode Timing Parameters ITEM NAME DESCRIPTION MIN MAX UNIT T1 fclk (1) Clock frequency 9.216 MHz T2 tLP (1) Clock low period 1/2 fclk ns T3 tHT (1) Clock high period 1/2 fclk ns T4 tOH (1) TX data hold time 22 ns (1) The timing parameter assumes a maximum load of 20pF.
7.16.5.2.2 I2S Receive Mode
Figure 7-11 shows the timing diagram for the I2S receive mode. T2 T1 T3 McACLKX McAFSX McAXR0/1 Figure 7-11. I2S Receive Mode Timing Diagram Table 7-18 lists the timing parameters for the I2S receive mode. Table 7-18. I2S Receive Mode Timing Parameters ITEM NAME DESCRIPTION MIN MAX UNIT T1 fclk (1) Clock frequency 9.216 MHz T2 tLP (1) Clock low period 1/2 fclk ns T3 tHT (1) Clock high period 1/2 fclk ns T4 tOH (1) RX data hold time 0 ns T5 tOS (1) RX data setup time 15 ns (1) Timing parameter assumes a maximum load of 20pF. CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 www.ti.com
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7.16.5.3 GPIOs
All digital pins of the module can be used as general-purpose input/output (GPIO) pins. The GPIO module consists of four GPIO blocks, each of which provides eight GPIOs. The GPIO module supports 24 programmable GPIO pins, depending on the peripheral used. Each GPIO has configurable pullup and pulldown strength (weak 10µA), configurable drive strength (2, 4, and 6mA), and open-drain enable. Figure 7-12 shows the GPIO timing diagram. SWAS031-067 VDD 80% 20% tGPIOFtGPIOR Figure 7-12. GPIO Timing Diagram Table 7-19 lists the GPIO output transition times for VBAT = 2.3V. Table 7-19. GPIO Output Transition Times (VBAT = 2.3 V) (1) (2) DRIVE STRENGTH (mA) DRIVE STRENGTH CONTROL BITS Tr Tf UNIT MIN NOM MAX MIN NOM MAX 2MA_EN=1 4MA_EN=0 2MA_EN=0 4MA_EN=1 2MA_EN=1 4MA_EN=1 (1) VBAT = 2.3V, T = 25°C, total pin load = 30pF (2) The transition data applies to the pins other than the multiplexed analog-digital pins 25, 26, 42, and 44. Table 7-20 lists the GPIO output transition times for VBAT = 3.3V. Table 7-20. GPIO Output Transition Times (VBAT = 3.3V) (1) (2) DRIVE STRENGTH (mA) DRIVE STRENGTH CONTROL BITS Tr Tf UNIT MIN NOM MAX MIN NOM MAX 2MA_EN=1 4MA_EN=0 2MA_EN=0 4MA_EN=1 2MA_EN=1 4MA_EN=1 (1) VBAT = 3.3V, T = 25°C, total pin load = 30pF (2) The transition data applies to the pins except the multiplexed analog-digital pins 29, 30, 45, 50, 52 and 53. www.ti.com CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 57 Product Folder Links: CC3235MODS CC3235MODSF CC3235MODAS CC3235MODASF
7.16.5.3.1 GPIO Input Transition Time Parameters
Table 7-21 lists the input transition time parameters. Table 7-21. GPIO Input Transition Time Parameters MIN MAX UNIT tr Input transition time (tr, tf), 10% to 90% 1 3 ns tf 1 3 ns
7.16.5.4 I2C
The CC3235MODx and CC3235MODAx MCU includes one I 2C module operating with standard (100kbps) or fast (400kbps) transmission speeds. Figure 7-13 shows the I2C timing diagram. T2 T6 T5 T9T3T8T7T4T1 I2CSCL I2CSDA Figure 7-13. I2C Timing Diagram Table 7-22 lists the I2C timing parameters. Table 7-22. I2C Timing Parameters (3) ITEM NAME DESCRIPTION MIN MAX UNIT T2 tLP Clock low period See (1) System clock T3 tSRT SCL/SDA rise time See (2) ns T4 tDH Data hold time NA T5 tSFT SCL/SDA fall time 3 ns T6 tHT Clock high time See (1) System clock T7 tDS Data setup time tLP/2 System clock T8 tSCSR Start condition setup time 36 System clock T9 tSCS Stop condition setup time 24 System clock (1) This value depends on the value programmed in the clock period register of I2C. Maximum output frequency is the result of the minimal value programmed in this register. (2) Because I2C is an open-drain interface, the controller can drive logic 0 only. Logic is the result of external pullup. Rise time depends on the value of the external signal capacitance and external pullup register. (3) All timing is with a 6mA drive and 20pF load. CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 www.ti.com
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7.16.5.6 ADC
Table 7-24 lists the ADC electrical specifications. See CC32xx ADC Appnote for further information on using the ADC and for application-specific examples. 2 µs 2 µs 2 µs 2 µs 2 µs 2 µs 2 µs 2 µs 2 µs 2 µs Repeats Every 16 µs ADC CLOCK = 10 MHz Sampling 4 cycles SAR Conversion 16 cycles Sampling 4 cycles SAR Conversion 16 cycles Sampling 4 cycles SAR Conversion 16 cycles Sampling 4 cycles SAR Conversion 16 cycles EXT CHANNEL 0 INTERNAL CHANNEL EXT CHANNEL 1 INTERNAL CHANNEL Internal Ch Figure 7-15. ADC Clock Timing Diagram Figure 7-15 shows the ADC clock timing diagram. Table 7-24. ADC Electrical Specifications PARAMETER DESCRIPTION TEST CONDITIONS / ASSUMPTIONS MIN TYP MAX UNIT Nbits Number of bits 12 Bits INL Integral nonlinearity Worst-case deviation from histogram method over full scale (not including first and last three LSB levels) –2.5 2.5 LSB DNL Differential nonlinearity Worst-case deviation of any step from ideal –1 4 LSB Input range 0 1.4 V Driving source impedance 100 Ω FCLK Clock rate Successive approximation input clock rate 10 MHz Input capacitance 12 pF Input impedance ADC Pin 57 2.15 kΩ ADC Pin 58 0.7 ADC Pin 59 2.12 ADC Pin 60 1.17 Number of channels 4 Fsample Sampling rate of each pin 62.5 KSPS F_input_max Maximum input signal frequency 31 kHz SINAD Signal-to-noise and distortion Input frequency DC to 300 Hz and 1.4 Vpp sine wave input 55 60 dB I_active Active supply current Average for analog-to-digital during conversion without reference current 1.5 mA I_PD Power-down supply current for core supply Total for analog-to-digital when not active (this must be the SoC level test) 1 µA Absolute offset error FCLK = 10 MHz ±2 mV Gain error ±2% CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 www.ti.com
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Table 7-24. ADC Electrical Specifications (continued) PARAMETER DESCRIPTION TEST CONDITIONS / ASSUMPTIONS MIN TYP MAX UNIT Vref ADC reference voltage 1.467 V
7.16.5.7 Camera Parallel Port
The fast camera parallel port interfaces with a variety of external image sensors, stores the image data in a FIFO, and generates DMA requests. The camera parallel port supports 8 bits. Figure 7-16 shows the timing diagram for the camera parallel port. pCLK pVS, pHS pDATA T3 T2 T4 T6 T7 Figure 7-16. Camera Parallel Port Timing Diagram Table 7-25 lists the timing parameters for the camera parallel port. Table 7-25. Camera Parallel Port Timing Parameters ITEM NAME DESCRIPTION MIN MAX UNIT pCLK Clock frequency 2 MHz T2 Tclk Clock period 1/pCLK ns T3 tLP Clock low period Tclk/2 ns T4 tHT Clock high period Tclk/2 ns T6 tIS RX data setup time 2 ns T7 tIH RX data hold time 2 ns
7.16.5.8 UART
The CC3235MODx and CC3235MODAx MCU includes two UARTs with the following features:
- Programmable baud-rate generator allowing speeds up to 3Mbps
- Separate 16-bit × 8-bit TX and RX FIFOs to reduce CPU interrupt service loading
- Programmable FIFO length, including a 1-byte-deep operation providing a conventional double-buffered interface
- FIFO trigger levels of 1/8, 1/4, 1/2, 3/4, and 7/8
- Standard asynchronous communication bits for start, stop, and parity
- Generation and detection of line-breaks
- Fully programmable serial interface characteristics: – 5, 6, 7, or 8 data bits – Generation and detection of even, odd, stick, or no-parity bits – Generation of 1 or 2 stop-bits
- RTS and CTS hardware flow support
- Standard FIFO-level and end-of-transmission interrupts
- Efficient transfers using µDMA: – Separate channels for transmit and receive – Receive single request asserted when data is in the FIFO; burst request asserted at programmed FIFO level – Transmit single request asserted when there is space in the FIFO; burst request asserted at programmed FIFO level
- The system clock is used to generate the baud clock. www.ti.com CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 61 Product Folder Links: CC3235MODS CC3235MODSF CC3235MODAS CC3235MODASF
7.16.5.9 External Flash Interface
The CC3235MODx and CC3235MODAx MCU includes the Macronix™ 32-Mbit serial flash. The serial flash can be programmed directly using the external flash interface (pins 13, 14, 15, and 17). During normal operation, the external flash interface should remain unconnected. For timing details, see the MX25R3235F data sheet.
7.16.5.10 SD Host
The CC3235MODx and CC3235MODAx MCU provides an interface between a local host (LH), such as an MCU and an SD memory card, and handles SD transactions with minimal LH intervention. The SD host does the following:
- Provides SD card access in 1-bit mode
- Deals with SD protocol at the transmission level
- Handles data packing
- Adds cyclic redundancy checks (CRC)
- Start and end bit
- Checks for syntactical correctness The application interface sends every SD command and either polls for the status of the adapter or waits for an interrupt request. The result is then sent back to the application interface in case of exceptions or to warn of end-of-operation. The controller can be configured to generate DMA requests and work with minimum CPU intervention. Given the nature of the integration of this peripheral on the CC3235x platform, TI recommends that developers use peripheral library APIs to control and operate the block. This section emphasizes understanding the SD host APIs provided in the peripheral library of the CC3235x Software Development Kit (SDK). The SD host features are as follows:
- Full compliance with SD command and response sets, as defined in the SD memory card – Specifications, v2.0 – Includes high-capacity (size >2 GB) cards HC SD
- Flexible architecture, allowing support for new command structure.
- 1-bit transfer mode specifications for SD cards
- Built-in 1024-byte buffer for read or write – 512-byte buffer for both transmit and receive – Each buffer is 32-bits wide by 128-words deep
- 32-bit-wide access bus to maximize bus throughput
- Single interrupt line for multiple interrupt source events
- Two slave DMA channels (1 for TX, 1 for RX)
- Programmable clock generation
- Integrates an internal transceiver that allows a direct connection to the SD card without an external transceiver
- Supports configurable busy and response timeout
- Support for a wide range of card clock frequency with odd and even clock ratio
- Maximum frequency supported is 24MHz CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 www.ti.com
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7.16.5.11 Timers
Programmable timers can be used to count or time external events that drive the timer input pins. The general- purpose timer module (GPTM) of the CC3235MODx and CC3235MODAx MCU contains 16- or 32-bit GPTM blocks. Each 16- or 32-bit GPTM block provides two 16-bit timers or counters (referred to as Timer A and Timer B) that can be configured to operate independently as timers or event counters, or they can be concatenated to operate as one 32-bit timer. Timers can also be used to trigger µDMA transfers. The GPTM contains four 16- or 32-bit GPTM blocks with the following functional options:
- Operating modes: – 16- or 32-bit programmable one-shot timer – 16- or 32-bit programmable periodic timer – 16-bit general-purpose timer with an 8-bit prescaler – 16-bit input-edge count- or time-capture modes with an 8-bit prescaler – 16-bit PWM mode with an 8-bit prescaler and software-programmable output inversion of the PWM signal
- Counts up or counts down
- Sixteen 16- or 32-bit capture compare pins (CCP)
- User-enabled stalling when the microcontroller asserts CPU Halt flag during debug
- Ability to determine the elapsed time between the assertion of the timer interrupt and entry into the interrupt service routine
- Efficient transfers using micro direct memory access controller (µDMA): – Dedicated channel for each timer – Burst request generated on timer interrupt
- Runs from system clock (80MHz) www.ti.com CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 63 Product Folder Links: CC3235MODS CC3235MODSF CC3235MODAS CC3235MODASF
8 Detailed Description
8.1 Overview
The CC3235MODx and CC3235MODAx MCU is a Dual-Band Wi-Fi internet-on-a chip module that consists of an Arm Cortex-M4 processor with a rich set of peripherals for diverse application requirements, a Wi-Fi network processor, and power-management subsystems.
8.2 Functional Block Diagram
Figure 8-1 shows the functional block diagram of the CC3235MODx and CC3235MODAx SimpleLink™ Wi-Fi® solution. SPI Peripheral I2C Peripheral Miscellaneous Peripheral Camera Sensor Audio Codec VCC (2.3 V to 3.6 V) CC3235MODx CC3235MODAx I2C GSPI GPIO/PWM Parallel Camera Port I2S Dual-Band Wi-Fi BLE/WLAN COEX Figure 8-1. Functional Block Diagram CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 www.ti.com
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8.3 Arm Cortex-M4 Processor Core Subsystem
The high-performance Arm Cortex-M4 processor provides a low-cost platform that meets the needs of minimal memory implementation, reduced pin count, and low power consumption, while delivering outstanding computational performance and exceptional system response to interrupts.
- The Cortex-M4 core has low-latency interrupt processing with the following features: – A 32-bit Arm Thumb® instruction set optimized for embedded applications – Handler and thread modes – Low-latency interrupt handling by automatic processor state saving and restoration during entry and exit – Support for ARMv6 unaligned accesses
- Nested vectored interrupt controller (NVIC) closely integrated with the processor core to achieve low-latency interrupt processing. The NVIC includes the following features: – Bits of priority configurable from 3 to 8 – Dynamic reprioritization of interrupts – Priority grouping that enables selection of preempting interrupt levels and nonpreempting interrupt levels – Support for tail-chaining and late arrival of interrupts, which enables back-to-back interrupt processing without the overhead of state saving and restoration between interrupts – Processor state automatically saved on interrupt entry and restored on interrupt exit with no instruction overhead – Wake-up interrupt controller (WIC) providing ultra-low-power sleep mode support
- Bus interfaces: – Advanced high-performance bus (AHB-Lite) interfaces: system bus interfaces – Bit-band support for memory and select peripheral that includes atomic bit-band write and read operations
- Low-cost debug solution featuring: – Debug access to all memory and registers in the system, including access to memory-mapped devices, access to internal core registers when the core is halted, and access to debug control registers even while SYSRESETn is asserted – Serial wire debug port (SW-DP) or serial wire JTAG debug port (SWJ-DP) debug access – Flash patch and breakpoint (FPB) unit to implement breakpoints and code patches www.ti.com CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 65 Product Folder Links: CC3235MODS CC3235MODSF CC3235MODAS CC3235MODASF
8.4 Wi-Fi Network Processor Subsystem
The Wi-Fi network processor subsystem includes a dedicated Arm MCU to completely offload the host MCU along with an 802.11 a/b/g/n radio, baseband, and MAC with a powerful crypto engine for a fast, secure WLAN and Internet connections with 256-bit encryption. The CC3235MODx and CC3235MODAx MCU supports station, AP, and Wi-Fi Direct modes. The module also supports WPA2 personal and enterprise security, WPS 2.0, and WPA3 personal and enterprise 12. The Wi-Fi network processor includes an embedded IPv6, IPv4 TCP/IP stack, TLS stack, and network applications such as HTTPS server.
8.4.1 WLAN
The WLAN features are as follows:
- 802.11 a/b/g/n integrated radio, modem, and MAC supporting WLAN communication as a BSS station, AP, Wi-Fi Direct client and group owner with CCK and OFDM rates in the 2.4GHz ISM band, channels 1 to 13, and 5GHz U-NII band. Note 802.11n is supported only in Wi-Fi station, Wi-Fi Direct, and P2P client modes.
- Autocalibrated radio with a single-ended 50Ω interface enables easy connection to the antenna without requiring expertise in radio circuit design.
- Advanced connection manager with multiple user-configurable profiles stored in serial-flash allows automatic fast connection to an access point without user or host intervention.
- Supports all common Wi-Fi security modes for personal and enterprise networks with on-chip security accelerators, including: WEP, WPA/WPA2 PSK, WPA2 Enterprise (802.1x), WPA3 Personal, and WPA3 Enterprise. Note When using WPA Enterprise security modes, the TLS socket used to communicate with the Radius server is limited to TLSv1.0.
- Smart provisioning options deeply integrated within the module providing a comprehensive end-to-end solution. With elaborate events notification to the host, enabling the application to control the provisioning decision flow. The wide variety of Wi-Fi provisioning methods include: – Access Point using HTTPS – SmartConfig Technology: a 1-step, 1-time process to connect a CC3235MODx or CC3235MODAx- enabled module to the home wireless network, removing dependency on the I/O capabilities of the host MCU; thus, it is usable by deeply embedded applications
- 802.11 transceiver mode allows transmitting and receiving of proprietary data through a socket without adding MAC or PHY headers. The 802.11 transceiver mode provides the option to select the working channel, rate, and transmitted power. The receiver mode works with the filtering options.
8.4.2 Network Stack
The Network Stack features are as follows:
- Integrated IPv4, IPv6 TCP/IP stack with BSD socket APIs for simple Internet connectivity with any MCU, microprocessor, or ASIC Note Not all APIs are 100% BSD compliant. Not all BSD APIs are supported.
- Support of 16 simultaneous TCP, UDP, RAW, SSL/TLS sockets
- Built-in network protocols: – Static IP, LLA, DHCPv4, DHCPv6 with DAD and stateless autoconfiguration – ARP, ICMPv4, IGMP, ICMPv6, MLD, ND 12 See CC3x35 SDK v3.40 or newer for details. Limited to STA mode only. CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 www.ti.com
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– DNS client for easy connection to the local network and the Internet
- Built-in network application and utilities: – HTTP/HTTPS
- Web page content stored on serial flash
- RESTful APIs for setting and configuring application content
- Dynamic user callbacks – Service discovery: Multicast DNS service discovery lets a client advertise its service without a centralized server. After connecting to the access point, the CC3235MODx or CC3235MODAx MCU provides critical information, such as device name, IP, vendor, and port number. – DHCP server – Ping Table 8-1 describes the NWP features. Table 8-1. NWP Features Feature Description Wi-Fi standards 802.11a/b/g/n station 802.11a/b/g AP supporting up to four stations Wi-Fi Direct client and group owner Wi-Fi channels 2.4 GHz ISM and 5 GHz U-NII Channels Channel Bandwidth 20 MHz Wi-Fi security WEP, WPA/WPA2 PSK, WPA2 enterprise (802.1x), WPA3 personal and enterprise (1) Wi-Fi provisioning SmartConfig technology, Wi-Fi protected setup (WPS2), AP mode with internal HTTP web server IP protocols IPv4/IPv6 IP addressing Static IP, LLA, DHCPv4, DHCPv6 with DAD Cross layer ARP, ICMPv4, IGMP, ICMPv6, MLD, NDP Transport UDP, TCP SSLv3.0/TLSv1.0/TLSv1.1/TLSv1.2 RAW Network applications and utilities Ping HTTP/HTTPS web server mDNS DNS-SD DHCP server Host interface UART/SPI Security Device identity Trusted root-certificate catalog TI root-of-trust public key The CC3235S and CC3235SF variants also support:
- Secure key storage
- Online certificate status protocol (OCSP)
- Certificate signing request (CSR)
- Unique per device Key-Pair
- File system security
- Software tamper detection
- Cloning protection
- Secure boot
- Validate the integrity and authenticity of the run-time binary during boot
- Initial secure programming
- Debug security
- JTAG and debug www.ti.com CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 67 Product Folder Links: CC3235MODS CC3235MODSF CC3235MODAS CC3235MODASF
Table 8-1. NWP Features (continued) Feature Description Power management Enhanced power policy management uses 802.11 power save and deep-sleep power modes Other Transceiver Programmable RX filters with event-trigger mechanism Rx Metrics for tracking the surrounding RF environment (1) See CC3x35 SDK v3.40 or newer for details. Limited to STA mode only. When using WPA Enterprise security modes, the TLS socket used to communicate with the Radius server is limited to TLSv1.0.
8.5 Security
The SimpleLink Wi-Fi CC3235MODx and CC3235MODAx internet-on-a chip module enhances the security capabilities available for development of IoT devices, while completely offloading these activities from the MCU to the networking subsystem. The security capabilities include the following key features: Wi-Fi and Internet Security:
- Personal and enterprise Wi-Fi security – Personal standards
- AES (WPA2-PSK)
- TKIP (WPA-PSK)
- WEP – Enterprise standards
- EAP Fast
- EAP PEAPv0/1
- EAP PEAPv0 TLS
- EAP PEAPv1 TLS EAP LS
- EAP TLS
- EAP TTLS TLS
- EAP TTLS MSCHAPv2
- Secure sockets – Protocol versions: SSL v3, TLS 1.0, TLS 1.1, TLS 1.2 – Powerful crypto engine for fast, secure Wi-Fi and internet connections with 256-bit AES encryption for TLS and SSL connections – Ciphers suites CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 www.ti.com
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- SL_SEC_MASK_TLS_ECDHE_ECDSA_WITH_CHACHA20_POLY1305_SHA256
- SL_SEC_MASK_TLS_ECDHE_RSA_WITH_CHACHA20_POLY1305_SHA256
- SL_SEC_MASK_TLS_DHE_RSA_WITH_CHACHA20_POLY1305_SHA256 – Server authentication – Client authentication – Domain name verification – Runtime socket upgrade to secure socket – STARTTLS
- Secure HTTP server (HTTPS)
- Trusted root-certificate catalog – Verifies that the CA used by the application is trusted and known secure content delivery
- TI root-of-trust public key – Hardware-based mechanism that allows authenticating TI as the genuine origin of a given content using asymmetric keys
- Secure content delivery – Allows encrypted file transfer to the system using asymmetric keys created by the device Code and Data Security:
- Network passwords and certificates are encrypted and signed
- Cloning protection – Application and data files are encrypted by a unique key per device
- Access control – Access to application and data files only by using a token provided in file creation time. If an unauthorized access is detected, a tamper protection lockdown mechanism takes effect
- Encrypted and authenticated file system
- Secured boot – Authentication of the application image on every boot
- Code and data encryption – User application and data files are encrypted in sFlash
- Code and data authentication – User Application and data files are authenticated with a public key certificate
- Offloaded crypto library for asymmetric keys, including the ability to create key-pair, sign and verify data buffer
- Recovery mechanism Device Security:
- Separate execution environments – Application processor and network processor run on separate Arm cores
- Initial secure programming – Allows for keeping the content confidential on the production line
- Debug security – JTAG lock – Debug ports lock
- True random number generator Figure 8-2 shows the high-level structure of the CC3235S and CC3235SF devices that are contained within the CC3235MODS and CC3235MODSF modules, respectively. The application image, user data, and network information files (passwords, certificates) are encrypted using a device-specific key. www.ti.com CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 69 Product Folder Links: CC3235MODS CC3235MODSF CC3235MODAS CC3235MODASF
Wi-Fi® Internet Peripherals OEM Application Serial Flash Data FilesOEM Application Network Information Dual-Band Radio Baseband MACHTTPS TLS/SSL TCP/IP MCU ARM® Cortex®-M4 Processor 256KB RAM / 1MB Flash (CC3235SF) SPI and I2C GPIO UART PWM ADC Internet Figure 8-2. CC3235S and CC3235SF High-Level Structure
8.6 FIPS 140-2 Level 1 Certification
The Federal Information Processing Standard (FIPS) Publication 140-2 is a U.S. government computer security standard. It is commonly referred to as FIPS 140-2, and is used to accredit the design and implementation of cryptographic functions, for example within a chip. A cryptographic function within a chip security system is necessary to maintain the confidentiality and integrity of the information that is being processed. The security functions of the CC3235x chip that is inside the CC3235MODx or CC3235MODAx module, are FIPS certified to FIPS 140-2 level 1. This certification covers topics such as: cryptographic specifications, ports and interfaces, a finite state model for the cryptographic functions, the operational environment of the function, and how cryptographic keys are managed. The certification provides the assurance that the implementation meets FIPS 140-2 level 1 standards.
8.7 Power-Management Subsystem
The CC3235MODx and CC3235MODAx power-management subsystems contain DC/DC converters to accommodate the differing voltage or current requirements of the system. The CC3235MODx and CC3235MODAx MCU is a fully integrated module-based WLAN radio solution used on an embedded system with a wide-voltage supply range. The internal power management, including DC/DC converters and LDOs, generates all of the voltages required for the module to operate from a wide variety of input sources. For maximum flexibility, the module can operate in the modes described in the following sections.
8.7.1 VBAT Wide-Voltage Connection
In the wide-voltage battery connection, the module can be directly connected to two AA alkaline batteries. All other voltages required to operate the module are generated internally by the DC/DC converters. This scheme is the most common mode for the module because it supports wide-voltage operation from 2.3 to 3.6V.
8.8 Low-Power Operating Mode
From a power-management perspective, the CC3235MODx and CC3235MODAx MCU comprises the following two independent subsystems:
- Arm Cortex-M4 application processor subsystem
- Networking subsystem Each subsystem operates in one of several power states. CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 www.ti.com
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The Arm Cortex-M4 application processor runs the user application loaded from an internal serial flash or on-module XIP flash (in CC3235MODSF). The networking subsystem runs preprogrammed TCP/IP and Wi-Fi data link layer functions. The user program controls the power state of the application processor subsystem and can be in one of the five modes described in Table 8-2. Table 8-2. User Program Modes APPLICATION PROCESSOR (MCU) MODE(1) DESCRIPTION MCU active mode MCU executing code at the 80MHz state rate MCU sleep mode The MCU clocks are gated off in sleep mode and the entire state of the device is retained. Sleep mode offers instant wakeup. The MCU can be configured to wake up by an internal fast timer or by activity from any GPIO line or peripheral. MCU LPDS mode State information is lost and only certain MCU-specific register configurations are retained. The MCU can wake up from external events or by using an internal timer. (The wake-up time is less than 3ms.) Certain parts of memory can be retained while the MCU is in LPDS mode. The amount of memory retained is configurable. Users can choose to preserve code and the MCU-specific setting. The MCU can be configured to wake up using the RTC timer or by an external event on specific GPIOs as the wake-up source. MCU hibernate mode The lowest power mode in which all digital logic is power-gated. Only a small section of the logic directly powered by the input supply is retained. The RTC keeps running and the MCU supports wakeup from an external event or from an RTC timer expiry. Wake-up time is longer than LPDS mode at about 15ms plus the time to load the application from serial flash, which varies according to code size. In this mode, the MCU can be configured to wake up using the RTC timer or external event on a GPIO. MCU shutdown mode The lowest power mode system-wise. All device logics are off, including the RTC. The wake-up time in this mode is longer than hibernate at about 1.1s. To enter or exit the shutdown mode, the state of the nRESET line is changed (low to shut down, high to turn on). (1) Modes are listed in order of power consumption, with highest power modes listed first. The NWP can be active or in LPDS mode and takes care of its own mode transitions. When there is no network activity, the NWP sleeps most of the time and wakes up only for beacon reception (see Table 8-3). Table 8-3. Networking Subsystem Modes NETWORK PROCESSOR MODE DESCRIPTION Network active mode (processing layer 3, 2, and 1) Transmitting or receiving IP protocol packets Network active mode (processing layer 2 and 1) Transmitting or receiving MAC management frames; IP processing not required Network active listen mode Special power-optimized active mode for receiving beacon frames (no other frames supported) Network connected Idle A composite mode that implements 802.11 infrastructure power save operation. The CC3235MODx and CC3235MODAx NWPs automatically go into LPDS mode between beacons and then wakes to active listen mode to receive a beacon and determine if there is pending traffic at the AP. If not, the NWP returns to LPDS mode and the cycle repeats. Network LPDS mode Low-power state between beacons in which the state is retained by the NWP, allowing for a rapid wake-up. Network disabled The network is disabled. The operation of the application and network processor ensures that the module remains in the lowest power mode most of the time to preserve battery life. The following examples show the use of the power modes in applications: www.ti.com CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 71 Product Folder Links: CC3235MODS CC3235MODSF CC3235MODAS CC3235MODASF
- A product that is continuously connected to the network in the 802.11 infrastructure power-save mode but sends and receives little data spends most of the time in connected idle, which is a composite of receiving a beacon frame and waiting for the next beacon.
- A product that is not continuously connected to the network but instead wakes up periodically (for example, every 10 minutes) to send data, spends most of the time in hibernate mode, jumping briefly to active mode to transmit data.
8.9 Memory
8.9.1 Internal Memory
The CC3235x device within the CC3235MODx and CC3235MODAx modules includes on-chip SRAM to which application programs are downloaded and executed. The application developer must share the SRAM for code and data. The micro direct memory access (µDMA) controller can transfer data to and from SRAM and various peripherals. The CC3235x device ROM holds the rich set of peripheral drivers, which saves SRAM space. For more information on drivers, see the CC3235x API list.
8.9.1.1 SRAM
The CC3235MODx and CC3235MODAx MCU family provides 256KB of on-chip SRAM. Internal RAM is capable of selective retention during LPDS mode. This internal SRAM is at offset 0x2000 0000 of the device memory map. Use the µDMA controller to transfer data to and from the SRAM. When the device enters low-power mode, the application developer can choose to retain a section of memory based on need. Retaining the memory during low-power mode provides a faster wakeup. The application developer can choose the amount of memory to retain in multiples of 64KB. For more information, see the API guide.
8.9.1.2 ROM
The internal zero-wait-state ROM of the CC3235MODx and CC3235MODAx module is at address 0x0000 0000 of the device memory and is programmed with the following components:
- Bootloader
- Peripheral driver library (DriverLib) release for product-specific peripherals and interfaces The bootloader is used as an initial program loader (when the serial flash memory is empty). The DriverLib software library of the CC3235MODx and CC3235MODAx MCU controls on-chip peripherals with a bootloader capability. The library performs peripheral initialization and control functions, with a choice of polled or interrupt- driven peripheral support. The DriverLib APIs in ROM can be called by applications to reduce flash memory requirements and free the flash memory to be used for other purposes.
8.9.1.3 Flash Memory
The CC3235SF device within the CC3235MODSF and CC3235MODASF modules comes with an on-chip flash memory of 1MB that allows application code to execute in place while freeing SRAM exclusively for read-write data. The flash memory is used for code and constant data sections and is directly attached to the ICODE/DCODE bus of the Arm Cortex-M4 core. A 128-bit-wide instruction prefetch buffer allows maintenance of maximum performance for linear code or loops that fit inside the buffer. The flash memory is organized as 2-KB sectors that can be independently erased. Reads and writes can be performed at word (32-bit) level.
8.9.1.4 Memory Map
Table 8-4 describes the various MCU peripherals and how they are mapped to the processor memory. For more information on peripherals, see the API document. CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 www.ti.com
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Table 8-4. Memory Map START ADDRESS END ADDRESS DESCRIPTION COMMENT 0x0000 0000 0x0007 FFFF On-chip ROM (bootloader + DriverLib) 0x0100 0000 0x010F FFFF On-chip flash (for user application code) SF devices only 0x2000 0000 0x2003 FFFF Bit-banded on-chip SRAM 0x2200 0000 0x23FF FFFF Bit-band alias of 0x2000 0000 to 0x200F FFFF 0x4000 0000 0x4000 0FFF Watchdog timer A0 0x4000 4000 0x4000 4FFF GPIO port A0 0x4000 5000 0x4000 5FFF GPIO port A1 0x4000 6000 0x4000 6FFF GPIO port A2 0x4000 7000 0x4000 7FFF GPIO port A3 0x4000 C000 0x4000 CFFF UART A0 0x4000 D000 0x4000 DFFF UART A1 0x4002 0000 0x4000 07FF I2C A0 (master) 0x4002 4000 0x4002 4FFF GPIO group 4 0x4002 0800 0x4002 0FFF I2C A0 (slave) 0x4003 0000 0x4003 0FFF General-purpose timer A0 0x4003 1000 0x4003 1FFF General-purpose timer A1 0x4003 2000 0x4003 2FFF General-purpose timer A2 0x4003 3000 0x4003 3FFF General-purpose timer A3 0x400F7000 0x400F 7FFF Configuration registers 0x400F E000 0x400F EFFF System control 0x400F F000 0x400F FFFF µDMA 0x4200 0000 0x43FF FFFF Bit band alias of 0x4000 0000 to 0x400F FFFF 0x4401 0000 0x4401 0FFF SDIO master 0x4401 8000 0x4401 8FFF Camera Interface 0x4401 C000 0x4401 DFFF McASP 0x4402 0000 0x4402 0FFF SSPI Used for external serial flash 0x4402 1000 0x4402 1FFF GSPI Used by application processor 0x4402 5000 0x4402 5FFF MCU reset clock manager 0x4402 6000 0x4402 6FFF MCU configuration space 0x4402 D000 0x4402 DFFF Global power, reset, and clock manager (GPRCM) 0x4402 E000 0x4402 EFFF MCU shared configuration 0x4402 F000 0x4402 FFFF Hibernate configuration 0x4403 0000 0x4403 FFFF Crypto range (includes apertures for all crypto-related blocks as follows) 0x4403 0000 0x4403 0FFF DTHE registers and TCP checksum 0x4403 5000 0x4403 5FFF MD5/SHA 0x4403 7000 0x4403 7FFF AES 0x4403 9000 0x4403 9FFF DES 0xE000 0000 0xE000 0FFF Instrumentation trace Macrocell™ 0xE000 1000 0xE000 1FFF Data watchpoint and trace (DWT) 0xE000 2000 0xE000 2FFF Flash patch and breakpoint (FPB) 0xE000 E000 0xE000 EFFF NVIC 0xE004 0000 0xE004 0FFF Trace port interface unit (TPIU) 0xE004 1000 0xE004 1FFF Reserved for embedded trace macrocell (ETM) 0xE004 2000 0xE00F FFFF Reserved www.ti.com CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 73 Product Folder Links: CC3235MODS CC3235MODSF CC3235MODAS CC3235MODASF
8.10 Restoring Factory Default Configuration
The module has an internal recovery mechanism that rolls back the file system to its predefined factory image or restoring the factory default parameters of the device. The factory image is kept in a separate sector on the sFLASH in a secure manner and cannot be accessed from the host processor. The following restore modes are supported:
- None—no factory restore settings
- Enable restore of factory default parameters
- Enable restore of factory image and factory default parameters The restore process is performed by calling software APIs, or by pulling or forcing SOP[2:0] = 011 pins and toggling the nRESET pin from low to high. The process is fail-safe and resumes operation if a power failure occurs before the restore is finished. The restore process typically takes about 8 seconds, depending on the attributes of the serial flash vendor.
8.11 Boot Modes
8.11.1 Boot Mode List
The CC3235MODx and CC3235MODAx MCU implements a sense-on-power (SoP) scheme to determine the device operation mode. SoP values are sensed from the module pin during power up. This encoding determines the boot flow. Before the device is taken out of reset, the SoP values are copied to a register and used to determine the device operation mode while powering up. These values determine the boot flow as well as the default mapping for some of the pins (JTAG, SWD, UART0). Table 8-5 lists the pull configurations. All CC3235MODx and CC3235MODAx MCUs contain internal pulldown resistors on the SOP[2:0] lines. The application can use SOP2 for other functions after chip has powered up. However, to avoid spurious SOP values from being sensed at power up, TI strongly recommends using the SOP2 pin only for output signals. The SOP0 and SOP1 pins are multiplexed with the WLAN analog test pins and are not available for other functions. Table 8-5. CC3235MODx and CC3235MODAx Functional Configurations NAME SOP[2] SOP[1] SOP[0] SoP MODE COMMENT UARTLOAD Pullup Pulldown Pulldown LDfrUART Factory, lab flash, and SRAM loads through the UART. The device waits indefinitely for the UART to load code. The SOP bits then must be toggled to configure the device in functional mode. Also puts JTAG in 4-wire mode. FUNCTIONAL_2WJ Pulldown Pulldown Pullup Fn2WJ Functional development mode. In this mode, 2-pin SWD is available to the developer. TMS and TCK are available for debugger connection. FUNCTIONAL_4WJ Pulldown Pulldown Pulldown Fn4WJ Functional development mode. In this mode, 4-pin JTAG is available to the developer. TDI, TMS, TCK, and TDO are available for debugger connection. The default configuration for CC3235MODx and CC3235MODAx MCUs. UARTLOAD_FUNCTIONAL_4WJ Pulldown Pullup Pulldown LDfrUART_FnWJ Supports flash and SRAM load through UART and functional mode. The MCU bootloader tries to detect a UART break on UART receive line. If the break signal is present, the device enters the UARTLOAD mode, otherwise, the device enters the functional mode. TDI, TMS, TCK, and TDO are available for debugger connection. CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 www.ti.com
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Table 8-5. CC3235MODx and CC3235MODAx Functional Configurations (continued) NAME SOP[2] SOP[1] SOP[0] SoP MODE COMMENT RET_FACTORY_IMAGE Pulldown Pullup Pullup RetFactDef When module reset is toggled, the MCU bootloader kickstarts the procedure to restore factory default images.
8.12 Hostless Mode
The SimpleLink™ Wi-Fi® CC3235MODx or CC3235MODAx devices incorporate a scripting ability that enables offloading of simple tasks from the host processor. Using simple and conditional scripts, repetitive tasks can be handled internally, which allows the host processor to remain in a low-power state. In some cases where the scripter is being used to send packets, it reduces code footprint and memory consumption. The if-this-then-that style of conditioning can include anything from GPIO toggling to transmitting packets. The conditional scripting abilities can be divided into conditions and actions. The conditions define when to trigger actions. Only one action can be defined per condition, but multiple instances of the same condition may be used, so in effect, multiple actions can be defined for a single condition. In total, 16 condition and action pairs can be defined. The conditions can be simple, or complex using subconditions (using a combinatorial AND condition between them). The actions are divided into two types, those that can occur during runtime and those that can occur only during the initialization phase. The following actions can only be performed when triggered by the preinitialization condition:
- Set roles AP, station, P2P, and Tag modes
- Delete all stored profiles
- Set connection policy
- Hardware GPIO indication allows an I/O to be driven directly from the WLAN core hardware to indicate internal signaling The following actions may be activated during runtime:
- Send transceiver packet
- Send UDP packet
- Send TCP packet
- Increment counter increments one of the user counters by 1
- Set counter allows setting a specific value to a counter
- Timer control
- Set GPIO allows GPIO output from the device using the internal networking core
- Enter Hibernate state Note Consider the following limitations:
- Timing cannot be ensured when using the network scripter because some variable latency will apply depending on the utilization of the networking core.
- The scripter is limited to 16 pairs of conditions and reactions.
- Both timers and counters are limited to 8 instances each. Timers are limited to a resolution of 1 second. Counters are 32 bits wide.
- Packet length is limited to the size of one packet and the number of possible packet tokens is limited to 8. www.ti.com CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 75 Product Folder Links: CC3235MODS CC3235MODSF CC3235MODAS CC3235MODASF
8.13 Device Certification and Qualification
The CC3235MODx and CC3235MODAx MCU from TI is certified for FCC, IC/ISED, ETSI/CE, Japan MIC, and SRRC. Moreover, the module is also Wi-Fi CERTIFIED™ with the ability to request a certificate transfer for Wi-Fi Alliance® members. TI customers that build products based on the CC3235MODx or CC3235MODAx MCU from TI can save in testing cost and time per product family. Table 8-6. CC3235MODx and CC3235MODAx List of Certifications Regulatory Body Specification ID (IF APPLICABLE) FCC (USA) Part 15C + MPE FCC RF Exposure Z64-CC3235MOD IC/ISED (Canada) RSS-102 (MPE) and RSS-247 (Wi-Fi) 451I-CC3235MOD ETSI/CE (Europe) EN300328 v2.2.1 (2.4GHz Wi-Fi) — EN301893 v2.1.1 (5GHz Wi-Fi) — EN62311:2008 (MPE) — EN301489-1 v2.2.1 (General EMC) — EN301489-17 v3.2.0 (EMC) — EN60950-1:2006/A11:2009/A1:2010/ A12:2011/A2:2013 — MIC (Japan) Article 49-20 of ORRE 201-190033 SRRC (China) — Please contact TI for more information on using SRRC ID Certification: www.ti.com/tool/ SIMPLELINK-CC3XXX-CERTIFICATION
8.13.1 FCC Certification and Statement
FCC RF Radiation Exposure Statement: This equipment complies with FCC radiation exposure limits set forth for an uncontrolled environment. End users must follow the specific operating instructions for satisfying RF exposure limits. This transmitter must not be co-located or operating with any other antenna or transmitter. The CC3235MODx and CC3235MODAx modules from TI are certified for the FCC as a single-modular transmitter. The modules are FCC-certified radio modules that carries a modular grant. You are cautioned that changes or modifications not expressly approved by the party responsible for compliance could void the user’s authority to operate the equipment. This device complies with Part 15 of the FCC Rules. Operation is subject to the following two conditions:
- This device may not cause harmful interference.
- This device must accept any interference received, including interference that may cause undesired operation of the device. CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 www.ti.com
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8.13.2 IC/ISED Certification and Statement
IC RF Radiation Exposure Statement: To comply with IC RF exposure requirements, this device and its antenna must not be co-located or operating in conjunction with any other antenna or transmitter. Pour se conformer aux exigences de conformité RF canadienne l'exposition, cet appareil et son antenne ne doivent pas étre co-localisés ou fonctionnant en conjonction avec une autre antenne ou transmetteur. The CC3235MODx and CC3235MODAx modules from TI are certified for IC as a single-modular transmitter. The CC3235MODx and CC3235MODAx modules from TI meet IC modular approval and labeling requirements. The IC follows the same testing and rules as the FCC regarding certified modules in authorized equipment. This device complies with Industry Canada licence-exempt RSS standards. Operation is subject to the following two conditions:
- This device may not cause interference.
- This device must accept any interference, including interference that may cause undesired operation of the device. Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation est autorisée aux deux conditions suivantes:
- L'appareil ne doit pas produire de brouillage
- L'utilisateur de l'appareil doit accepter tout brouillage radioélectrique subi, même si le brouillage est susceptible d'en compromettre le fonctionnement.
8.13.3 ETSI/CE Certification
The CC3235MODx and CC3235MODAx modules from TI are CE certified with certifications to the appropriate EU radio and EMC directives summarized in the Declaration of Conformity and evidenced by the CE mark. The modules are tested against the new Radio Equipment Directive (RE-D). See the full text of the EU Declaration of Conformity for the CC3235MODSM2MOB and CC3235MODSF12MOB devices.
8.13.4 MIC Certification
The CC3235MODx and CC3235MODAx modules from TI are MIC certified against article 49-20 and the relevant articles of the Ordinance Regulating Radio Equipment. Operation is subject to the following condition:
- The host system does not contain a wireless wide area network (WWAN) device. This device operates in the W52 and W53 bands and is for indoor use only (except communication to high power radio). www.ti.com CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 77 Product Folder Links: CC3235MODS CC3235MODSF CC3235MODAS CC3235MODASF
8.14 Module Markings
Figure 8-3 and Figure 8-4 show the markings for the SimpleLink™ CC3235MODx module. Figure 8-3. CC3235MODS Module Marking Figure 8-4. CC3235MODSF Module Marking Figure 8-5 and Figure 8-6 show the markings for the SimpleLink™ CC3235MODAx modules. Figure 8-5. CC3235MODAS Module Marking Figure 8-6. CC3235MODASF Module Marking CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 www.ti.com
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Table 8-7 lists the CC3235MODx and CC3235MODAx module markings. Table 8-7. Module Descriptions MARKING DESCRIPTION CC3235MODSM2MOB Model CC3235MODSF12MOB CC3235MODASM2MON Model CC3235MODASF12MON YMWLLLC LTC (Lot Trace Code):
- Y = Year
- M = Month
- WLLLC = Reserved for internal use Z64-CC3235MOD FCC ID: single modular FCC grant ID 451I-CC3235MOD IC: single modular IC grant ID MIC compliance mark R 201-190033 MIC ID: modular MIC grant ID CE CE compliance mark
8.15 End Product Labeling
These modules are designed to comply with the FCC single modular FCC grant, FCC ID: Z64-CC3235MOD. The host system using this module must display a visible label indicating the following text: Contains FCC ID: Z64-CC3235MOD These modules are designed to comply with the IC single modular FCC grant, IC: 451I-CC3235MOD. The host system using this module must display a visible label indicating the following text: Contains IC: 451I-CC3235MOD This module is designed to comply with the JP statement, 201-190033. The host system using this module must display a visible label indicating the following text: Contains transmitter module with certificate number: 201-190033
8.16 Manual Information to the End User
The OEM integrator must be aware not to provide information to the end user regarding how to install or remove this RF module in the user’s manual of the end product which integrates this module. The end user manual must include all required regulatory information and warnings as shown in this manual. www.ti.com CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 79 Product Folder Links: CC3235MODS CC3235MODSF CC3235MODAS CC3235MODASF
9 Applications, Implementation, and Layout
Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.
9.1 Typical Application
9.1.1 BLE/2.4GHz Radio Coexistence The CC3235MODx and CC3235MODAx devices are designed to support BLE/2.4GHz radio coexistence. Because WLAN is inherently more tolerant to time-domain disturbances, the coexistence mechanism gives priority to the Bluetooth® low energy entity over the WLAN. Bluetooth ® low energy operates in the 2.4GHz band, therefore the coexistence mechanism does not affect the 5GHz band. The CC3235MODx and CC3235MODAx device can operate normally on the 5GHz band, while the Bluetooth ® low energy works on the 2.4GHz band without mutual interference. The following coexistence modes can be configured by the user:
- Off mode or intrinsic mode – No BLE/2.4GHz radio coexistence, or no synchronization between WLAN and Bluetooth® low energy—in case Bluetooth® low energy exists in this mode, collisions can randomly occur.
- Time Division Multiplexing (TDM, Dual Antenna) – Dual-band Wi-Fi (see Figure 9-1) In this mode, the WLAN can operate on either a 2.4 or 5GHz band and Bluetooth® low energy operates on the 2.4GHz band. Figure 9-1 shows the dual antenna implementation of a complete Bluetooth ® low energy and WLAN coexistence network with the WLAN operating on either a 2.4 or a 5GHz band. Note in this implementation a Coex switch is not required and only a single GPIO from the BLE device to the CC3235MOD device is needed. In addition, the CC3235MODx's antenna is external while the CC3235MODAx's antenna is integrated. WLAN CC3235MODx BLE CCxxxx RF_ABG RF Coex IOCC_COEX_BLE_IN Dual-band Antenna BLE Ant. Figure 9-1. Dual-Antenna Coexistence Mode Block Diagram CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 www.ti.com
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9.1.2 Antenna Selection (CC3235MODx only)
The CC3235MODx device is designed to also support antenna selection and is controlled from Image Creator. When enabled, there are two options possible options:
- ANT 1: When selected, the GPIOs that are defined for antenna selection with set the RF path for antenna 1.
- ANT 2: When selected, the GPIOs that are defined for antenna selection will set the RF path for antenna 2.
- Autoselect: When selected, during a scan and prior to connecting to an AP, CC3235MODx device will determine the best RF path and select the appropriate antenna 13 14. The result is saved as port of the profile. Figure 9-2 shows the antenna selection implementation for Wi-Fi, with BLE operating on its own antenna. Note in this implementation, only a single GPIO from the BLE device to the CC3235MODx device is required. The Antenna switch 15is controlled by two GPIO lines from the CC3235MODx device. Section 6.3 lists which GPIOs can be used for Antenna Selection. BLE CCxxxx WLAN CC3235MODx RFCC_COEX_BLE_IN RF_ABG Coex IO Antenna Selection SPDT RF Switch ANT_SEL_1 ANT_SEL_2 Dual Band Ant. 1 Dual Band Ant. 2 BLE Ant. Figure 9-2. Coexistence Solution with Wi-Fi Antenna Selection and Dedicated BLE Antenna 13 When selecting Autoselect via the API, a reset is required in order for the CC3235MODx device to determine the best antenna for use. 14 Refer to the Uniflash with Image Creator User Guidefor more information. 15 The recommended Antenna switch is the Richwave RTC6608OSP. www.ti.com CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 81 Product Folder Links: CC3235MODS CC3235MODSF CC3235MODAS CC3235MODASF
9.1.3 Typical Application Schematic (CC3235MODx)
Figure 9-3 shows the typical application schematic using the CC3235MODx module. See the full reference schematic for CC3235MODx. Note that the CC3235MODx and CC3235MODAx modules share the same reference schematic. The difference between the two references is the antenna and its matching circuitry. The CC3235MODAx's pin 31 is not accessible to the designer because it is directly tied to the integrated antenna. Note The following guidelines are recommended for implementation of the RF design:
- Ensure an RF path is designed with an impedance of 50Ω.
- Tuning of the antenna impedance π matching network is recommended after manufacturing of the PCB to account for PCB parasitics.
- π or L matching and tuning may be required between cascaded passive components on the RF path. CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 www.ti.com
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P50_GPIO_00 P55_GPIO_01 P57_GPIO_02 P58_GPIO_03 P59_GPIO_04 P60_GPIO_05 P61_GPIO_06 P62_GPIO_07 P63_GPIO_08 P64_GPIO_09 P01_GPIO_10 P02_GPIO_11 P03_GPIO_12 P04_GPIO_13 P07_GPIO_16 P08_GPIO_17 P15_GPIO_22 P18_GPIO_28 P53_GPIO_30 P05_GPIO_14 P06_GPIO_15 VBAT_CC GND GND 1 GND 2 GPIO10 3 GPIO11 4 GPIO14 5 GPIO15 6 GPIO16 7 GPIO17 8 GPIO12 9 GPIO13 10 GPIO22 11JTAG_TDI12 FLASH_SPI_MISO13 FLASH_SPI_CS_IN14 FLASH_SPI_CLK15 GND 16 FLASH_SPI_MOSI17 JTAG_TDO18 GPIO28 19 NC20 JTAG_TCK21 JTAG_TMS22 SOP223 SOP124 GND 25 GND 26 GND 27 GND 28 GND 29 GND 30 RF_ABG31 GND 32 NC33 SOP034 RESET35 VBA T_RESET36 VBAT137 GND 38 NC39 VBAT240 NC41 GPIO30 42 GND 43 GPIO0 44 NC45 GPIO01 46 GPIO02 47 GPIO03 48 GPIO04 49 GPIO05 50 GPIO06 51 GPIO07 52 GPIO08 53 GPIO09 54 GND 55 GND 56 GND 57 GND 58 GND 59 GND 60 GND 61 GND 62 GND 63 CC3235MODSF12MOBR CC1 JTAG/DEBUG EXTERNAL PROGRAMMING 1 2 3 4 5 6 J110k VBAT_CC RF_ABG GNDGND 4.7nH 0.1uF 0.1uF GND GND SEE TABLE 4-1 FOR VBAT_RESET and nRESET CONNECTION OPTIONS At a minimum, pull the sepins out to test pointsto aid in debug: Pin 48: RS232_TX Pin 49: RS232_RX Pin 50: WLAN_LOG Pin 52: NWP_LOG SOP[2:0] USED TO CONFIGURE BOOT MODES ( TABLE 5-5) GND 1 2 Matching circuit shown below is for the antenna. The module is matched internally to 50 ©. Final solution may require antenna matching optimization with a pi-network. 100uF 100uF GND GND VBAT_CC Optional: Consider adding extra decoupling capaci tors if the battery cannot source the peak cu rrent s. 1pF Figure 9-3. CC3235MODx Typical Application Schematic www.ti.com CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 83 Product Folder Links: CC3235MODS CC3235MODSF CC3235MODAS CC3235MODASF
Table 9-1 provides the bill of materials for a typical application using the CC3235MODx module in Figure 9-3. For full operation reference design, see the CC3235MODAx SimpleLink™ and Internet of Things Hardware Design Files. Table 9-1. Bill of Materials QTY PART REFERENCE VALUE MANUFACTURER PART NUMBER DESCRIPTION 2 C1, C2 0.1µF Murata GRM155R61A104KA01D Capacitor, ceramic, 0.1µF, 10V, ±10%, X5R, 0402
1 C3 1pF Murata GRM1555C1H1R0CA01D Capacitor, ceramic, 1pF, 50V, ±5%, C0G/NP0, 0402
2 C4, C5 100µF Murata LMK325ABJ107MMHT Capacitor, ceramic, 100µF, 10V, ±20%, X5R, AEC-
Q200 Grade 3, 1210 1 E1 2.4GHz, 5GHz Ant Ethertronics M830520 Antenna Bluetooth WLAN Zigbee® 1 L1 4.7nH Murata LQG15HS4N7C02D Inductor, Multilayer, Air Core, 4.7nH, 0.7 A, 0.16Ω, SMD 1 R1 10k Vishay-Dale CRCW040210K0JNED RES, 10k, 5%, 0.063 W, AEC-Q200 Grade 0, 0402
1 CC1 CC3235MODx Texas Instruments CC3235MODSM2MOB/
SimpleLink™ Wi-Fi® and Internet-of-Things Module Solution, a Single-Chip Wireless Dual-Band MCU, MOB0063A
9.1.4 Typical Application Schematic (CC3235MODAx)
Figure 9-4 shows the typical application schematic using the CC3235MODAx module. See the full reference schematic for CC3235MODAx. CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 www.ti.com
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P50_GPIO_00 P55_GPIO_01 P57_GPIO_02 P58_GPIO_03 P59_GPIO_04 P60_GPIO_05 P61_GPIO_06 P62_GPIO_07 P63_GPIO_08 P64_GPIO_09 P01_GPIO_10 P02_GPIO_11 P03_GPIO_12 P04_GPIO_13 P07_GPIO_16 P08_GPIO_17 P15_GPIO_22 P18_GPIO_28 P53_GPIO_30 P05_GPIO_14 P06_GPIO_15 VBAT_CC GND JTAG/DEBUG EXTERNAL 1 2 PROGRAMMING 3 4 5 6 J110k VBAT_CC 0.1uF 0.1uF GND GND SEE TABLE 4-1 FOR VBAT_RESET and nRESET CONNECTION OPTIONS At a minimum, pull these pins out to test points to aid in debug: Pin 48: RS232_TX Pin 49: RS232_RX Pin 50: WLAN_LOG Pin 52: NWP_LOG 100uF 100uF SOP[2:0] USED TO CONFIGURE BOOT MODES (TABLE 5-5) GND GND VBAT_CC 1GND 2GND 3GPIO_10 4GPIO_11 5GPIO_14 Optional: Consider adding extra decoupling capacitors if the battery cannot source the peak currents. GPIO_15 7GPIO_16 8GPIO_17 9GPIO_12 10GPIO_13 11GPIO_22
12 JTAG_TDI
13 FLASH_SPI_MISO
14 FLASH_SPI_CS_IN
FLASH_SPI_CLK
17 FLASH_SPI_MOSI
18 JTAG_TDO
19GPIO_28 NC20
21 JTAG_TCK22 JTAG_TMS
23 SOP2
31 RF_ABG
35 RESET
36 VBAT_RESET
40 VBAT2
42GPIO_30 GND 43 44GPIO_0 NC45 46GPIO_01 47GPIO_02 48GPIO_03 49GPIO_04 50GPIO_05 51GPIO_06 52GPIO_07 53GPIO_08 54GPIO_09 GND 55 GND 56 GND 57 GND 58 GND 59 GND 60 GND 61 GND 62 GND 63 GND25 GND26 CC? GND CC3235MODASM2MONR GND Figure 9-4. CC3235MODAx Typical Application Schematic www.ti.com CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 85 Product Folder Links: CC3235MODS CC3235MODSF CC3235MODAS CC3235MODASF
Table 9-2 provides the bill of materials for a typical application using the CC3235MODAx module in Figure 9-4. For full operation reference design, see the CC3235MODAx SimpleLink™ and Internet of Things Hardware Design Files. Table 9-2. Bill of Materials QTY PART REFERENCE VALUE MANUFACTURER PART NUMBER DESCRIPTION 2 C1, C2 0.1µF Murata GRM155R61A104KA01D Capacitor, ceramic, 0.1µF, 10V, ±10%, X5R, 0402 Q200 Grade 3, 1210 1 R1 10k Vishay-Dale CRCW040210K0JNED RES, 10k, 5%, 0.063W, AEC-Q200 Grade 0, 0402
1 CC1 CC3235MODAx Texas Instruments CC3235MODASM2MON/
SimpleLink™ Wi-Fi® and Internet-of-Things Module Solution, a Single-Chip Wireless Dual-Band MCU, MON0063A CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 www.ti.com
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9.2 Device Connection and Layout Fundamentals
9.2.1 Power Supply Decoupling and Bulk Capacitors
Depending upon routing resistors and battery type, TI recommends adding two 100µF ceramic capacitors to help provide the peak current drawn by the CC3235MODx and CC3235MODAx modules. Note The module enters a brown-out condition whenever the input voltage dips below V BROWN (see Figure 7-4 and Figure 7-5 ). This condition must be considered during design of the power supply routing specifically if operating from a battery. For more details on brown-out consideration, see Section 7.8.
9.2.2 Reset
The module features an internal RC circuit to reset the device during power ON. The nRESET pin must be held below 0.6V for at least 5ms for the device to reset successfully.
9.2.3 Unused Pins
All unused pins can be left unconnected without the concern of having leakage current.
9.3 PCB Layout Guidelines
This section details the PCB guidelines to speed up the PCB design using the CC3235MODx and CC3235MODAx. The integrator of the CC3235MODx and CC3235MODAx modules must comply with the PCB layout recommendations described in the following subsections to minimize the risk with regulatory certifications for the FCC, IC/ISED, ETSI/CE, MIC , and SRRC . Moreover, TI recommends customers follow the guidelines described in this section to achieve similar performance to that obtained with the TI reference design.
9.3.1 General Layout Recommendations
Ensure that the following general layout recommendations are followed:
- Have a solid ground plane and ground vias under the module for stable system and thermal dissipation.
- Do not run signal traces underneath the module on a layer where the module is mounted.
9.3.2 CC3235MODx RF Layout Recommendations
The RF section of this wireless module gets top priority in terms of layout. It is very important for the RF section to be laid out correctly to ensure optimum performance from the module. A poor layout can cause low-output power, EVM degradation, sensitivity degradation, and mask violations. Figure 9-5 shows the RF placement and routing of the CC3235MODx module with external antenna. www.ti.com CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 87 Product Folder Links: CC3235MODS CC3235MODSF CC3235MODAS CC3235MODASF
Figure 9-5. RF Section Layout Follow these RF layout recommendations for the CC3235MODx device:
- RF traces must have 50Ω impedance.
- RF trace bends must be made with gradual curves, and 90° bends must be avoided.
- RF traces must not have sharp corners.
- There must be no traces or ground under the antenna section.
- RF traces must have via stitching on the ground plane beside the RF trace on both sides.
- RF traces must be as short as possible. The antenna, RF traces, and the module must be on the edge of the PCB product in consideration of the product enclosure material and proximity. CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 www.ti.com
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For optimal RF performance, ensure the copper cut out on the top layer under the RF-BG pin (pin 31) is as shown in Figure 9-6. Copyright © 2017, Texas Instruments Incorporated Figure 9-6. Top Layer Copper Pullback on RF Pads www.ti.com CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 89 Product Folder Links: CC3235MODS CC3235MODSF CC3235MODAS CC3235MODASF
9.3.2.1 Antenna Placement and Routing
The antenna is the element used to convert the guided waves on the PCB traces to the free space electromagnetic radiation. The placement and layout of the antenna are the keys to increased range and data rates. Table 9-3 provides a summary of the recommended antennas to use with the CC3235MODx module. Table 9-3. Antenna Guidelines SR NO. GUIDELINES 1 Place the antenna on an edge or corner of the PCB.
2 Ensure that no signals are routed across the antenna elements on all the layers of the
PCB. Most antennas, including the chip antenna used on the LaunchPad™, require ground clearance on all the layers of the PCB. Ensure that the ground is cleared on the inner layers as well. Ensure that there is a provision to place matching components for the antenna. These must be tuned for the best return loss when the complete board is assembled. Any plastics or casing must also be mounted while tuning the antenna because this can impact the impedance.
5 Ensure that the antenna impedance is 50Ω because the module is rated to work only with
a 50Ω system.
6 In the case of printed antenna, ensure that the simulation is performed with the solder
mask in consideration. 7 Ensure that the antenna has a near omnidirectional pattern. The feed point of the antenna is required to be grounded. This is only for the antenna type used on the CC3235MODx Launchpad. See the specific antenna data sheets for the recommendations. Table 9-4 lists the recommended antennas to use with the CC3235MODx module. Other antennas may be available for use with the CC3235MODx modules. Table 9-4. Recommended Components CHOICE PART NUMBER MANUFACTURER NOTES
1 M830520 Ethertronics Can be placed on the edge of the PCB and uses much less
CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 www.ti.com
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9.3.2.2 Transmission Line Considerations
The RF signal from the module is routed to the antenna using a Coplanar Waveguide with ground (CPW-G) structure. CPW-G structure offers the maximum amount of isolation and the best possible shielding to the RF lines. In addition to the ground on the L1 layer, placing GND vias along the line also provides additional shielding. Figure 9-7 shows a cross section of the coplanar waveguide with the critical dimensions. Figure 9-8 shows the top view of the coplanar waveguide with GND and via stitching. Figure 9-7. Coplanar Waveguide (Cross Section) S W Figure 9-8. CPW With GND and Via Stitching (Top View) www.ti.com CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 91 Product Folder Links: CC3235MODS CC3235MODSF CC3235MODAS CC3235MODASF
The recommended values for the PCB are provided for 2-layer boards in Table 9-5 and 4-layer boards in Table 9-6. Table 9-5. Recommended PCB Values for 2-Layer Board (L1 to L2 = 42.1 mils) PARAMETER VALUE UNIT W 26 mils S 5.5 mils H 42.1 mils Er (FR-4 substrate) 4.2 F/m Table 9-6. Recommended PCB Values for 4-Layer Board (L1 to L2 = 16 mils) PARAMETER VALUE UNITS W 21 mils S 10 mils H 16 mils Er (FR-4 substrate) 4.5 F/m CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 www.ti.com
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9.3.3 CC3235MODAx RF Layout Recommendations
Use the following guidelines to lay out the CC3235MODAx module with an integrated antenna, as shown in Figure 9-9.
- The module must have an overhang of 1mm from the PCB edge.
- The module must have a 6mm clearance on all layers (no copper) to the left and right of the module placement.
- There must be at least one ground-reference plane under the module on the main PCB. Figure 9-9. CC3235MODAx Layout Guidelines www.ti.com CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 93 Product Folder Links: CC3235MODS CC3235MODSF CC3235MODAS CC3235MODASF
10 Environmental Requirements and SMT Specifications
10.1 PCB Bending
The PCB follows IPC-A-600J for PCB twist and warpage < 0.75% or 7.5 mil per inch.
10.2 Handling Environment
10.2.1 Terminals
The product is mounted with motherboard through land-grid array (LGA). To prevent poor soldering, do not make skin contact with the LGA portion.
10.2.2 Falling
The mounted components will be damaged if the product falls or is dropped. Such damage may cause the product to malfunction.
10.3 Storage Condition
10.3.1 Moisture Barrier Bag Before Opened
A moisture barrier bag must be stored in a temperature of less than 30°C with humidity under 85% RH. The calculated shelf life for the dry-packed product will be 24 months from the date the bag is sealed.
10.3.2 Moisture Barrier Bag Open
Humidity indicator cards must be blue, < 30%.
10.4 PCB Assembly Guide
The wireless MCU modules are packaged in a substrate base Leadless Quad Flatpack (QFM) package. Components were mounted onto the substrate with standard SMT process with the additional of a metal lid covering the top of the module. The module are designed with pull back leads for easy PCB layout and board mounting.
10.4.1 PCB Land Pattern and Thermal Vias
We recommended a solder mask-defined land pattern to provide a consistent soldering pad dimension in order to obtain better solder balancing and solder joint reliability. The PCB land pattern is 1:1 to the module soldering pad dimension. Thermal vias on PCB connected to other metal plane are for thermal dissipation purposes. It is critical to have sufficient thermal vias to avoid device thermal shutdown. Recommended vias size is 0.2mm and position not directly under solder paste to avoid solder dripping into the vias.
10.4.2 SMT Assembly Recommendations
The module surface mount assembly operations include:
- Screen printing the solder paste on the PCB
- Monitor the solder paste volume (uniformity)
- Package placement using standard SMT placement equipment
- X-ray pre-reflow check—paste bridging
- Reflow
- X-ray post-reflow check—solder bridging and voids CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 www.ti.com
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10.4.3 PCB Surface Finish Requirements
A uniform PCB plating thickness is key for high assembly yield. For an electroless nickel immersion gold finish, the gold thickness should range from 0.05µm to 0.20µm to avoid solder joint embrittlement. Using a PCB with Organic Solderability Preservative (OSP) coating finish is also recommended as an alternative to Ni-Au.
10.4.4 Solder Stencil
Solder paste deposition using a stencil-printing process involves the transfer of the solder paste through pre- defined apertures with the application of pressure. Stencil parameters such as aperture area ratio and the fabrication process have a significant impact on paste deposition. Inspection of the stencil prior to placement of package is highly recommended to improve board assembly yields.
10.4.5 Package Placement
Packages can be placed using standard pick and place equipment with an accuracy of ±0.05mm. Component pick and place systems are composed of a vision system that recognizes and positions the component and a mechanical system that physically performs the pick and place operation. Two commonly used types of vision systems are:
- A vision system that locates a package silhouette
- A vision system that locates individual pads on the interconnect pattern The second type renders more accurate placements but tends to be more expensive and time consuming. Both methods are acceptable since the parts align due to a self-centering features of the solder joint during solder reflow. It is recommended to release the package to 1 to 2 mils into the solder paste or with minimum force to avoid causing any possible damage to the thinner packages.
10.4.6 Solder Joint Inspection
After surface mount assembly, transmission X-ray should be used for sample monitoring of the solder attachment process. This identifies defects such as solder bridging, shorts, opens, and voids. It is also recommended to use side view inspection in addition to X-rays to determine if there are "Hour Glass" shaped solder and package tilting existing. The "Hour Glass" solder shape is not a reliable joint. 90° mirror projection can be used for side view inspection.
10.4.7 Rework and Replacement
TI recommends removal of modules by rework station applying a profile similar to the mounting process. Using a heat gun can sometimes cause damage to the module by overheating.
10.4.8 Solder Joint Voiding
TI recommends to control solder joint voiding to be less than 30% (per IPC-7093). Solder joint voids could be reduced by baking of components and PCB, minimized solder paste exposure duration, and reflow profile optimization.
10.5 Baking Conditions
Products require baking before mounting if:
- Humidity indicator cards read > 30%
- Temp < 30°C, humidity < 70% RH, over 96 hours Baking condition: 90°C, 12 to 24 hours Baking times: 1 time www.ti.com CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 95 Product Folder Links: CC3235MODS CC3235MODSF CC3235MODAS CC3235MODASF
10.6 Soldering and Reflow Condition
- Heating method: Conventional convection or IR convection
- Temperature measurement: Thermocouple d = 0.1mm to 0.2mm CA (K) or CC (T) at soldering portion or equivalent method
- Solder paste composition: SAC305
- Allowable reflow soldering times: two times based on the reflow soldering profile (see Figure 10-1)
- Temperature profile: Reflow soldering is done according to the temperature profile (see Figure 10-1).
- Peak temperature: 260°C Figure 10-1. Temperature Profile for Evaluation of Solder Heat Resistance of a Component (at Solder Joint) Table 10-1. Temperature Profile Profile Elements Convection or IR(1) Peak temperature range 235 to 240°C typical (260°C maximum) Pre-heat / soaking (150 to 200°C) 60 to 120 seconds Time above melting point 60 to 90 seconds Time with 5°C to peak 30 seconds maximum Ramp up < 3°C / second Ramp down < -6°C / second (1) For details, refer to the solder paste manufacturer's recommendation. Note TI does not recommend the use of conformal coating or similar material on the SimpleLink ™ module. This coating can lead to localized stress on the solder connections inside the module and impact the module reliability. Use caution during the module assembly process to the final PCB to avoid the presence of foreign material inside the module. CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 www.ti.com
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11 Device and Documentation Support
TI offers and extensive line of development tools. Tools and software to evaluate the performance of the device, generate code, and develop solutions are listed in this section.
11.1 Development Tools and Software
For the most up to date list of Development Tools and Software, visit the CC3235MOD tools and software page. Or, click on the Alert me button in the top-right corner of the page, to stay informed of updates related to the CC3235MOD. Pin Mux Tool The supported devices are: CC3200, CC3220x, and CC3235x. The Pin Mux Tool is a software tool that provides a graphical user interface (GUI) for configuring pin multiplexing settings, resolving conflicts, and specifying I/O cell characteristics for MPUs from TI. Results are output as C header/code files that can be imported into software development kits (SDKs) or used to configure customers' custom software. Version 3 of the Pin Mux Tool adds the capability of automatically selecting a mux configuration that satisfies the entered requirements. SimpleLink™ Wi-Fi® Starter Pro The supported devices are: CC3100, CC3200, CC3120R, CC3220x, CC3135, and CC3235x. The SimpleLink ™ Wi-Fi® Starter Pro mobile App is a new mobile application for SimpleLink™ provisioning. The app goes along with the embedded provisioning library and example that runs on the device side (see SimpleLink™ Wi-Fi® SDK plugin and TI SimpleLink ™ CC32XX Software Development Kit (SDK) ). The new provisioning release is a TI recommendation for Wi-Fi ® provisioning using SimpleLink™ Wi-Fi® products. The provisioning release implements advanced AP mode and SmartConfig ™ technology provisioning with feedback and fallback options to ensure successful process has been accomplished. Customers can use both embedded library and the mobile library for integration to their end products. SimpleLink™ CC32XX Software Development Kit (SDK) The CC3235x devices are supported. The SimpleLink ™ CC32XX SDK contains drivers for the CC3235 programmable MCU, more than 30 sample applications, and documentation needed to use the solution. It also contains the flash programmer, a command line tool for flashing software, configuring network and software parameters (SSID, access point channel, network profile, BS NIEW), system files, and user files (certificates, web pages, and more). This SDK can be used with TI’s SimpleLink ™ Wi-Fi® CC3235 LaunchPad ™ development kits. Uniflash Standalone Flash Tool for TI Microcontrollers (MCU), Sitara Processors & SimpleLink Devices The supported devices are CC3120R, CC3220x, CC3135, and CC3235x. CCS Uniflash is a standalone tool used to program on-chip flash memory on TI MCUs and on-board flash memory for Sitara ™ processors. Uniflash has a GUI, command line, and scripting interface. CCS Uniflash is available free of charge. SimpleLink™ Wi-Fi® Radio Testing Tool The supported devices are: CC3100, CC3200, CC3120R, CC3220, CC3135, and CC3235x. The SimpleLink™ Wi-Fi® Radio Testing Tool is a Windows-based software tool for RF evaluation and testing of SimpleLink ™ Wi-Fi® CC3x20 and CC3x35 designs during development and certification. The tool enables low-level radio testing capabilities by manually setting the radio into transmit or receive modes. Using the tool requires familiarity and knowledge of radio circuit theory and radio test methods. www.ti.com CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 97 Product Folder Links: CC3235MODS CC3235MODSF CC3235MODAS CC3235MODASF
Created for the internet-of-things (IoT), the SimpleLink ™ Wi-Fi® CC31xx and CC32xx family of devices include on-chip Wi-Fi ®, Internet, and robust security protocols with no prior Wi-Fi ® experience needed for faster development. For more information on these devices, visit SimpleLink™ Wi-Fi® family, Internet-on-a chip™ solutions. UniFlash Standalone Flash Tool for TI Microcontrollers (MCU), Sitara™ Processors and SimpleLink™ Devices CCS UniFlash is a standalone tool used to program on-chip flash memory on TI MCUs and on-board flash memory for Sitara™ processors. UniFlash has a GUI, command line, and scripting interface. CCS UniFlash is available free of charge.
11.2 Firmware Updates
TI updates features in the service pack for this module with no published schedule. Due to the ongoing changes, TI recommends users have the latest service pack in their module for production. To stay informed, sign up for updates using the SDK Alert me button in the top-right corner of the product page, or visit http://www.ti.com/tool/download/SIMPLELINK-CC32XX-SDK.
11.3 Device Nomenclature
To designate the stages in the product development cycle, TI assigns prefixes to the part numbers of the CC3235MODx and CC3235MODAx and support tools (see Figure 11-1). To designate the stages in the product development cycle, TI assigns prefixes to the part numbers of all microprocessors (MPUs) and support tools. Each device has one of three prefixes: X, P, or null (no prefix) (for example, CC3235MODxandCC3235MODAx). Texas Instruments recommends two of three possible prefix designators for its support tools: TMDX and TMDS. These prefixes represent evolutionary stages of product development from engineering prototypes (TMDX) through fully qualified production devices and tools (TMDS). Device development evolutionary flow: X Experimental device that is not necessarily representative of the final device's electrical specifications and may not use production assembly flow. P Prototype device that is not necessarily the final silicon die and may not necessarily meet final electrical specifications. null Production version of the silicon die that is fully qualified. Support tool development evolutionary flow: TMDX Development-support product that has not yet completed Texas Instruments internal qualification testing. TMDS Fully-qualified development-support product. X PREFIX X = preproduction device no prefix = production device CC 3235 MOD XXXX XXX R DEVICE FAMILY CC = wireless connectivity SERIES NUMBER 3 = Wi-Fi Centric PACKAGE DESIGNATOR MON = LGA package PACKAGING R = tape/reel MODULE MOD = module SM2 = S module SF12 = SF module X A = integral antenna No prefix = no antenna Figure 11-1. CC3235MODx and CC3235MODAx Module Nomenclature CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 www.ti.com
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For orderable part numbers of the CC3235MODx and CC3235MODAx devices in the QFM package type, see Section 13.2, see ti.com, or contact your TI sales representative.
11.4 Documentation Support
To receive notification of documentation updates — including silicon errata — go to the CC3235MOD product folder on ti.com. In the upper-right corner, click on Alert me to receive a weekly digest of any product information that has changed. For change details, check the revision history of any revised document. The current documentation that describes the processor, related peripherals, and other technical collateral is as follows. Application Reports CC3135 and CC3235 SimpleLink™ Wi-Fi® Embedded Programming User Guide CC3135 and CC3235 SimpleLink Wi-Fi Embedded Programming User Guide SimpleLink™ CC3135, CC3235 Wi- Fi® Internet-on-a chip™ Networking Sub-System Power Management This application report describes the best practices for power management and extended battery life for embedded low-power Wi-Fi devices such as the SimpleLink Wi-Fi Internet-on-a chip solution from Texas Instruments. SimpleLink™ CC31xx, CC32xx Wi- Fi® Internet-on-a chip™ Solution Built-In Security Features The SimpleLink Wi-Fi CC31xx and CC32xx Internet-on-a chip family of devices from Texas Instruments offer a wide range of built-in security features to help developers address a variety of security needs, which is achieved without any processing burden on the main microcontroller (MCU). This document describes these security-related features and provides recommendations for leveraging each in the context of practical system implementation. SimpleLink™ CC3135, CC3235 Wi- Fi® and Internet-of-Things Over-the- Air Update This document describes the OTA library for the SimpleLink Wi-Fi CC3x35 family of devices from Texas Instruments and explains how to prepare a new cloud-ready update to be downloaded by the OTA library. SimpleLink™ CC3135, CC3235 Wi- Fi® Internet-on-a chip™ Solution Device Provisioning This guide describes the provisioning process, which provides the SimpleLink Wi-Fi device with the information (network name, password, and so forth) needed to connect to a wireless network. Transfer of TI's Wi-Fi® Alliance Certifications to Products Based on SimpleLink™ This document explains how to employ the Wi-Fi® Alliance (WFA) derivative certification transfer policy to transfer a WFA certification, already obtained by Texas Instruments, to a system you have developed. Using Serial Flash on SimpleLink™ CC3135 and CC3235 Wi-Fi® and Internet-of-Things Devices This application note is divided into two parts. The first part provides important guidelines and best- practice design techniques to consider when choosing and embedding a serial Flash paired with the CC3135 and CC3235 (CC3x35) devices. The second part describes the file system, along with guidelines and considerations for system designers working with the CC3x35 devices. More Literature CC3235MODx SimpleLink™ Wi-Fi® and Internet-of-Things Hardware Design Files CC3220MODAx SimpleLink™ Wi-Fi® and Internet-of-Things Hardware Design Files CC3x35x SimpleLink™ Wi-Fi® and Internet-of-Things Design Checklist User's Guides CC3135 and CC3235 SimpleLink™ Wi-Fi® CC3135 and CC3235 SimpleLink Wi-Fi Embedded Programming User Guide www.ti.com CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 99 Product Folder Links: CC3235MODS CC3235MODSF CC3235MODAS CC3235MODASF
UniFlash SimpleLink™ CC31xx/32xx Wi-Fi® and IoC™ Solution ImageCreator and Pro This document describes the installation, operation, and usage of the SimpleLink ImageCreator tool as part of the UniFlash. SimpleLink™ Wi-Fi® and Internet-of-Things CC31xx and CC32xx Network Processor This document provides software (SW) programmers with all of the required knowledge for working with the networking subsystem of the SimpleLink Wi- Fi devices. This guide provides basic guidelines for writing robust, optimized networking host applications, and describes the capabilities of the networking subsystem. The guide contains some example code snapshots, to give users an idea of how to work with the host driver. More comprehensive code examples can be found in the formal software development kit (SDK). This guide does not provide a detailed description of the host driver APIs. SimpleLink™ Wi-Fi® CC3135 and CC3235 Provisioning for Mobile This guide describes TI’s SimpleLink Wi-Fi provisioning solution for mobile applications, specifically on the usage of the Android™ and IOS® building blocks for UI requirements, networking, and provisioning APIs required for building the mobile application. CC3235 SimpleLink™ Wi- Fi® and Internet of Things Technical Reference Manual This technical reference manual details the modules and peripherals of the CC3235 SimpleLink™ Wi-Fi® MCU. Each description presents the module or peripheral in a general sense. Not all features and functions of all modules or peripherals may be present on all devices. Pin functions, internal signal connections, and operational parameters differ from device to device. The user should consult the device-specific data sheet for these details. SimpleLink™ Wi-Fi® and Internet-on-a chip™ CC3135 and CC3235 Solution Radio Tool The Radio Tool serves as a control panel for direct access to the radio, and can be used for both the radio frequency (RF) evaluation and for certification purposes. This guide describes how to have the tool work seamlessly on Texas Instruments evaluation platforms such as the BoosterPack™ plus FTDI emulation board for CC3235 devices, and the LaunchPad™ for CC3235 devices. CC3235MOD SimpleLink™ Wi-Fi® LaunchPad™ Development Kit The CC3235MOD SimpleLink LaunchPad™ Development Kit (LAUNCHCC3235MOD) is a low-cost evaluation platform for Arm®Cortex®-M4- based MCUs. The LaunchPad design highlights the CC3235MOD Internet-on-a chip™ solution and Dual-Band Wi-Fi capabilities. The CC3235MOD LaunchPad also features temperature and accelerometer sensors, programmable user buttons, an RGB LED for custom applications, and onboard emulation for debugging. The stackable headers of the CC3235MOD LaunchPad XL interface demonstrate how easy it is to expand the functionality of the LaunchPad when interfacing with other peripherals on many existing BoosterPack™ Plug-in Module add-on boards, such as graphical displays, audio codecs, antenna selection, environmental sensing, and more.
11.5 Related Links
The table below lists quick access links. Categories include technical documents, support and community resources, tools and software, and quick access to order now. Table 11-1. Related Links PARTS PRODUCT FOLDER ORDER NOW TECHNICAL DOCUMENTS TOOLS & SOFTWARE SUPPORT & COMMUNITY CC3235MODS Click here Click here Click here Click here Click here CC3235MODSF Click here Click here Click here Click here Click here CC3235MODAS Click here Click here Click here Click here Click here CC3235MODASF Click here Click here Click here Click here Click here CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 www.ti.com
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11.6 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight from the experts. Search existing answers or ask your own question to get the quick design help you need. Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use.
11.7 Trademarks
WPA™, WPA2™, WPA3™, and Wi-Fi CERTIFIED™ are trademarks of Wi-Fi Alliance. SimpleLink™, E2E™, BoosterPack™, LaunchPad™, Sitara™, and TI E2E™ are trademarks of Texas Instruments. Macronix™ is a trademark of Macronix International Co. Macrocell™ is a trademark of Kappa Global Inc. Android™ is a trademark of Google LLC. Wi-Fi Alliance®, Wi-Fi®, and Wi-Fi Direct® are registered trademarks of Wi-Fi Alliance. Arm®, Cortex®, Thumb® are registered trademarks of Arm Limited. Bluetooth® is a registered trademark of Bluetooth SIG, Inc. Zigbee® is a registered trademark of Zigbee Alliance Inc. IOS® is a registered trademark of Cisco. All trademarks are the property of their respective owners.
11.8 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
11.9 Glossary
TI Glossary This glossary lists and explains terms, acronyms, and definitions. Changes from Revision B (May 2021) to Revision C (December 2024) Page Changes from August 20, 2020 to May 13, 2021 (from Revision A (Aug 2020) to Revision B (May 2021)) Page www.ti.com CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 101 Product Folder Links: CC3235MODS CC3235MODSF CC3235MODAS CC3235MODASF
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document.
13.1 Mechanical, Land, and Solder Paste Drawings
The total height of the module is 2.4 mm. The weight of the CC3235MODx module is 1.8g typical. The weight of the CC3235MODAx module is 1.8g typical. Note 1. All dimensions are in mm. 2. Solder mask should be the same or 5% larger than the dimension of the pad. 3. Solder paste must be the same as the pin for all peripheral pads. For ground pins, make the solder paste 20% smaller than the pad.
13.2 Package Option Addendum
The CC3235MODx is only offered in a 750-unit reel. The CC3235MODAx is only offered in a 700-unit reel. CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 www.ti.com
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Product Folder Links: CC3235MODS CC3235MODSF CC3235MODAS CC3235MODASF
13.2.1 Packaging Information
Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish MSL, Peak Temp (3) Op Temp (°C) Device Marking(4) (5) CC3235MODSF12MOBR ACTIVE QFM MOB 63 750 Green (RoHS and no Sb/Br) ENIG 3, 260°C –40 to 85 CC3235MODSF12MOB CC3235MODSM2MOBR ACTIVE QFM MOB 63 750 Green (RoHS and no Sb/Br) ENIG 3, 260°C –40 to 85 CC3235MODSM2MOB CC3235MODASF12MONR PREVIEW QFM MON 63 700 Green (RoHS and no Sb/Br) ENIG 3, 260°C –40 to 85 CC3235MODASF12MON CC3235MODASM2MONR PREVIEW QFM MON 63 700 Green (RoHS and no Sb/Br) ENIG 3, 260°C –40 to 85 CC3235MODASM2MON (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PRE_PROD Unannounced device, not in production, not available for mass market, nor on the web, samples not available. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. space (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) space (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. space (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device space (5) Multiple Device markings will be inside parentheses. Only on Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. Important Information and Disclaimer: The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. www.ti.com CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 103 Product Folder Links: CC3235MODS CC3235MODSF CC3235MODAS CC3235MODASF
13.2.2 Tape and Reel Information
D N D 330.0 max N 101±1.0 W1 44±2.0 W2 45.8 max CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 www.ti.com
104 Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated
Product Folder Links: CC3235MODS CC3235MODSF CC3235MODAS CC3235MODASF
13.2.3 CC3235MODx Tape Specifications
M/N: CC3235MODXXLTC: YMLLLLP SSSSFCC ID: Z64-CC3220MODIC: 451I-CC3220MOD 201-170386 R CMIIT ID: XXXXYYZZZZ(M) XXXXXXXXXX-VVSS 1. 10 sprocket hole pitch cumulative tolerance ±0.20. 2. Material: Polystyrene 3. All dimensions meet EIA-481-E requirements. 4. Thickness: 0.2±0.05mm
13.2.4 CC3235MODAx Tape Specifications
- 10 sprocket hole pitch cumulative tolerance ±0.20. 2. Material: Polystyrene 3. All dimensions meet EIA-481-E requirements. 4. Thickness: 0.2±0.05mm www.ti.com CC3235MODS, CC3235MODSF, CC3235MODAS, CC3235MODASF SWRS243C – FEBRUARY 2020 – REVISED DECEMBER 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 105 Product Folder Links: CC3235MODS CC3235MODSF CC3235MODAS CC3235MODASF
www.ti.com 6-Feb-2026 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) CC3235MODASF12MONR Active Production QFM (MON) | 63 700 | LARGE T&R Yes NIAU Level-3-260C-168 HR -40 to 85 CC3235MODASF12MON Z64-CC3235MOD 451I-CC3235MOD 201-190033 XXXXXXXXXX(M) CC3235MODASM2MONR Active Production QFM (MON) | 63 700 | LARGE T&R Yes NIAU Level-3-260C-168 HR -40 to 85 CC3235MODASM2MON Z64-CC3235MOD 451I-CC3235MOD 201-190033 CC3235MODSF12MOBR Active Production QFM (MOB) | 63 750 | LARGE T&R Yes NIAU Level-3-260C-168 HR -40 to 85 CC3235MODSF12MOB Z64-CC3235MOD 451I-CC3235MOD 201-190033 CC3235MODSM2MOBR Active Production QFM (MOB) | 63 750 | LARGE T&R Yes NIAU Level-3-260C-168 HR -40 to 85 CC3235MODSM2MOB Z64-CC3235MOD 451I-CC3235MOD 201-190033 E (1) Status: For more details on status, see our product life cycle. (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Addendum-Page 1
www.ti.com 6-Feb-2026 Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2
www.ti.com PACKAGE OUTLINE C PICK & PLACE NOZZLE AREA 2.40 2.03 0.88 0.72 2X 12.7 19.05 PADS 1-16 & 28-43 30X 1.27 54X 0.81 0.08 2 0.05 1.5 2.224 6X 3 6X 3 20X 1.27 11.769 4.321 19.038 PADS 17-27 & 44-54 19.61 0.1 16.74 0.1 0.08 C A 25.25 24.75 B 20.75 20.25 (0.326) TYP QFM - 2.4 mm max heightMON0063A QUAD FLAT MODULE 4223415/D 11/2021 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. SEATING PLANE PIN 1 ID X1)(45 PIN 1 ID 17 27 28 434454
0.15 C A B
0.05 C 56 59 62 PKG PKG SCALE 0.600
www.ti.com EXAMPLE BOARD LAYOUT 54X ( 0.81) (1.27) TYP (19.048) 9X ( 2) (1.5) 6X (3) (1.5) 6X (3)
0.05 MIN
(25) (20.5) (0.65) TYP (0.65) TYP ( 0.2) TYP VIA (R0.05) ALL PADS ( 8.1)
0.05 MIN TYP
QFM - 2.4 mm max heightMON0063A QUAD FLAT MODULE 4223415/D 11/2021 NOTES: (continued) 3. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). 4. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view. It is recommended that vias under paste be filled, plugged or tented. LAND PATTERN EXAMPLE SOLDER MASK DEFINED SCALE:5X PATTERN PKG SEE DETAIL 17 27 4454
61 METAL UNDER
(45 X 1) 15 29 PKG NO TRACES, VIAS, GND PLANE OR SILK SCREEN SHOULD BE LOCATED WITHIN THIS AREA SOLDER MASK OPENING METAL UNDER SOLDER MASK SIGNAL PADS DETAIL EXPOSED METAL
www.ti.com EXAMPLE STENCIL DESIGN 54X ( 0.81) (1.27) TYP (19.048) (16.1) (3) TYP (1.5) TYP (1.5) TYP (3) TYP (R0.05) TYP (0.55) TYP (R0.05) TYP (0.45) (1.54) (0.55) TYP (0.55) TYP( 0.89) TYP (R0.05) TYP (8.05) (3.724) QFM - 2.4 mm max heightMON0063A QUAD FLAT MODULE 4223415/D 11/2021 NOTES: (continued) 5. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. PKG SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL EXPOSED PADS PRINTED SOLDER COVERAGE BY AREA PAD 55: 77.5 %, PADS 56 - 63: 79% SCALE:6X SEE DETAILS SOLDER MASK EDGE SOLDER MASK EDGE, TYP PATTERN 17 27 4454 15 29 PKG PAD 55 DETAIL SCALE:10X EXPOSED METAL TYP PADS 56 - 63 DETAIL SCALE:10X
www.ti.com PACKAGE OUTLINE C 2X (0.38) 2X (0.45) 2.40 2.03 0.88 0.72 2X 12.7 19.05 30X 1.27 54X 0.81 0.08 2 0.05 1.5 1.5 6X 3 6X 3 20X 1.27 A 17.75 17.25 B 20.75 20.25 (0.3) TYP (0.3) TYP (0.32) PADS 1,16,28 & 43 QFM - 2.4 mm max heightMOB0063A QUAD FLAT MODULE 4221462/D 06/2019 NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. AREA PIN 1 INDEX 0.1 X1)(45 PIN 1 ID 17 27 434454 0.05 C 56 59 62 SCALE 0.650
www.ti.com EXAMPLE BOARD LAYOUT 54X ( 0.81) (1.27) TYP 2X (19.1) 9X ( 2) (1.5) 6X (3) (1.5) 6X (3) 2X (16.1) (0.65) TYP (0.65) TYP ( 0.2) TYP VIA (R0.05) ALL PADS ( 8.1) QFM - 2.4 mm max heightMOB0063A QUAD FLAT MODULE 4221462/D 06/2019 NOTES: (continued) 3. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). LAND PATTERN EXAMPLE SOLDER MASK DEFINED SCALE:6X PKG PKG SEE DETAIL 17 27 4454 METAL UNDER SOLDER MASK SOLDER MASK OPENING (45 X 1) SOLDER MASK OPENING METAL UNDER SOLDER MASK SIGNAL PADS DETAIL
www.ti.com EXAMPLE STENCIL DESIGN 54X ( 0.81) (1.27) TYP 2X (19.1) 2X (16.1) (3) TYP (1.5) TYP (1.5) TYP (3) TYP (R0.05) TYP (0.55) TYP (R0.05) TYP (0.45) (1.54) (0.55) TYP (0.55) TYP( 0.89) TYP (R0.05) TYP QFM - 2.4 mm max heightMOB0063A QUAD FLAT MODULE 4221462/D 06/2019 NOTES: (continued) 4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. PKG PKG 17 27 4454 SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL EXPOSED PADS PRINTED SOLDER COVERAGE BY AREA PAD 55: 77.5 %, PADS 56 - 63: 79% SCALE:6X SEE DETAILS SOLDER MASK EDGE SOLDER MASK EDGE, TYP PAD 55 DETAIL SCALE:10X METAL TYP PADS 56 - 63 DETAIL SCALE:10X
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