CC2640R2FRGZRG4.B

CC2640R2F TI | Alldatasheet

Document overview

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• PDF pages: 74

Technical content

SimpleLink™ Bluetooth® 5.1 Low Energy Wireless MCU

1 Features

• Microcontroller – Powerful Arm ® Cortex®-M3 – EEMBC CoreMark ® score: 142 – Up to 48-MHz clock speed – 275KB of nonvolatile memory including 128KB of in-system Programmable Flash – Up to 28KB of system SRAM, of which 20KB is ultra-low leakage SRAM – 8KB of SRAM for cache or system RAM use – 2-Pin cJTAG and JTAG debugging – Supports over-the-air upgrade (OTA)
• Ultra-low power sensor controller – Can run autonomous from the rest of the system – 16-bit architecture – 2KB of ultra-low leakage SRAM for code and data
• Efficient code size architecture, placing drivers, TI-RTOS, and Bluetooth® software in ROM to make more Flash available for the application
• RoHS-compliant packages – 2.7-mm × 2.7-mm YFV DSBGA34 (14 GPIOs) – 4-mm × 4-mm RSM VQFN32 (10 GPIOs) – 5-mm × 5-mm RHB VQFN32 (15 GPIOs) – 7-mm × 7-mm RGZ VQFN48 (31 GPIOs)
• Peripherals – All digital peripheral pins can be routed to any GPIO – Four general-purpose timer modules (eight 16-bit or four 32-bit timers, PWM each) – 12-bit ADC, 200-ksamples/s, 8-channel analog MUX – Continuous time comparator – Ultra-low power analog comparator – Programmable current source – UART, I2C, and I2S – 2× SSI (SPI, MICROWIRE, TI) – Real-Time Clock (RTC) – AES-128 security module – True Random Number Generator (TRNG) – Support for eight capacitive-sensing buttons – Integrated temperature sensor
• External system – On-chip internal DC/DC converter – Seamless integration with CC2590 and CC2592 range extenders – Very few external components – Pin compatible with the SimpleLink™ CC2640 and CC2650 devices in all VQFN packages – Pin compatible with the SimpleLink™ CC2642R and CC2652R devices in 7-mm x 7-mm VQFN packages – Pin compatible with the SimpleLink™ CC1350 device in 4-mm × 4-mm and 5-mm × 5-mm VQFN packages
• Low power – Wide supply voltage range
• Normal operation: 1.8 to 3.8 V
• External regulator mode: 1.7 to 1.95 V – Active-Mode RX: 5.9 mA – Active-Mode TX at 0 dBm: 6.1 mA – Active-Mode TX at +5 dBm: 9.1 mA – Active-Mode MCU: 61 µA/MHz – Active-Mode MCU: 48.5 CoreMark/mA – Active-Mode sensor controller: 0.4mA + 8.2 µA/MHz – Standby: 1.1 µA (RTC running and RAM/CPU retention) – Shutdown: 100 nA (wake up on external events)
• RF section – 2.4-GHz RF transceiver compatible with Bluetooth® Low Energy 5.1 and earlier LE specifications – Excellent receiver sensitivity (–97 dBm for BLE), selectivity, and blocking performance – Link budget of 102 dB for BLE – Programmable output power up to +5 dBm – Single-ended or differential RF interface – Suitable for systems targeting compliance with worldwide radio frequency regulations
• ETSI EN 300 328 (Europe)
• EN 300 440 Class 2 (Europe)
• FCC CFR47 Part 15 (US)
• ARIB STD-T66 (Japan) www.ti.com CC2640R2F SWRS204C – DECEMBER 2016 – REVISED SEPTEMBER 2020 Copyright © 2020 Texas Instruments Incorporated Submit Document Feedback 1 Product Folder Links: CC2640R2F CC2640R2F SWRS204C – DECEMBER 2016 – REVISED SEPTEMBER 2020 An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA.

• Development Tools and Software – Full-feature development kits – Multiple reference designs – SmartRF™ Studio – Sensor Controller Studio – IAR Embedded Workbench® for Arm® – Code Composer Studio™ Integrated Development Environment (IDE) – Code Composer Studio™ Cloud IDE

2 Applications

• Home and Building Automation – Connected appliances – Lighting – Smart locks – Gateways – Security Systems
• Industrial – Factory automation – Asset tracking and management – HMI – Access control
• Electronic Point Of Sale (EPOS) – Electronic Shelf Label (ESL)
• Health and Medical – Electronic thermometers – SpO2 – Blood glucose monitors and blood pressure monitors – Weigh scales – Hearing aids
• Sports and Fitness – Wearable fitness and activity monitors – Smart trackers – Patient monitors – Fitness machines
• HID – Gaming – Pointing devices (wireless keyboard and mouse)

3 Description

The CC2640R2F device is a 2.4 GHz wireless microcontroller (MCU) supporting Bluetooth® 5.1 Low Energy and Proprietary 2.4 GHz applications. The device is optimized for low-power wireless communication and advanced sensing in building security systems , HVAC, asset tracking , and medical markets, and applications where industrial performance is required. The highlighted features of this device include:

• Support for Bluetooth ® 5.1 features: LE Coded PHYs (Long Range), LE 2-Mbit PHY (High Speed), Advertising Extensions, Multiple Advertisement Sets, as well as backwards compatibility and support for key features from the Bluetooth ® 5.0 and earlier Low Energy specifications.
• Fully-qualified Bluetooth ® 5.1 software protocol stack included with the SimpleLink™ CC2640R2F Software Development Kit (SDK) for developing applications on the powerful Arm® Cortex®-M3 processor.
• Longer battery life wireless applications with low standby current of 1.1 µA with full RAM retention.
• Advanced sensing with a programmable, autonomous ultra-low power Sensor Controller CPU with fast wake- up capability. As an example, the sensor controller is capable of 1-Hz ADC sampling at 1 µA system current.
• Dedicated software controlled radio controller (Arm® Cortex®-M0) providing flexible low-power RF transceiver capability to support multiple physical layers and RF standards, such as real-time localization (RTLS) technologies.
• Excellent radio sensitivity and robustness (selectivity and blocking) performance for Bluetooth ® Low Energy (-103 dBm for 125-kbps LE Coded PHY). The CC2640R2F device is part of the SimpleLink™ microcontroller (MCU) platform, which consists of Wi-Fi®, Bluetooth ® Low Energy, Thread, ZigBee®, Sub-1 GHz MCUs, and host MCUs that all share a common, easy-to-use development environment with a single core software development kit (SDK) and rich tool set. A one-time integration of the SimpleLink ™ platform enables you to add any combination of the portfolio’s devices into your design, allowing 100 percent code reuse when your design requirements change. For more information, visit SimpleLink™ MCU platform. Device Information (1) PART NUMBER PACKAGE BODY SIZE (NOM) CC2640R2FRGZ VQFN (48) 7.00 mm × 7.00 mm CC2640R2FRHB VQFN (32) 5.00 mm × 5.00 mm CC2640R2FRSM VQFN (32) 4.00 mm × 4.00 mm CC2640R2F SWRS204C – DECEMBER 2016 – REVISED SEPTEMBER 2020 www.ti.com

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Device Information (1) (continued) PART NUMBER PACKAGE BODY SIZE (NOM) CC2640R2FYFV DSBGA (34) 2.70 mm × 2.70 mm (1) For more information, see Section 12. www.ti.com CC2640R2F SWRS204C – DECEMBER 2016 – REVISED SEPTEMBER 2020 Copyright © 2020 Texas Instruments Incorporated Submit Document Feedback 3 Product Folder Links: CC2640R2F

4 Functional Block Diagram

Figure 4-1 shows a block diagram for the CC2640R2F device. SimpleLink CC26xx Wireless MCU Main CPU: 128-KB Flash Sensor Controller cJTAG 20-KB SRAM ROM ARM Cortex-M3 DC-DC Converter RF Core ARM Cortex-M0 DSP modem 4-KB SRAM ROM Sensor Controller Engine 2× Comparator 12-bit ADC, 200 ks/s Constant Current Source SPI-I2C Digital Sensor IF 2-KB SRAM Time-to-digital Converter General Peripherals / Modules 4× 32-bit Timers 2× SSI (SPI, µW, TI) Watchdog Timer Temp. / Batt. Monitor RTC I2C UART I2S 10 / 14 / 15 / 31 GPIOs AES 32 ch. µDMA ADC Digital PLL Up to 48 MHz 61 µA/MHz TRNG ADC 8-KB cache Copyright © 2016, Texas Instruments Incorporated Figure 4-1. Block Diagram CC2640R2F SWRS204C – DECEMBER 2016 – REVISED SEPTEMBER 2020 www.ti.com

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7.5 Pin Diagram – YFV (Chip Scale, DSBGA)

7.6 Signal Descriptions – YFV (Chip Scale, DSBGA)

10.2 5 × 5 External Differential (5XD) Application 10.3 4 × 4 External Single-ended (4XS) Application

12 Mechanical, Packaging, and Orderable

www.ti.com CC2640R2F SWRS204C – DECEMBER 2016 – REVISED SEPTEMBER 2020 Copyright © 2020 Texas Instruments Incorporated Submit Document Feedback 5 Product Folder Links: CC2640R2F

5 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision B (January 2018) to Revision C (September 2020) Page CC2640R2F SWRS204C – DECEMBER 2016 – REVISED SEPTEMBER 2020 www.ti.com

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6 Device Comparison

Table 6-1. Device Family Overview Device PHY Support Flash (KB) RAM (KB) GPIO Package(1) CC2640R2Fxxx(2) Bluetooth low energy (Normal, High Speed, Long Range) 128 20 31, 15, 14, 10 RGZ, RHB, YFV, RSM CC2640F128xxx Bluetooth low energy (Normal) 128 20 31, 15, 10 RGZ, RHB, RSM CC2650F128xxx Multi-Protocol(3) 128 20 31, 15, 10 RGZ, RHB, RSM CC2630F128xxx IEEE 802.15.4 (/6LoWPAN) 128 20 31, 15, 10 RGZ, RHB, RSM CC2620F128xxx IEEE 802.15.4 (RF4CE) 128 20 31, 10 RGZ, RSM (1) Package designator replaces the xxx in device name to form a complete device name, RGZ is 7-mm × 7-mm VQFN48, RHB is 5-mm × 5-mm VQFN32, RSM is 4-mm × 4-mm VQFN32, and YFV is 2.7-mm × 2.7-mm DSBGA. (2) CC2640R2Fxxx devices contain Bluetooth Low Energy Host & Controller libraries in ROM, leaving more of the 128KB Flash memory available for the customer application when used with supported BLE-Stack software protocol stack releases. Actual use of ROM and Flash memory by the protocol stack may vary depending on device software configuration. See www.ti.com for more details. (3) The CC2650 device supports all PHYs and can be reflashed to run all the supported standards.

6.1 Related Products

TI's Wireless Connectivity The wireless connectivity portfolio offers a wide selection of low-power RF solutions suitable for a broad range of applications. The offerings range from fully customized solutions to turn key offerings with pre-certified hardware and software (protocol). TI's SimpleLink™ Sub-1 GHz Wireless MCUs Long-range, low-power wireless connectivity solutions are offered in a wide range of Sub-1 GHz ISM bands. Companion Products Companion Products Review products that are frequently purchased or used in conjunction with this product. SimpleLink™ CC2640R2 Wireless MCU LaunchPad™ Development Kit The CC2640R2 LaunchPad™ development kit brings easy Bluetooth® low energy (BLE) connection to the LaunchPad ecosystem with the SimpleLink ultra-low power CC26xx family of devices. Compared to the CC2650 LaunchPad, the CC2640R2 LaunchPad provides the following:

• More free flash memory for the user application in the CC2640R2 wireless MCU
• Out-of-the-box support for Bluetooth 4.2 specification
• 4× faster Over-the-Air download speed compared to Bluetooth 4.1 SimpleLink™ Bluetooth low energy/Multi- standard SensorTag The new SensorTag IoT kit invites you to realize your cloud-connected product idea. The new SensorTag now includes 10 low-power MEMS sensors in a tiny red package. And it is expandable with DevPacks to make it easy to add your own sensors or actuators. Reference Designs for CC2640 TI Designs Reference Design Library is a robust reference design library spanning analog, embedded processor and connectivity. Created by TI experts to help you jump-start your system design, all TI Designs include schematic or block diagrams, BOMs, and design files to speed your time to market. Search and download designs at ti.com/tidesigns. www.ti.com CC2640R2F SWRS204C – DECEMBER 2016 – REVISED SEPTEMBER 2020 Copyright © 2020 Texas Instruments Incorporated Submit Document Feedback 7 Product Folder Links: CC2640R2F

7 Terminal Configuration and Functions

7.1 Pin Diagram – RGZ Package

DIO_25 38 DIO_24 37 DCDC_SW33 DIO_18 RESET_N35 DIO_2336 X32K_Q2 4 X32K_Q1 3 RF_N 2 RF_P 1 DIO_2232 DIO_2131 DIO_2030 DIO_1929 DIO_0 5 DIO_1 6 DIO_2 7 JTAG_TCKC25 DIO_15 DIO_14 VDDR 45 VDDR_RF 48 DIO_17 DIO_16 VDDS_DCDC DIO_26 DIO_12 DIO_13 VDDS2 DIO_11 DIO_10 DIO_5 DIO_6 DIO_7 DIO_3 DIO_4 X24M_P X24M_N DIO_8 DIO_9 DIO_28 VDDS3 DCOUPL JTAG_TMSC DIO_29 DIO_30 DIO_27 VDDS Figure 7-1. RGZ Package 48-Pin VQFN (7-mm × 7-mm) Pinout, 0.5-mm Pitch I/O pins marked in Figure 7-1 in bold have high-drive capabilities; they are the following:

• Pin 10, DIO_5
• Pin 11, DIO_6
• Pin 12, DIO_7
• Pin 24, JTAG_TMSC
• Pin 26, DIO_16
• Pin 27, DIO_17 I/O pins marked in Figure 7-1 in italics have analog capabilities; they are the following:
• Pin 36, DIO_23
• Pin 37, DIO_24
• Pin 38, DIO_25
• Pin 39, DIO_26
• Pin 40, DIO_27
• Pin 41, DIO_28
• Pin 42, DIO_29
• Pin 43, DIO_30 CC2640R2F SWRS204C – DECEMBER 2016 – REVISED SEPTEMBER 2020 www.ti.com

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7.2 Signal Descriptions – RGZ Package

Table 7-1. Signal Descriptions – RGZ Package NAME NO. TYPE DESCRIPTION DCDC_SW 33 Power Output from internal DC/DC(1) DCOUPL 23 Power 1.27-V regulated digital-supply decoupling capacitor(2) DIO_0 5 Digital I/O GPIO, Sensor Controller DIO_1 6 Digital I/O GPIO, Sensor Controller DIO_2 7 Digital I/O GPIO, Sensor Controller DIO_3 8 Digital I/O GPIO, Sensor Controller DIO_4 9 Digital I/O GPIO, Sensor Controller DIO_5 10 Digital I/O GPIO, Sensor Controller, high-drive capability DIO_6 11 Digital I/O GPIO, Sensor Controller, high-drive capability DIO_7 12 Digital I/O GPIO, Sensor Controller, high-drive capability DIO_8 14 Digital I/O GPIO DIO_9 15 Digital I/O GPIO DIO_10 16 Digital I/O GPIO DIO_11 17 Digital I/O GPIO DIO_12 18 Digital I/O GPIO DIO_13 19 Digital I/O GPIO DIO_14 20 Digital I/O GPIO DIO_15 21 Digital I/O GPIO DIO_16 26 Digital I/O GPIO, JTAG_TDO, high-drive capability DIO_17 27 Digital I/O GPIO, JTAG_TDI, high-drive capability DIO_18 28 Digital I/O GPIO DIO_19 29 Digital I/O GPIO DIO_20 30 Digital I/O GPIO DIO_21 31 Digital I/O GPIO DIO_22 32 Digital I/O GPIO DIO_23 36 Digital/Analog I/O GPIO, Sensor Controller, Analog DIO_24 37 Digital/Analog I/O GPIO, Sensor Controller, Analog DIO_25 38 Digital/Analog I/O GPIO, Sensor Controller, Analog DIO_26 39 Digital/Analog I/O GPIO, Sensor Controller, Analog DIO_27 40 Digital/Analog I/O GPIO, Sensor Controller, Analog DIO_28 41 Digital/Analog I/O GPIO, Sensor Controller, Analog DIO_29 42 Digital/Analog I/O GPIO, Sensor Controller, Analog DIO_30 43 Digital/Analog I/O GPIO, Sensor Controller, Analog JTAG_TMSC 24 Digital I/O JTAG TMSC, high-drive capability JTAG_TCKC 25 Digital I/O JTAG TCKC(3) RESET_N 35 Digital input Reset, active-low. No internal pullup. RF_P 1 RF I/O Positive RF input signal to LNA during RX Positive RF output signal to PA during TX RF_N 2 RF I/O Negative RF input signal to LNA during RX Negative RF output signal to PA during TX VDDR 45 Power 1.7-V to 1.95-V supply, typically connect to output of internal DC/DC(2) (4) VDDR_RF 48 Power 1.7-V to 1.95-V supply, typically connect to output of internal DC/DC(2) (5) www.ti.com CC2640R2F SWRS204C – DECEMBER 2016 – REVISED SEPTEMBER 2020 Copyright © 2020 Texas Instruments Incorporated Submit Document Feedback 9 Product Folder Links: CC2640R2F

Table 7-1. Signal Descriptions – RGZ Package (continued) NAME NO. TYPE DESCRIPTION VDDS 44 Power 1.8-V to 3.8-V main chip supply(1) VDDS2 13 Power 1.8-V to 3.8-V DIO supply(1) VDDS3 22 Power 1.8-V to 3.8-V DIO supply(1) VDDS_DCDC 34 Power 1.8-V to 3.8-V DC/DC supply X32K_Q1 3 Analog I/O 32-kHz crystal oscillator pin 1 X32K_Q2 4 Analog I/O 32-kHz crystal oscillator pin 2 X24M_N 46 Analog I/O 24-MHz crystal oscillator pin 1 X24M_P 47 Analog I/O 24-MHz crystal oscillator pin 2 EGP Power Ground – Exposed Ground Pad (1) For more details, see the technical reference manual (listed in Section 11.3). (2) Do not supply external circuitry from this pin. (3) For design consideration regarding noise immunity for this pin, see the JTAG Interface chapter in the CC13x0, CC26x0 SimpleLink™ Wireless MCU Technical Reference Manual (4) If internal DC/DC is not used, this pin is supplied internally from the main LDO. (5) If internal DC/DC is not used, this pin must be connected to VDDR for supply from the main LDO. CC2640R2F SWRS204C – DECEMBER 2016 – REVISED SEPTEMBER 2020 www.ti.com

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7.3 Pin Diagram – RHB Package

DIO_10 DIO_7 DIO_9 DIO_8 DCDC_SW RESET_N VDDS_DCDC DIO_11 VDDR_RF X24M_N X24M_P VDDR VDDS DIO_13 DIO_14 DIO_12 DIO_3 JTAG_TMSC DIO_4 DCOUPL VDDS2 JTAG_TCKC DIO_5 DIO_6 RF_P RF_N RX_TX DIO_0 DIO_1 DIO_2 X32K_Q1 X32K_Q2 Figure 7-2. RHB Package 32-Pin VQFN (5-mm × 5-mm) Pinout, 0.5-mm Pitch I/O pins marked in Figure 7-2 in bold have high-drive capabilities; they are the following:

• Pin 8, DIO_2
• Pin 9, DIO_3
• Pin 10, DIO_4
• Pin 13, JTAG_TMSC
• Pin 15, DIO_5
• Pin 16, DIO_6 I/O pins marked in Figure 7-2 in italics have analog capabilities; they are the following:
• Pin 20, DIO_7
• Pin 21, DIO_8
• Pin 22, DIO_9
• Pin 23, DIO_10
• Pin 24, DIO_11
• Pin 25, DIO_12
• Pin 26, DIO_13
• Pin 27, DIO_14 www.ti.com CC2640R2F SWRS204C – DECEMBER 2016 – REVISED SEPTEMBER 2020 Copyright © 2020 Texas Instruments Incorporated Submit Document Feedback 11 Product Folder Links: CC2640R2F

7.4 Signal Descriptions – RHB Package

Table 7-2. Signal Descriptions – RHB Package NAME NO. TYPE DESCRIPTION DCDC_SW 17 Power Output from internal DC/DC(1) DCOUPL 12 Power 1.27-V regulated digital-supply decoupling(2) DIO_0 6 Digital I/O GPIO, Sensor Controller DIO_1 7 Digital I/O GPIO, Sensor Controller DIO_2 8 Digital I/O GPIO, Sensor Controller, high-drive capability DIO_3 9 Digital I/O GPIO, Sensor Controller, high-drive capability DIO_4 10 Digital I/O GPIO, Sensor Controller, high-drive capability DIO_5 15 Digital I/O GPIO, High drive capability, JTAG_TDO DIO_6 16 Digital I/O GPIO, High drive capability, JTAG_TDI DIO_7 20 Digital/Analog I/O GPIO, Sensor Controller, Analog DIO_8 21 Digital/Analog I/O GPIO, Sensor Controller, Analog DIO_9 22 Digital/Analog I/O GPIO, Sensor Controller, Analog DIO_10 23 Digital/Analog I/O GPIO, Sensor Controller, Analog DIO_11 24 Digital/Analog I/O GPIO, Sensor Controller, Analog DIO_12 25 Digital/Analog I/O GPIO, Sensor Controller, Analog DIO_13 26 Digital/Analog I/O GPIO, Sensor Controller, Analog DIO_14 27 Digital/Analog I/O GPIO, Sensor Controller, Analog JTAG_TMSC 13 Digital I/O JTAG TMSC, high-drive capability JTAG_TCKC 14 Digital I/O JTAG TCKC(3) RESET_N 19 Digital input Reset, active-low. No internal pullup. RF_N 2 RF I/O Negative RF input signal to LNA during RX Negative RF output signal to PA during TX RF_P 1 RF I/O Positive RF input signal to LNA during RX Positive RF output signal to PA during TX RX_TX 3 RF I/O Optional bias pin for the RF LNA VDDR 29 Power 1.7-V to 1.95-V supply, typically connect to output of internal DC/DC(4) (2) VDDR_RF 32 Power 1.7-V to 1.95-V supply, typically connect to output of internal DC/DC(2) (5) VDDS 28 Power 1.8-V to 3.8-V main chip supply(1) VDDS2 11 Power 1.8-V to 3.8-V GPIO supply(1) VDDS_DCDC 18 Power 1.8-V to 3.8-V DC/DC supply X32K_Q1 4 Analog I/O 32-kHz crystal oscillator pin 1 X32K_Q2 5 Analog I/O 32-kHz crystal oscillator pin 2 X24M_N 30 Analog I/O 24-MHz crystal oscillator pin 1 X24M_P 31 Analog I/O 24-MHz crystal oscillator pin 2 EGP Power Ground – Exposed Ground Pad (1) See technical reference manual (listed in Section 11.3) for more details. (2) Do not supply external circuitry from this pin. (3) For design consideration regarding noise immunity for this pin, see the JTAG Interface chapter in the CC13x0, CC26x0 SimpleLink™ Wireless MCU Technical Reference Manual (4) If internal DC/DC is not used, this pin is supplied internally from the main LDO. (5) If internal DC/DC is not used, this pin must be connected to VDDR for supply from the main LDO. CC2640R2F SWRS204C – DECEMBER 2016 – REVISED SEPTEMBER 2020 www.ti.com

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7.5 Pin Diagram – YFV (Chip Scale, DSBGA) Package

Figure 7-3. YFV (2.7-mm × 2.7-mm) Pinout, Top View

7.6 Signal Descriptions – YFV (Chip Scale, DSBGA) Package

Table 7-3. Signal Descriptions – YFV Package NAME NO. TYPE DESCRIPTION DCDC_SW D1 Power Output from internal DC/DC(1) DCOUPL F3 Power 1.27-V regulated digital-supply decoupling(2) DIO_0 C5 Digital I/O GPIO, Sensor Controller DIO_1 F6 Digital I/O GPIO, Sensor Controller DIO_2 D5 Digital I/O GPIO, Sensor Controller, high-drive capability DIO_3 E5 Digital I/O GPIO, Sensor Controller, high-drive capability DIO_4 F5 Digital I/O GPIO, Sensor Controller, high-drive capability DIO_5 E3 Digital I/O GPIO, High-drive capability, JTAG_TDO DIO_6 F1 Digital I/O GPIO, High-drive capability, JTAG_TDI DIO_7 D2 Digital/Analog I/O GPIO, Sensor Controller, Analog DIO_8 D3 Digital/Analog I/O GPIO, Sensor Controller, Analog DIO_9 A1 Digital/Analog I/O GPIO, Sensor Controller, Analog DIO_10 C2 Digital/Analog I/O GPIO, Sensor Controller, Analog DIO_11 B2 Digital/Analog I/O GPIO, Sensor Controller, Analog DIO_12 D4 Digital/Analog I/O GPIO, Sensor Controller, Analog DIO_13 B3 Digital/Analog I/O GPIO, Sensor Controller, Analog JTAG_TMSC E4 Digital I/O JTAG TMSC, high-drive capability JTAG_TCKC F2 Digital I/O JTAG TCKC(3) RESET_N E2 Digital input Reset, active-low. No internal pullup. www.ti.com CC2640R2F SWRS204C – DECEMBER 2016 – REVISED SEPTEMBER 2020 Copyright © 2020 Texas Instruments Incorporated Submit Document Feedback 13 Product Folder Links: CC2640R2F

Table 7-3. Signal Descriptions – YFV Package (continued) NAME NO. TYPE DESCRIPTION RF_N B6 RF I/O Negative RF input signal to LNA during RX Negative RF output signal to PA during TX RF_P B5 RF I/O Positive RF input signal to LNA during RX Positive RF output signal to PA during TX VDDR A3 Power 1.7-V to 1.95-V supply, typically connect to output of internal DC/DC(4) (2) VDDR_RF B4 Power 1.7-V to 1.95-V supply, typically connect to output of internal DC/DC(5) (2) VDDS A2 Power 1.8-V to 3.8-V main chip supply(1) VDDS2 F4 Power 1.8-V to 3.8-V GPIO supply(1) VDDS_DCDC C1 Power 1.8-V to 3.8-V DC/DC supply X32K_Q1 D6 Analog I/O 32-kHz crystal oscillator pin 1 X32K_Q2 E6 Analog I/O 32-kHz crystal oscillator pin 2 X24M_N C3 Analog I/O 24-MHz crystal oscillator pin 1 X24M_P C4 Analog I/O 24-MHz crystal oscillator pin 2 GND A4, B1, C6, E1 Power Ground (1) For more details, see the technical reference manual (listed in Section 11.3). (2) Do not supply external circuitry from this pin. (3) For design consideration regarding noise immunity for this pin, see the JTAG Interface chapter in the CC13x0, CC26x0 SimpleLink™ Wireless MCU Technical Reference Manual (4) If internal DC/DC is not used, this pin is supplied internally from the main LDO. (5) If internal DC/DC is not used, this pin must be connected to VDDR for supply from the main LDO. CC2640R2F SWRS204C – DECEMBER 2016 – REVISED SEPTEMBER 2020 www.ti.com

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7.7 Pin Diagram – RSM Package

DIO_6 VSS DIO_5 RESET_N VSS VDDS_DCDC DCDC_SW DIO_7 VDDR_RF X24M_N X24M_P VSS VDDR DIO_9 VDDS DIO_8 DIO_1 JTAG_TMSC DIO_2 DCOUPL VDDS2 JTAG_TCKC DIO_3 DIO_4 RF_P RF_N VSS X32K_Q2 VSS DIO_0 RX_TX X32K_Q1 Figure 7-4. RSM Package 32-Pin VQFN (4-mm × 4-mm) Pinout, 0.4-mm Pitch I/O pins marked in Figure 7-4 in bold have high-drive capabilities; they are as follows:

• Pin 8, DIO_0
• Pin 9, DIO_1
• Pin 10, DIO_2
• Pin 13, JTAG_TMSC
• Pin 15, DIO_3
• Pin 16, DIO_4 I/O pins marked in Figure 7-4 in italics have analog capabilities; they are as follows:
• Pin 22, DIO_5
• Pin 23, DIO_6
• Pin 24, DIO_7
• Pin 25, DIO_8
• Pin 26, DIO_9 www.ti.com CC2640R2F SWRS204C – DECEMBER 2016 – REVISED SEPTEMBER 2020 Copyright © 2020 Texas Instruments Incorporated Submit Document Feedback 15 Product Folder Links: CC2640R2F

7.8 Signal Descriptions – RSM Package

Table 7-4. Signal Descriptions – RSM Package NAME NO. TYPE DESCRIPTION DCDC_SW 18 Power Output from internal DC/DC.(1). Tie to ground for external regulator mode (1.7-V to 1.95-V operation) DCOUPL 12 Power 1.27-V regulated digital-supply decoupling capacitor(2) DIO_0 8 Digital I/O GPIO, Sensor Controller, high-drive capability DIO_1 9 Digital I/O GPIO, Sensor Controller, high-drive capability DIO_2 10 Digital I/O GPIO, Sensor Controller, high-drive capability DIO_3 15 Digital I/O GPIO, High-drive capability, JTAG_TDO DIO_4 16 Digital I/O GPIO, High-drive capability, JTAG_TDI DIO_5 22 Digital/Analog I/O GPIO, Sensor Controller, Analog DIO_6 23 Digital/Analog I/O GPIO, Sensor Controller, Analog DIO_7 24 Digital/Analog I/O GPIO, Sensor Controller, Analog DIO_8 25 Digital/Analog I/O GPIO, Sensor Controller, Analog DIO_9 26 Digital/Analog I/O GPIO, Sensor Controller, Analog JTAG_TMSC 13 Digital I/O JTAG TMSC JTAG_TCKC 14 Digital I/O JTAG TCKC(3) RESET_N 21 Digital Input Reset, active-low. No internal pullup. RF_N 2 RF I/O Negative RF input signal to LNA during RX Negative RF output signal to PA during TX RF_P 1 RF I/O Positive RF input signal to LNA during RX Positive RF output signal to PA during TX RX_TX 4 RF I/O Optional bias pin for the RF LNA VDDR 28 Power 1.7-V to 1.95-V supply, typically connect to output of internal DC/DC.(2) (4) VDDR_RF 32 Power 1.7-V to 1.95-V supply, typically connect to output of internal DC/DC(2) (5) VDDS 27 Power 1.8-V to 3.8-V main chip supply(1) VDDS2 11 Power 1.8-V to 3.8-V GPIO supply(1) VDDS_DCDC 19 Power 1.8-V to 3.8-V DC/DC supply. Tie to ground for external regulator mode (1.7-V to 1.95-V operation). VSS 3, 7, 17, 20,

29 Power Ground

X32K_Q1 5 Analog I/O 32-kHz crystal oscillator pin 1 X32K_Q2 6 Analog I/O 32-kHz crystal oscillator pin 2 X24M_N 30 Analog I/O 24-MHz crystal oscillator pin 1 X24M_P 31 Analog I/O 24-MHz crystal oscillator pin 2 EGP Power Ground – Exposed Ground Pad (1) See technical reference manual (listed in Section 11.3) for more details. (2) Do not supply external circuitry from this pin. (3) For design consideration regarding noise immunity for this pin, see the JTAG Interface chapter in the CC13x0, CC26x0 SimpleLink™ Wireless MCU Technical Reference Manual (4) If internal DC/DC is not used, this pin is supplied internally from the main LDO. (5) If internal DC/DC is not used, this pin must be connected to VDDR for supply from the main LDO. CC2640R2F SWRS204C – DECEMBER 2016 – REVISED SEPTEMBER 2020 www.ti.com

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8 Specifications

8.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1) (2) MIN MAX UNIT Supply voltage (VDDS, VDDS2, and VDDS3) VDDR supplied by internal DC/DC regulator or internal GLDO. VDDS_DCDC connected to VDDS on PCB –0.3 4.1 V Supply voltage (VDDS(3) and VDDR) External regulator mode (VDDS and VDDR pins connected on PCB) –0.3 2.25 V Voltage on any digital pin(4) (5) –0.3 VDDSx + 0.3, max 4.1 V Voltage on crystal oscillator pins, X32K_Q1, X32K_Q2, X24M_N and X24M_P –0.3 VDDR + 0.3, max 2.25 V Voltage on ADC input (Vin) Voltage scaling enabled –0.3 VDDS VVoltage scaling disabled, internal reference –0.3 1.49 Voltage scaling disabled, VDDS as reference –0.3 VDDS / 2.9 Input RF level 5 dBm Tstg Storage temperature –40 150 °C (1) All voltage values are with respect to ground, unless otherwise noted. (2) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (3) In external regulator mode, VDDS2 and VDDS3 must be at the same potential as VDDS. (4) Including analog-capable DIO. (5) Each pin is referenced to a specific VDDSx (VDDS, VDDS2 or VDDS3). For a pin-to-VDDS mapping table, see Table 9-3 .

8.2 ESD Ratings

... RSM, RHB, and RGZ packages Human body model (HBM), per ANSI/ESDA/ JEDEC JS001(1) All pins ±2500 V Charged device model (CDM), per JESD22- C101(2) RF pins ±500 Non-RF pins ±500 VESD Electrostatic discharge ... YFV package Human body model (HBM), per ANSI/ESDA/ JEDEC JS001(1) All pins ±1500 V Charged device model (CDM), per JESD22- C101(2) RF pins ±500 Non-RF pins ±500 (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. www.ti.com CC2640R2F SWRS204C – DECEMBER 2016 – REVISED SEPTEMBER 2020 Copyright © 2020 Texas Instruments Incorporated Submit Document Feedback 17 Product Folder Links: CC2640R2F

8.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT Ambient temperature –40 85 °C Operating supply voltage (VDDS and VDDR), external regulator mode For operation in 1.8-V systems (VDDS and VDDR pins connected on PCB, internal DC/DC cannot be used) 1.7 1.95 V Operating supply voltage VDDS For operation in battery-powered and 3.3-V systems (internal DC/DC can be used to minimize power consumption) 1.8 3.8 V Operating supply voltages VDDS2 and VDDS3 VDDS < 2.7 V 1.8 3.8 V Operating supply voltages VDDS2 and VDDS3 VDDS ≥ 2.7 V 1.9 3.8 V

8.4 Power Consumption Summary

Measured on the TI CC2650EM-5XD reference design with Tc = 25°C, VDDS = 3.0 V with internal DC/DC converter, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Icore Core current consumption Reset. RESET_N pin asserted or VDDS below Power-on-Reset threshold 100 nA Shutdown. No clocks running, no retention 150 Standby. With RTC, CPU, RAM and (partial) register retention. RCOSC_LF 1.1 µA Standby. With RTC, CPU, RAM and (partial) register retention. XOSC_LF 1.3 Standby. With Cache, RTC, CPU, RAM and (partial) register retention. RCOSC_LF 2.8 Standby. With Cache, RTC, CPU, RAM and (partial) register retention. XOSC_LF 3.0 Idle. Supply Systems and RAM powered. 650 Active. Core running CoreMark 1.45 mA + 31 µA/MHz Radio RX (1) 5.9 mA Radio RX(2) 6.1 Radio TX, 0-dBm output power(1) 6.1 Radio TX, 5-dBm output power(2) 9.1 Peripheral Current Consumption (Adds to core current Icore for each peripheral unit activated) (3) Iperi Peripheral power domain Delta current with domain enabled 50 µA Serial power domain Delta current with domain enabled 13 µA RF Core Delta current with power domain enabled, clock enabled, RF core idle 237 µA µDMA Delta current with clock enabled, module idle 130 µA Timers Delta current with clock enabled, module idle 113 µA I2C Delta current with clock enabled, module idle 12 µA I2S Delta current with clock enabled, module idle 36 µA SSI Delta current with clock enabled, module idle 93 µA UART Delta current with clock enabled, module idle 164 µA (1) Single-ended RF mode is optimized for size and power consumption. Measured on CC2650EM-4XS. (2) Differential RF mode is optimized for RF performance. Measured on CC2650EM-5XD. CC2640R2F SWRS204C – DECEMBER 2016 – REVISED SEPTEMBER 2020 www.ti.com

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(3) I peri is not supported in Standby or Shutdown.

8.5 General Characteristics

Tc = 25°C, VDDS = 3.0 V, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT FLASH MEMORY Supported flash erase cycles before failure(1) 100 k Cycles Maximum number of write operations per row before erase(2) 83 write operations Flash retention 105°C 11.4 Years at 105°C Flash page/sector erase current Average delta current 12.6 mA Flash page/sector size 4 KB Flash write current Average delta current, 4 bytes at a time 8.15 mA Flash page/sector erase time(3) 8 ms Flash write time(3) 4 bytes at a time 8 µs (1) Aborting flash during erase or program modes is not a safe operation. (2) Each row is 2048 bits (or 256 Bytes) wide. (3) This number is dependent on Flash aging and will increase over time and erase cycles. 8.6 125-kbps Coded (Bluetooth 5) – RX Measured on the TI CC2650EM-5XD reference design with Tc = 25°C, VDDS = 3.0 V, fRF = 2440 MHz, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Receiver sensitivity Differential mode. Measured at the CC2650EM-5XD SMA connector, BER = 10–3 –103 dBm Receiver saturation Differential mode. Measured at the CC2650EM-5XD SMA connector, BER = 10–3 >5 dBm Frequency error tolerance Difference between the incoming carrier frequency and the internally generated carrier frequency –260 310 kHz Data rate error tolerance Difference between incoming data rate and the internally generated data rate (37-byte packets) –260 260 ppm Data rate error tolerance Difference between incoming data rate and the internally generated data rate (255-byte packets) –140 140 ppm Co-channel rejection (1) Wanted signal at –79 dBm, modulated interferer in channel, BER = 10–3 –3 dB Selectivity, ±1 MHz (1) Wanted signal at –79 dBm, modulated interferer at ±1 MHz, BER = 10–3 9 / 5(2) dB Selectivity, ±2 MHz (1) Wanted signal at –79 dBm, modulated interferer at ±2 MHz, Image frequency is at –2 MHz, BER = 10–3 43 / 32(2) dB Selectivity, ±3 MHz (1) Wanted signal at –79 dBm, modulated interferer at ±3 MHz, BER = 10–3 47 / 42(2) dB Selectivity, ±4 MHz (1) Wanted signal at –79 dBm, modulated interferer at ±4 MHz, BER = 10–3 46 / 47(2) dB Selectivity, ±6 MHz (1) Wanted signal at –79 dBm, modulated interferer at ±6 MHz, BER = 10–3 49 / 46(2) dB Alternate channel rejection, ±7 MHz(1) Wanted signal at –79 dBm, modulated interferer at ≥ ±7 MHz, BER = 10–3 50 / 47(2) dB Selectivity, image frequency(1) Wanted signal at –79 dBm, modulated interferer at image frequency, BER = 10–3 32 dB www.ti.com CC2640R2F SWRS204C – DECEMBER 2016 – REVISED SEPTEMBER 2020 Copyright © 2020 Texas Instruments Incorporated Submit Document Feedback 19 Product Folder Links: CC2640R2F

Measured on the TI CC2650EM-5XD reference design with Tc = 25°C, VDDS = 3.0 V, fRF = 2440 MHz, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Selectivity, image frequency ±1 MHz(1) Note that Image frequency + 1 MHz is the Co-channel –1 MHz. Wanted signal at –79 dBm, modulated interferer at ±1 MHz from image frequency, BER = 10–3 5 / 32(2) dB Blocker rejection, ±8 MHz and above(1) Wanted signal at –79 dBm, modulated interferer at ±8 MHz and above, BER = 10–3 >46 dB Out-of-band blocking (3) 30 MHz to 2000 MHz –40 dBm Out-of-band blocking 2003 MHz to 2399 MHz –19 dBm Out-of-band blocking 2484 MHz to 2997 MHz –22 dBm Intermodulation Wanted signal at 2402 MHz, –76 dBm. Two interferers at 2405 and 2408 MHz respectively, at the given power level –42 dBm (1) Numbers given as I/C dB. (2) X / Y, where X is +N MHz and Y is –N MHz. (3) Excluding one exception at F wanted / 2, per Bluetooth Specification. 8.7 125-kbps Coded (Bluetooth 5) – TX Measured on the TI CC2650EM-5XD reference design with Tc = 25°C, VDDS = 3.0 V, fRF = 2440 MHz, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Output power, highest setting Differential mode, delivered to a single-ended 50-Ω load through a balun 5 dBm Output power, highest setting Measured on CC2650EM-4XS, delivered to a single-ended 50-Ω load 2 dBm Output power, lowest setting Delivered to a single-ended 50-Ω load through a balun –21 dBm Spurious emission conducted measurement(1) f < 1 GHz, outside restricted bands –43 dBm f < 1 GHz, restricted bands ETSI –65 dBm f < 1 GHz, restricted bands FCC –71 dBm f > 1 GHz, including harmonics –46 dBm (1) Suitable for systems targeting compliance with worldwide radio-frequency regulations ETSI EN 300 328 and EN 300 440 Class 2 (Europe), FCC CFR47 Part 15 (US), and ARIB STD-T66 (Japan). 8.8 500-kbps Coded (Bluetooth 5) – RX Measured on the TI CC2650EM-5XD reference design with Tc = 25°C, VDDS = 3.0 V, fRF = 2440 MHz, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Receiver sensitivity Differential mode. Measured at the CC2650EM-5XD SMA connector, BER = 10–3 –101 dBm Receiver saturation Differential mode. Measured at the CC2650EM-5XD SMA connector, BER = 10–3 >5 dBm Frequency error tolerance Difference between the incoming carrier frequency and the internally generated carrier frequency –240 240 kHz Data rate error tolerance Difference between incoming data rate and the internally generated data rate (37-byte packets) –500 500 ppm Data rate error tolerance Difference between incoming data rate and the internally generated data rate (255-byte packets) –310 330 ppm Co-channel rejection (1) Wanted signal at –72 dBm, modulated interferer in channel, BER = 10–3 –5 dB Selectivity, ±1 MHz (1) Wanted signal at –72 dBm, modulated interferer at ±1 MHz, BER = 10–3 9 / 5(2) dB CC2640R2F SWRS204C – DECEMBER 2016 – REVISED SEPTEMBER 2020 www.ti.com

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Measured on the TI CC2650EM-5XD reference design with Tc = 25°C, VDDS = 3.0 V, fRF = 2440 MHz, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Selectivity, ±2 MHz (1) Wanted signal at –72 dBm, modulated interferer at ±2 MHz, Image frequency is at –2 MHz, BER = 10–3 41 / 31(2) dB Selectivity, ±3 MHz (1) Wanted signal at –72 dBm, modulated interferer at ±3 MHz, BER = 10–3 44 / 41(2) dB Selectivity, ±4 MHz (1) Wanted signal at –72 dBm, modulated interferer at ±4 MHz, BER = 10–3 44 / 44(2) dB Selectivity, ±6 MHz (1) Wanted signal at –72 dBm, modulated interferer at ±6 MHz, BER = 10–3 44 / 44(2) dB Alternate channel rejection, ±7 MHz(1) Wanted signal at –72 dBm, modulated interferer at ≥ ±7 MHz, BER = 10–3 44 / 44(2) dB Selectivity, image frequency(1) Wanted signal at –72 dBm, modulated interferer at image frequency, BER = 10–3 31 dB Selectivity, image frequency ±1 MHz(1) Note that Image frequency + 1 MHz is the Co-channel –1 MHz. Wanted signal at –72 dBm, modulated interferer at ±1 MHz from image frequency, BER = 10–3 5 / 41(2) dB Blocker rejection, ±8 MHz and above(1) Wanted signal at –72 dBm, modulated interferer at ±8 MHz and above, BER = 10–3 44 dB Out-of-band blocking (3) 30 MHz to 2000 MHz –35 dBm Out-of-band blocking 2003 MHz to 2399 MHz –19 dBm Out-of-band blocking 2484 MHz to 2997 MHz –19 dBm Intermodulation Wanted signal at 2402 MHz, –69 dBm. Two interferers at 2405 and 2408 MHz respectively, at the given power level –37 dBm (1) Numbers given as I/C dB. (2) X / Y, where X is +N MHz and Y is –N MHz. (3) Excluding one exception at F wanted / 2, per Bluetooth Specification. 8.9 500-kbps Coded (Bluetooth 5) – TX Measured on the TI CC2650EM-5XD reference design with Tc = 25°C, VDDS = 3.0 V, fRF = 2440 MHz, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Output power, highest setting Differential mode, delivered to a single-ended 50-Ω load through a balun 5 dBm Output power, highest setting Measured on CC2650EM-4XS, delivered to a single-ended 50-Ω load 2 dBm Output power, lowest setting Delivered to a single-ended 50-Ω load through a balun –21 dBm Spurious emission conducted measurement(1) f < 1 GHz, outside restricted bands –43 dBm f < 1 GHz, restricted bands ETSI –65 dBm f < 1 GHz, restricted bands FCC –71 dBm f > 1 GHz, including harmonics –46 dBm (1) Suitable for systems targeting compliance with worldwide radio-frequency regulations ETSI EN 300 328 and EN 300 440 Class 2 (Europe), FCC CFR47 Part 15 (US), and ARIB STD-T66 (Japan). www.ti.com CC2640R2F SWRS204C – DECEMBER 2016 – REVISED SEPTEMBER 2020 Copyright © 2020 Texas Instruments Incorporated Submit Document Feedback 21 Product Folder Links: CC2640R2F

8.10 1-Mbps GFSK (Bluetooth low energy) – RX Measured on the TI CC2650EM-5XD reference design with Tc = 25°C, VDDS = 3.0 V, fRF = 2440 MHz, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Receiver sensitivity Differential mode. Measured at the CC2650EM-5XD SMA connector, BER = 10–3 –97 dBm Receiver sensitivity Single-ended mode. Measured on CC2650EM-4XS, at the SMA connector, BER = 10–3 –96 dBm Receiver saturation Differential mode. Measured at the CC2650EM-5XD SMA connector, BER = 10–3 4 dBm Receiver saturation Single-ended mode. Measured on CC2650EM-4XS, at the SMA connector, BER = 10–3 0 dBm Frequency error tolerance Difference between the incoming carrier frequency and the internally generated carrier frequency –350 350 kHz Data rate error tolerance Difference between incoming data rate and the internally generated data rate –750 750 ppm Co-channel rejection(1) Wanted signal at –67 dBm, modulated interferer in channel, BER = 10–3 –6 dB Selectivity, ±1 MHz(1) Wanted signal at –67 dBm, modulated interferer at ±1 MHz, BER = 10–3 7 / 3(2) dB Selectivity, ±2 MHz(1) Wanted signal at –67 dBm, modulated interferer at ±2 MHz, BER = 10–3 34 / 25(2) dB Selectivity, ±3 MHz(1) Wanted signal at –67 dBm, modulated interferer at ±3 MHz, BER = 10–3 38 / 26(2) dB Selectivity, ±4 MHz(1) Wanted signal at –67 dBm, modulated interferer at ±4 MHz, BER = 10–3 42 / 29(2) dB Selectivity, ±5 MHz or more(1) Wanted signal at –67 dBm, modulated interferer at ≥ ±5 MHz, BER = 10–3 32 dB Selectivity, image frequency(1) Wanted signal at –67 dBm, modulated interferer at image frequency, BER = 10–3 25 dB Selectivity, image frequency ±1 MHz(1) Wanted signal at –67 dBm, modulated interferer at ±1 MHz from image frequency, BER = 10–3 3 / 26(2) dB Out-of-band blocking (3) 30 MHz to 2000 MHz –20 dBm Out-of-band blocking 2003 MHz to 2399 MHz –5 dBm Out-of-band blocking 2484 MHz to 2997 MHz –8 dBm Out-of-band blocking 3000 MHz to 12.75 GHz –10 dBm Intermodulation Wanted signal at 2402 MHz, –64 dBm. Two interferers at 2405 and 2408 MHz respectively, at the given power level –34 dBm Spurious emissions, 30 to 1000 MHz Conducted measurement in a 50-Ω single-ended load. Suitable for systems targeting compliance with EN 300 328, EN 300 440 class 2, FCC CFR47, Part 15 and ARIB STD-T-66 –71 dBm Spurious emissions, 1 to 12.75 GHz Conducted measurement in a 50-Ω single-ended load. Suitable for systems targeting compliance with EN 300 328, EN 300 440 class 2, FCC CFR47, Part 15 and ARIB STD-T-66 –62 dBm RSSI dynamic range 70 dB RSSI accuracy ±4 dB (1) Numbers given as I/C dB. (2) X / Y, where X is +N MHz and Y is –N MHz. (3) Excluding one exception at F wanted / 2, per Bluetooth Specification. CC2640R2F SWRS204C – DECEMBER 2016 – REVISED SEPTEMBER 2020 www.ti.com

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8.11 1-Mbps GFSK (Bluetooth low energy) – TX Measured on the TI CC2650EM-5XD reference design with Tc = 25°C, VDDS = 3.0 V, fRF = 2440 MHz, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Output power, highest setting Differential mode, delivered to a single-ended 50-Ω load through a balun 5 dBm Output power, highest setting Measured on CC2650EM-4XS, delivered to a single-ended 50-Ω load 2 dBm Output power, lowest setting Delivered to a single-ended 50-Ω load through a balun –21 dBm Spurious emission conducted measurement(1) f < 1 GHz, outside restricted bands –43 dBm f < 1 GHz, restricted bands ETSI –65 dBm f < 1 GHz, restricted bands FCC –71 dBm f > 1 GHz, including harmonics –46 dBm (1) Suitable for systems targeting compliance with worldwide radio-frequency regulations ETSI EN 300 328 and EN 300 440 Class 2 (Europe), FCC CFR47 Part 15 (US), and ARIB STD-T66 (Japan). 8.12 2-Mbps GFSK (Bluetooth 5) – RX Measured on the TI CC2650EM-5XD reference design with Tc = 25°C, VDDS = 3.0 V, fRF = 2440 MHz, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Receiver sensitivity Differential mode. Measured at the CC2650EM-5XD SMA connector, BER = 10–3 –91 dBm Receiver saturation Differential mode. Measured at the CC2650EM-5XD SMA connector, BER = 10–3 3 dBm Frequency error tolerance Difference between the incoming carrier frequency and the internally generated carrier frequency –300 500 kHz Data rate error tolerance Difference between incoming data rate and the internally generated data rate –1000 1000 ppm Co-channel rejection(1) Wanted signal at –67 dBm, modulated interferer in channel, BER = 10–3 –7 dB Selectivity, ±2 MHz(1) Wanted signal at –67 dBm, modulated interferer at ±2 MHz, Image frequency is at –2 MHz BER = 10–3 8 / 4(2) dB Selectivity, ±4 MHz(1) Wanted signal at –67 dBm, modulated interferer at ±4 MHz, BER = 10–3 31 / 26(2) dB Selectivity, ±6 MHz(1) Wanted signal at –67 dBm, modulated interferer at ±6 MHz, BER = 10–3 37 / 38(2) dB Alternate channel rejection, ±7 MHz(1) Wanted signal at –67 dBm, modulated interferer at ≥ ±7 MHz, BER = 10–3 37 / 36(2) dB Selectivity, image frequency(1) Wanted signal at –67 dBm, modulated interferer at image frequency, BER = 10–3 4 dB Selectivity, image frequency ±2 MHz(1) Note that Image frequency + 2 MHz is the Co-channel. Wanted signal at –67 dBm, modulated interferer at ±2 MHz from image frequency, BER = 10–3 –7 / 26(2) dB Out-of-band blocking(3) 30 MHz to 2000 MHz –33 dBm Out-of-band blocking 2003 MHz to 2399 MHz –15 dBm Out-of-band blocking 2484 MHz to 2997 MHz –12 dBm Out-of-band blocking 3000 MHz to 12.75 GHz –10 dBm Intermodulation Wanted signal at 2402 MHz, –64 dBm. Two interferers at 2408 and 2414 MHz respectively, at the given power level –45 dBm (1) Numbers given as I/C dB. (2) X / Y, where X is +N MHz and Y is –N MHz. www.ti.com CC2640R2F SWRS204C – DECEMBER 2016 – REVISED SEPTEMBER 2020 Copyright © 2020 Texas Instruments Incorporated Submit Document Feedback 23 Product Folder Links: CC2640R2F

(3) Excluding one exception at F wanted / 2, per Bluetooth Specification. 8.13 2-Mbps GFSK (Bluetooth 5) – TX Measured on the TI CC2650EM-5XD reference design with Tc = 25°C, VDDS = 3.0 V, fRF = 2440 MHz, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Output power, highest setting Differential mode, delivered to a single-ended 50-Ω load through a balun 5 dBm Output power, highest setting Measured on CC2650EM-4XS, delivered to a single-ended 50-Ω load 2 dBm Output power, lowest setting Delivered to a single-ended 50-Ω load through a balun –21 dBm Spurious emission conducted measurement(1) f < 1 GHz, outside restricted bands –43 dBm f < 1 GHz, restricted bands ETSI –65 dBm f < 1 GHz, restricted bands FCC –71 dBm f > 1 GHz, including harmonics –46 dBm (1) Suitable for systems targeting compliance with worldwide radio-frequency regulations ETSI EN 300 328 and EN 300 440 Class 2 (Europe), FCC CFR47 Part 15 (US), and ARIB STD-T66 (Japan). 8.14 24-MHz Crystal Oscillator (XOSC_HF) Tc = 25°C, VDDS = 3.0 V, unless otherwise noted.(1) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT ESR Equivalent series resistance(2) 6 pF < CL ≤ 9 pF 20 60 Ω ESR Equivalent series resistance(2) 5 pF < CL ≤ 6 pF 80 Ω LM Motional inductance(2) Relates to load capacitance (CL in Farads) < 1.6 × 10–24 / CL 2 H CL Crystal load capacitance(2) (3) 5 9 pF Crystal frequency(2) (4) 24 MHz Crystal frequency tolerance(2) (5) –40 40 ppm Start-up time(4) (6) 150 µs (1) Probing or otherwise stopping the crystal while the DC/DC converter is enabled may cause permanent damage to the device. (2) The crystal manufacturer's specification must satisfy this requirement (3) Adjustable load capacitance is integrated into the device. External load capacitors are not required (4) Measured on the TI CC2650EM-5XD reference design with T c = 25°C, VDDS = 3.0 V (5) Includes initial tolerance of the crystal, drift over temperature, ageing and frequency pulling due to incorrect load capacitance. As per specification. (6) Kick-started based on a temperature and aging compensated RCOSC_HF using precharge injection. 8.15 32.768-kHz Crystal Oscillator (XOSC_LF) Tc = 25°C, VDDS = 3.0 V, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Crystal frequency(1) 32.768 kHz Crystal frequency tolerance, Bluetooth low- energy applications(1) (2) –500 500 ppm ESR Equivalent series resistance(1) 30 100 kΩ CL Crystal load capacitance(1) 6 12 pF (1) The crystal manufacturer's specification must satisfy this requirement (2) Includes initial tolerance of the crystal, drift over temperature, ageing and frequency pulling due to incorrect load capacitance. As per Bluetooth specification. CC2640R2F SWRS204C – DECEMBER 2016 – REVISED SEPTEMBER 2020 www.ti.com

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8.16 48-MHz RC Oscillator (RCOSC_HF) Measured on the TI CC2650EM-5XD reference design with Tc = 25°C, VDDS = 3.0 V, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Frequency 48 MHz Uncalibrated frequency accuracy ±1% Calibrated frequency accuracy(1) ±0.25% Start-up time 5 µs (1) Accuracy relative to the calibration source (XOSC_HF). 8.17 32-kHz RC Oscillator (RCOSC_LF) Measured on the TI CC2650EM-5XD reference design with Tc = 25°C, VDDS = 3.0 V, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Calibrated frequency(1) 32.8 kHz Temperature coefficient 80 ppm/°C (1) The frequency accuracy of the Real Time Clock (RTC) is not directly dependent on the frequency accuracy of the 32-kHz RC Oscillator. The RTC can be calibrated to an accuracy within ±500 ppm of 32.768 kHz by measuring the frequency error of RCOSC_LF relative to XOSC_HF and compensating the RTC tick speed. The procedure is explained in Running Bluetooth® Low Energy on CC2640 Without 32 kHz Crystal.

8.18 ADC Characteristics

Tc = 25°C, VDDS = 3.0 V and voltage scaling enabled, unless otherwise noted.(1) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Input voltage range 0 VDDS V Resolution 12 Bits Sample rate 200 ksps Offset Internal 4.3-V equivalent reference(2) 2 LSB Gain error Internal 4.3-V equivalent reference(2) 2.4 LSB DNL(3) Differential nonlinearity >–1 LSB INL(4) Integral nonlinearity ±3 LSB ENOB Effective number of bits Internal 4.3-V equivalent reference(2), 200 ksps, 9.6-kHz input tone 9.8 BitsVDDS as reference, 200 ksps, 9.6-kHz input tone 10 Internal 1.44-V reference, voltage scaling disabled, 32 samples average, 200 ksps, 300-Hz input tone 11.1 THD Total harmonic distortion Internal 4.3-V equivalent reference(2), 200 ksps, 9.6-kHz input tone –65 dBVDDS as reference, 200 ksps, 9.6-kHz input tone –69 Internal 1.44-V reference, voltage scaling disabled, 32 samples average, 200 ksps, 300-Hz input tone –71 SINAD, SNDR Signal-to-noise and Distortion ratio Internal 4.3-V equivalent reference(2), 200 ksps, 9.6-kHz input tone 60 dBVDDS as reference, 200 ksps, 9.6-kHz input tone 63 Internal 1.44-V reference, voltage scaling disabled, 32 samples average, 200 ksps, 300-Hz input tone 69 SFDR Spurious-free dynamic range Internal 4.3-V equivalent reference(2), 200 ksps, 9.6-kHz input tone 67 dBVDDS as reference, 200 ksps, 9.6-kHz input tone 68 Internal 1.44-V reference, voltage scaling disabled, 32 samples average, 200 ksps, 300-Hz input tone 73 www.ti.com CC2640R2F SWRS204C – DECEMBER 2016 – REVISED SEPTEMBER 2020 Copyright © 2020 Texas Instruments Incorporated Submit Document Feedback 25 Product Folder Links: CC2640R2F

Tc = 25°C, VDDS = 3.0 V and voltage scaling enabled, unless otherwise noted.(1) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Conversion time Serial conversion, time-to-output, 24-MHz clock 50 clock- cycles Current consumption Internal 4.3-V equivalent reference(2) 0.66 mA Current consumption VDDS as reference 0.75 mA Reference voltage Equivalent fixed internal reference (input voltage scaling enabled). For best accuracy, the ADC conversion should be initiated through the TIRTOS API in order to include the gain/offset compensation factors stored in FCFG1. 4.3(2) (5) V Reference voltage Fixed internal reference (input voltage scaling disabled). For best accuracy, the ADC conversion should be initiated through the TIRTOS API in order to include the gain/offset compensation factors stored in FCFG1. This value is derived from the scaled value (4.3 V) as follows: Vref = 4.3 V × 1408 / 4095 1.48 V Reference voltage VDDS as reference (Also known as RELATIVE) (input voltage scaling enabled) VDDS V Reference voltage VDDS as reference (Also known as RELATIVE) (input voltage scaling disabled) VDDS / 2.82(5) V Input impedance 200 ksps, voltage scaling enabled. Capacitive input, Input impedance depends on sampling frequency and sampling time >1 MΩ (1) Using IEEE Std 1241 ™-2010 for terminology and test methods. (2) Input signal scaled down internally before conversion, as if voltage range was 0 to 4.3 V. (3) No missing codes. Positive DNL typically varies from +0.3 to +3.5, depending on device (see Figure 8-21). (4) For a typical example, see Figure 8-22. (5) Applied voltage must be within absolute maximum ratings ( Section 8.1) at all times.

8.19 Temperature Sensor

Measured on the TI CC2650EM-5XD reference design with Tc = 25°C, VDDS = 3.0 V, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Resolution 4 °C Range –40 85 °C Accuracy ±5 °C Supply voltage coefficient(1) 3.2 °C/V (1) Automatically compensated when using supplied driver libraries.

8.20 Battery Monitor

Measured on the TI CC2650EM-5XD reference design with Tc = 25°C, VDDS = 3.0 V, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Resolution 50 mV Range 1.8 3.8 V Accuracy 13 mV CC2640R2F SWRS204C – DECEMBER 2016 – REVISED SEPTEMBER 2020 www.ti.com

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8.21 Continuous Time Comparator

Tc = 25°C, VDDS = 3.0 V, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Input voltage range 0 VDDS V External reference voltage 0 VDDS V Internal reference voltage DCOUPL as reference 1.27 V Offset 3 mV Hysteresis <2 mV Decision time Step from –10 mV to 10 mV 0.72 µs Current consumption when enabled(1) 8.6 µA (1) Additionally, the bias module must be enabled when running in standby mode.

8.22 Low-Power Clocked Comparator

Tc = 25°C, VDDS = 3.0 V, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Input voltage range 0 VDDS V Clock frequency 32 kHz Internal reference voltage, VDDS / 2 1.49–1.51 V Internal reference voltage, VDDS / 3 1.01–1.03 V Internal reference voltage, VDDS / 4 0.78–0.79 V Internal reference voltage, DCOUPL / 1 1.25–1.28 V Internal reference voltage, DCOUPL / 2 0.63–0.65 V Internal reference voltage, DCOUPL / 3 0.42–0.44 V Internal reference voltage, DCOUPL / 4 0.33–0.34 V Offset <5 mV Hysteresis <5 mV Decision time Step from –50 mV to 50 mV <1 clock-cycle Current consumption when enabled 362 nA

8.23 Programmable Current Source

Tc = 25°C, VDDS = 3.0 V, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Current source programmable output range 0.25–20 µA Resolution 0.25 µA Current consumption(1) Including current source at maximum programmable output 23 µA (1) Additionally, the bias module must be enabled when running in standby mode. www.ti.com CC2640R2F SWRS204C – DECEMBER 2016 – REVISED SEPTEMBER 2020 Copyright © 2020 Texas Instruments Incorporated Submit Document Feedback 27 Product Folder Links: CC2640R2F

8.24 Synchronous Serial Interface (SSI)

Tc = 25°C, VDDS = 3.0 V, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT S1(1) tclk_per (SSIClk period) Device operating as SLAVE 12 65024 system clocks S2(1) tclk_high (SSIClk high time) Device operating as SLAVE 0.5 tclk_per S3(1) tclk_low (SSIClk low time) Device operating as SLAVE 0.5 tclk_per S1 (TX only)(1) tclk_per (SSIClk period) One-way communication to SLAVE - Device operating as MASTER 4 65024 system clocks S1 (TX and RX)(1) tclk_per (SSIClk period) Normal duplex operation - Device operating as MASTER 8 65024 system clocks S2(1) tclk_high (SSIClk high time) Device operating as MASTER 0.5 tclk_per S3(1) tclk_low (SSIClk low time) Device operating as MASTER 0.5 tclk_per (1) Refer to SSI timing diagrams Figure 8-1, Figure 8-2, and Figure 8-3. SSIClk SSIFss SSITx SSIRx MSB LSB 4 to 16 bits Figure 8-1. SSI Timing for TI Frame Format (FRF = 01), Single Transfer Timing Measurement SSIClk SSIFss SSITx SSIRx MSB LSB MSB LSB 8-bit control 4 to 16 bits output data Figure 8-2. SSI Timing for MICROWIRE Frame Format (FRF = 10), Single Transfer CC2640R2F SWRS204C – DECEMBER 2016 – REVISED SEPTEMBER 2020 www.ti.com

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(SPO = 1) SSITx (Master) SSIRx (Slave) LSB SSIClk (SPO = 0) SSIFss LSB MSB MSB Figure 8-3. SSI Timing for SPI Frame Format (FRF = 00), With SPH = 1

8.25 DC Characteristics

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT TA = 25°C, VDDS = 1.8 V GPIO VOH at 8-mA load IOCURR = 2, high-drive GPIOs only 1.32 1.54 V GPIO VOL at 8-mA load IOCURR = 2, high-drive GPIOs only 0.26 0.32 V GPIO VOH at 4-mA load IOCURR = 1 1.32 1.58 V GPIO VOL at 4-mA load IOCURR = 1 0.21 0.32 V GPIO pullup current Input mode, pullup enabled, Vpad = 0 V 71.7 µA GPIO pulldown current Input mode, pulldown enabled, Vpad = VDDS 21.1 µA GPIO high/low input transition, no hysteresis IH = 0, transition between reading 0 and reading 1 0.88 V GPIO low-to-high input transition, with hysteresis IH = 1, transition voltage for input read as 0 → 1 1.07 V GPIO high-to-low input transition, with hysteresis IH = 1, transition voltage for input read as 1 → 0 0.74 V GPIO input hysteresis IH = 1, difference between 0 → 1 and 1 → 0 points 0.33 V TA = 25°C, VDDS = 3.0 V GPIO VOH at 8-mA load IOCURR = 2, high-drive GPIOs only 2.68 V GPIO VOL at 8-mA load IOCURR = 2, high-drive GPIOs only 0.33 V GPIO VOH at 4-mA load IOCURR = 1 2.72 V GPIO VOL at 4-mA load IOCURR = 1 0.28 V www.ti.com CC2640R2F SWRS204C – DECEMBER 2016 – REVISED SEPTEMBER 2020 Copyright © 2020 Texas Instruments Incorporated Submit Document Feedback 29 Product Folder Links: CC2640R2F

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT TA = 25°C, VDDS = 3.8 V GPIO pullup current Input mode, pullup enabled, Vpad = 0 V 277 µA GPIO pulldown current Input mode, pulldown enabled, Vpad = VDDS 113 µA GPIO high/low input transition, no hysteresis IH = 0, transition between reading 0 and reading 1 1.67 V GPIO low-to-high input transition, with hysteresis IH = 1, transition voltage for input read as 0 → 1 1.94 V GPIO high-to-low input transition, with hysteresis IH = 1, transition voltage for input read as 1 → 0 1.54 V GPIO input hysteresis IH = 1, difference between 0 → 1 and 1 → 0 points 0.4 V TA = 25°C VIH Lowest GPIO input voltage reliably interpreted as a «High» 0.8 VDDS(1) VIL Highest GPIO input voltage reliably interpreted as a «Low» 0.2 VDDS(1) (1) Each GPIO is referenced to a specific VDDS pin. See the technical reference manual listed in Section 11.3 for more details.

8.26 Thermal Resistance Characteristics

NAME DESCRIPTION RSM (°C/W)(1) (2) RHB (°C/W)(1) (2) RGZ (°C/W)(1) (2) YFV (°C/W)(1) (2) RθJA Junction-to-ambient thermal resistance 36.9 32.8 29.6 76.2 RθJC(top) Junction-to-case (top) thermal resistance 30.3 24.0 15.7 0.3 RθJB Junction-to-board thermal resistance 7.6 6.8 6.2 16.3 PsiJT Junction-to-top characterization parameter 0.4 0.3 0.3 1.8 PsiJB Junction-to-board characterization parameter 7.4 6.8 6.2 16.3 RθJC(bot) Junction-to-case (bottom) thermal resistance 2.1 1.9 1.9 N/A (1) °C/W = degrees Celsius per watt. (2) These values are based on a JEDEC-defined 2S2P system (with the exception of the Theta JC [Rθ JC] value, which is based on a JEDEC-defined 1S0P system) and will change based on environment as well as application. For more information, see these EIA/ JEDEC standards:

• JESD51-2, Integrated Circuits Thermal Test Method Environmental Conditions - Natural Convection (Still Air).
• JESD51-3, Low Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages.
• JESD51-7, High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages.
• JESD51-9, Test Boards for Area Array Surface Mount Package Thermal Measurements. For RSM, RHB, and RGZ, power dissipation of 2 W and an ambient temperature of 70°C is assumed. For YFV, power dissipation of 1.3 W and ambient temperature of 25°C is assumed.

8.27 Timing Requirements

Rising supply-voltage slew rate 0 100 mV/µs Falling supply-voltage slew rate 0 20 mV/µs Falling supply-voltage slew rate, with low-power flash settings(1) 3 mV/µs Positive temperature gradient in standby(2) No limitation for negative temperature gradient, or outside standby mode 5 °C/s CONTROL INPUT AC CHARACTERISTICS(3) RESET_N low duration 1 µs (1) For smaller coin cell batteries, with high worst-case end-of-life equivalent source resistance, a 22-µF VDDS input capacitor (see Figure 10-1) must be used to ensure compliance with this slew rate. (2) Applications using RCOSC_LF as sleep timer must also consider the drift in frequency caused by a change in temperature (see Section 8.17). (3) T A = –40°C to +85°C, VDDS = 1.7 V to 3.8 V, unless otherwise noted. CC2640R2F SWRS204C – DECEMBER 2016 – REVISED SEPTEMBER 2020 www.ti.com

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8.28 Switching Characteristics

Measured on the TI CC2650EM-5XD reference design with Tc = 25°C, VDDS = 3.0 V, unless otherwise noted. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT WAKEUP AND TIMING Idle → Active 14 µs Standby → Active 151 µs Shutdown → Active 1015 µs www.ti.com CC2640R2F SWRS204C – DECEMBER 2016 – REVISED SEPTEMBER 2020 Copyright © 2020 Texas Instruments Incorporated Submit Document Feedback 31 Product Folder Links: CC2640R2F

8.29 Typical Characteristics

Temperature (qC) Sensitivity (dBm) -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 -99 -98 -97 -96 -95 -94 Sensitivity 4XS Sensitivity 5XD Figure 8-4. BLE Sensitivity vs Temperature VDDS (V) Sensitivity (dBm) -101 -100 -99 -98 -97 -96 -95 D004 BLE 5XD Sensitivity BLE 4XS Sensitivity Figure 8-5. BLE Sensitivity vs Supply Voltage (VDDS) Frequency (MHz) Sensitivity Level (dBm) 2400 2410 2420 2430 2440 2450 2460 2470 2480 -99 -98.5 -98 -97.5 -97 -96.5 -96 -95.5 -95 D020 Sensitivity 5XD Sensitivity 4XS Figure 8-6. BLE Sensitivity vs Channel Frequency Temperature (qC) Output Power (dBm) -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 4XS 2-dBm Setting 5XD 5-dBm Setting Figure 8-7. TX Output Power vs Temperature VDDS (V) Output power (dBm) D003 5XD 5dBm Setting 4XS 2dBm Setting Figure 8-8. TX Output Power vs Supply Voltage (VDDS) Frequency (MHz) Output Power (dBm) 2400 2410 2420 2430 2440 2450 2460 2470 2480 D021 5-dBm setting (5XD) 0-dBm setting (4XS) Figure 8-9. TX Output Power vs Channel Frequency CC2640R2F SWRS204C – DECEMBER 2016 – REVISED SEPTEMBER 2020 www.ti.com

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Input Frequency (Hz) Effective Number of Bits 200300 500 1000 2000 5000 10000 20000 100000 9.4 9.6 9.8 10.2 10.4 10.6 10.8 11.2 11.4 D009 Fs= 200 kHz, No Averaging Fs= 200 kHz, 32 samples averaging Figure 8-16. SoC ADC Effective Number of Bits vs Input Frequency (Internal Reference, Scaling enabled) VDDS (V) ADC Code 1004.8 1005 1005.2 1005.4 1005.6 1005.8 1006 1006.2 1006.4 D012 Figure 8-17. SoC ADC Output vs Supply Voltage (Fixed Input, Internal Reference) Temperature (qC) ADC Code -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 1004.5 1005 1005.5 1006 1006.5 1007 1007.5 D013 Figure 8-18. SoC ADC Output vs Temperature (Fixed Input, Internal Reference) Sampling Frequency (Hz) ENOB 9.6 9.7 9.8 9.9 10.1 10.2 10.3 10.4 10.5 1k 10k 100k 200k D009A ENOB Internal Reference (No Averaging) ENOB Internal Reference (32 Samples Averaging) Figure 8-19. SoC ADC ENOB vs Sampling Frequency (Scaling enabled, input frequency = FS / 10) Figure 8-20. Standby Mode Supply Current vs Temperature CC2640R2F SWRS204C – DECEMBER 2016 – REVISED SEPTEMBER 2020 www.ti.com

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9 Detailed Description

9.1 Overview

The core modules of the CC26xx product family are shown in Section 9.2.

9.2 Functional Block Diagram

SimpleLink CC26xx Wireless MCU Main CPU: 128-KB Flash Sensor Controller cJTAG 20-KB SRAM ROM ARM Cortex-M3 DC-DC Converter RF Core ARM Cortex-M0 DSP modem 4-KB SRAM ROM Sensor Controller Engine 2× Comparator 12-bit ADC, 200 ks/s Constant Current Source SPI-I2C Digital Sensor IF 2-KB SRAM Time-to-digital Converter General Peripherals / Modules 4× 32-bit Timers 2× SSI (SPI, µW, TI) Watchdog Timer Temp. / Batt. Monitor RTC I2C UART I2S 10 / 14 / 15 / 31 GPIOs AES 32 ch. µDMA ADC Digital PLL Up to 48 MHz 61 µA/MHz TRNG ADC 8-KB cache Copyright © 2016, Texas Instruments Incorporated CC2640R2F SWRS204C – DECEMBER 2016 – REVISED SEPTEMBER 2020 www.ti.com

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9.3 Main CPU

The SimpleLink™ CC2640R2F Wireless MCU contains an Arm ® Cortex®-M3 (CM3) 32-bit CPU, which runs the application and the higher layers of the protocol stack. The CM3 processor provides a high-performance, low-cost platform that meets the system requirements of minimal memory implementation, and low-power consumption, while delivering outstanding computational performance and exceptional system response to interrupts. Arm® Cortex®-M3 features include:

• 32-bit Arm ® Cortex®-M3 architecture optimized for small-footprint embedded applications
• Outstanding processing performance combined with fast interrupt handling
• Arm ® Thumb®-2 mixed 16- and 32-bit instruction set delivers the high performance expected of a 32-bit Arm ® core in a compact memory size usually associated with 8- and 16-bit devices, typically in the range of a few kilobytes of memory for microcontroller-class applications: – Single-cycle multiply instruction and hardware divide – Atomic bit manipulation (bit-banding), delivering maximum memory use and streamlined peripheral control – Unaligned data access, enabling data to be efficiently packed into memory
• Fast code execution permits slower processor clock or increases sleep mode time
• Harvard architecture characterized by separate buses for instruction and data
• Efficient processor core, system, and memories
• Hardware division and fast digital-signal-processing oriented multiply accumulate
• Saturating arithmetic for signal processing
• Deterministic, high-performance interrupt handling for time-critical applications
• Enhanced system debug with extensive breakpoint and trace capabilities
• Serial wire trace reduces the number of pins required for debugging and tracing
• Migration from the ARM7 ™ processor family for better performance and power efficiency
• Optimized for single-cycle flash memory use
• Ultra-low-power consumption with integrated sleep modes
• 1.25 DMIPS per MHz

9.4 RF Core

The RF Core contains an Arm ® Cortex®-M0 processor that interfaces the analog RF and base-band circuits, handles data to and from the system side, and assembles the information bits in a given packet structure. The RF core offers a high level, command-based API to the main CPU. The RF core is capable of autonomously handling the time-critical aspects of the radio protocols ( Bluetooth® low energy) thus offloading the main CPU and leaving more resources for the user application. The RF core has a dedicated 4-KB SRAM block and runs initially from separate ROM memory. The Arm ® Cortex®-M0 processor is not programmable by customers. www.ti.com CC2640R2F SWRS204C – DECEMBER 2016 – REVISED SEPTEMBER 2020 Copyright © 2020 Texas Instruments Incorporated Submit Document Feedback 37 Product Folder Links: CC2640R2F

9.5 Sensor Controller

The Sensor Controller contains circuitry that can be selectively enabled in standby mode. The peripherals in this domain may be controlled by the Sensor Controller Engine, which is a proprietary power-optimized CPU. This CPU can read and monitor sensors or perform other tasks autonomously, thereby significantly reducing power consumption and offloading the main CM3 CPU. The GPIOs that can be connected to the Sensor Controller are listed in Table 9-1. The Sensor Controller is set up using a PC-based configuration tool, called Sensor Controller Studio, and potential use cases may be (but are not limited to):

• Analog sensors using integrated ADC
• Digital sensors using GPIOs, bit-banged I 2C, and SPI
• UART communication for sensor reading or debugging
• Capacitive sensing
• Waveform generation
• Pulse counting
• Keyboard scan
• Quadrature decoder for polling rotation sensors
• Oscillator calibration Note Texas Instruments provides application examples for some of these use cases, but not for all of them. The peripherals in the Sensor Controller include the following:
• The low-power clocked comparator can be used to wake the device from any state in which the comparator is active. A configurable internal reference can be used in conjunction with the comparator. The output of the comparator can also be used to trigger an interrupt or the ADC.
• Capacitive sensing functionality is implemented through the use of a constant current source, a time-to-digital converter, and a comparator. The continuous time comparator in this block can also be used as a higher- accuracy alternative to the low-power clocked comparator. The Sensor Controller will take care of baseline tracking, hysteresis, filtering and other related functions.
• The ADC is a 12-bit, 200-ksamples/s ADC with eight inputs and a built-in voltage reference. The ADC can be triggered by many different sources, including timers, I/O pins, software, the analog comparator, and the RTC.
• The Sensor Controller also includes a SPI–I 2C digital interface.
• The analog modules can be connected to up to eight different GPIOs. The peripherals in the Sensor Controller can also be controlled from the main application processor. Table 9-1. GPIOs Connected to the Sensor Controller (1) ANALOG CAPABLE 7 × 7 RGZ DIO NUMBER 5 × 5 RHB DIO NUMBER 2.7 × 2.7 YFV DIO NUMBER 4 × 4 RSM DIO NUMBER Y 30 14 Y 29 13 13 Y 28 12 12 Y 27 11 11 9 Y 26 9 9 8 Y 25 10 10 7 Y 24 8 8 6 Y 23 7 7 5 N 7 4 4 2 N 6 3 3 1 N 5 2 2 0 CC2640R2F SWRS204C – DECEMBER 2016 – REVISED SEPTEMBER 2020 www.ti.com

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Table 9-1. GPIOs Connected to the Sensor Controller (1) (continued) ANALOG CAPABLE 7 × 7 RGZ DIO NUMBER 5 × 5 RHB DIO NUMBER 2.7 × 2.7 YFV DIO NUMBER 4 × 4 RSM DIO NUMBER N 4 1 1 N 3 0 0 N 2 N 1 N 0 (1) Depending on the package size, up to 16 pins can be connected to the Sensor Controller. Up to 8 of these pins can be connected to analog modules.

9.6 Memory

The Flash memory provides nonvolatile storage for code and data. The Flash memory is in-system programmable. The SRAM (static RAM) can be used for both storage of data and execution of code and is split into two 4-KB blocks and two 6-KB blocks. Retention of the RAM contents in standby mode can be enabled or disabled individually for each block to minimize power consumption. In addition, if flash cache is disabled, the 8-KB cache can be used as a general-purpose RAM. The ROM provides preprogrammed embedded TI-RTOS kernel, Driverlib, and lower layer protocol stack software ( Bluetooth low energy Controller). It also contains a bootloader that can be used to reprogram the device using SPI or UART. For CC2640R2Fxxx devices, the ROM contains Bluetooth 4.2 low energy host- and controller software libraries, leaving more of the flash memory available for the customer application.

9.7 Debug

The on-chip debug support is done through a dedicated cJTAG (IEEE 1149.7) or JTAG (IEEE 1149.1) interface.

9.8 Power Management

To minimize power consumption, the CC2640R2F device supports a number of power modes and power management features (see Table 9-2). Table 9-2. Power Modes MODE SOFTWARE CONFIGURABLE POWER MODES RESET PIN HELDACTIVE IDLE STANDBY SHUTDOWN CPU Active Off Off Off Off Flash On Available Off Off Off SRAM On On On Off Off Radio Available Available Off Off Off Supply System On On Duty Cycled Off Off Current 1.45 mA + 31 µA/MHz 650 µA 1 µA 0.15 µA 0.1 µA Wake-up Time to CPU Active(1) – 14 µs 151 µs 1015 µs 1015 µs Register Retention Full Full Partial No No SRAM Retention Full Full Full No No High-Speed Clock XOSC_HF or RCOSC_HF XOSC_HF or RCOSC_HF Off Off Off Low-Speed Clock XOSC_LF or RCOSC_LF XOSC_LF or RCOSC_LF XOSC_LF or RCOSC_LF Off Off Peripherals Available Available Off Off Off Sensor Controller Available Available Available Off Off Wake up on RTC Available Available Available Off Off Wake up on Pin Edge Available Available Available Available Off www.ti.com CC2640R2F SWRS204C – DECEMBER 2016 – REVISED SEPTEMBER 2020 Copyright © 2020 Texas Instruments Incorporated Submit Document Feedback 39 Product Folder Links: CC2640R2F

Table 9-2. Power Modes (continued) MODE SOFTWARE CONFIGURABLE POWER MODES RESET PIN HELDACTIVE IDLE STANDBY SHUTDOWN Wake up on Reset Pin Available Available Available Available Available Brown Out Detector (BOD) Active Active Duty Cycled Off N/A Power On Reset (POR) Active Active Active Active N/A (1) Not including RTOS overhead In active mode, the application CM3 CPU is actively executing code. Active mode provides normal operation of the processor and all of the peripherals that are currently enabled. The system clock can be any available clock source (see Table 9-2). In idle mode, all active peripherals can be clocked, but the Application CPU core and memory are not clocked and no code is executed. Any interrupt event will bring the processor back into active mode. In standby mode, only the always-on domain (AON) is active. An external wake-up event, RTC event, or sensor- controller event is required to bring the device back to active mode. MCU peripherals with retention do not need to be reconfigured when waking up again, and the CPU continues execution from where it went into standby mode. All GPIOs are latched in standby mode. In shutdown mode, the device is turned off entirely, including the AON domain and the Sensor Controller. The I/Os are latched with the value they had before entering shutdown mode. A change of state on any I/O pin defined as a wake-up from Shutdown pin wakes up the device and functions as a reset trigger. The CPU can differentiate between a reset in this way, a reset-by-reset pin, or a power-on-reset by reading the reset status register. The only state retained in this mode is the latched I/O state and the Flash memory contents. The Sensor Controller is an autonomous processor that can control the peripherals in the Sensor Controller independently of the main CPU, which means that the main CPU does not have to wake up, for example, to execute an ADC sample or poll a digital sensor over SPI. The main CPU saves both current and wake-up time that would otherwise be wasted. The Sensor Controller Studio enables the user to configure the sensor controller and choose which peripherals are controlled and which conditions wake up the main CPU.

9.9 Clock Systems

The CC2640R2F supports two external and two internal clock sources. A 24-MHz crystal is required as the frequency reference for the radio. This signal is doubled internally to create a 48-MHz clock. The 32-kHz crystal is optional. Bluetooth low energy requires a slow-speed clock with better than ±500 ppm accuracy if the device is to enter any sleep mode while maintaining a connection. The internal 32-kHz RC oscillator can in some use cases be compensated to meet the requirements. The low-speed crystal oscillator is designed for use with a 32-kHz watch-type crystal. The internal high-speed oscillator (48-MHz) can be used as a clock source for the CPU subsystem. The internal low-speed oscillator (32.768-kHz) can be used as a reference if the low-power crystal oscillator is not used. The 32-kHz clock source can be used as external clocking reference through GPIO.

9.10 General Peripherals and Modules

The I/O controller controls the digital I/O pins and contains multiplexer circuitry to allow a set of peripherals to be assigned to I/O pins in a flexible manner. All digital I/Os are interrupt and wake-up capable, have a programmable pullup and pulldown function and can generate an interrupt on a negative or positive edge (configurable). When configured as an output, pins can function as either push-pull or open-drain. Five GPIOs have high drive capabilities (marked in bold in Section 7). The SSIs are synchronous serial interfaces that are compatible with SPI, MICROWIRE, and Texas Instruments synchronous serial interfaces. The SSIs support both SPI master and slave up to 4 MHz. CC2640R2F SWRS204C – DECEMBER 2016 – REVISED SEPTEMBER 2020 www.ti.com

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The UART implements a universal asynchronous receiver/transmitter function. It supports flexible baud-rate generation up to a maximum of 3 Mbps . Timer 0 is a general-purpose timer module (GPTM), which provides two 16-bit timers. The GPTM can be configured to operate as a single 32-bit timer, dual 16-bit timers or as a PWM module. Timer 1, Timer 2, and Timer 3 are also GPTMs. Each of these timers is functionally equivalent to Timer 0. In addition to these four timers, the RF core has its own timer to handle timing for RF protocols; the RF timer can be synchronized to the RTC. The I2C interface is used to communicate with devices compatible with the I 2C standard. The I 2C interface is capable of 100-kHz and 400-kHz operation, and can serve as both I2C master and I2C slave. The TRNG module provides a true, nondeterministic noise source for the purpose of generating keys, initialization vectors (IVs), and other random number requirements. The TRNG is built on 24 ring oscillators that create unpredictable output to feed a complex nonlinear combinatorial circuit. The watchdog timer is used to regain control if the system fails due to a software error after an external device fails to respond as expected. The watchdog timer can generate an interrupt or a reset when a predefined time- out value is reached. The device includes a direct memory access (µDMA) controller. The µDMA controller provides a way to offload data transfer tasks from the CM3 CPU, allowing for more efficient use of the processor and the available bus bandwidth. The µDMA controller can perform transfer between memory and peripherals. The µDMA controller has dedicated channels for each supported on-chip module and can be programmed to automatically perform transfers between peripherals and memory as the peripheral is ready to transfer more data. Some features of the µDMA controller include the following (this is not an exhaustive list):

• Highly flexible and configurable channel operation of up to 32 channels
• Transfer modes: – Memory-to-memory – Memory-to-peripheral – Peripheral-to-memory – Peripheral-to-peripheral
• Data sizes of 8, 16, and 32 bits The AON domain contains circuitry that is always enabled, except for in Shutdown (where the digital supply is off). This circuitry includes the following:
• The RTC can be used to wake the device from any state where it is active. The RTC contains three compare and one capture registers. With software support, the RTC can be used for clock and calendar operation. The RTC is clocked from the 32-kHz RC oscillator or crystal. The RTC can also be compensated to tick at the correct frequency even when the internal 32-kHz RC oscillator is used instead of a crystal.
• The battery monitor and temperature sensor are accessible by software and give a battery status indication as well as a coarse temperature measure. www.ti.com CC2640R2F SWRS204C – DECEMBER 2016 – REVISED SEPTEMBER 2020 Copyright © 2020 Texas Instruments Incorporated Submit Document Feedback 41 Product Folder Links: CC2640R2F

9.11 Voltage Supply Domains

The CC2640R2F device can interface to two or three different voltage domains depending on the package type. On-chip level converters ensure correct operation as long as the signal voltage on each input/output pin is set with respect to the corresponding supply pin (VDDS, VDDS2 or VDDS3). Table 9-3 lists the pin-to-VDDS mapping. Table 9-3. Pin Function to VDDS Mapping Table Package VQFN 7 × 7 (RGZ) VQFN 5 × 5 (RHB) VQFN 4 × 4 (RSM) DSBGA (YFV) VDDS(1) DIO 23–30 Reset_N DIO 7–14 Reset_N DIO 5–9 Reset_N DIO 7–13 Reset_N VDDS2 DIO 0–11 DIO 0–6 JTAG DIO 0–4 JTAG DIO 0–6 JTAG VDDS3 DIO 12–22 JTAG N/A N/A N/A (1) VDDS_DCDC must be connected to VDDS on the PCB.

9.12 System Architecture

Depending on the product configuration, CC26xx can function either as a Wireless Network Processor (WNP— an IC running the wireless protocol stack, with the application running on a separate MCU), or as a System-on- Chip (SoC), with the application and protocol stack running on the Arm® Cortex®-M3 core inside the device. In the first case, the external host MCU communicates with the device using SPI or UART. In the second case, the application must be written according to the application framework supplied with the wireless protocol stack. CC2640R2F SWRS204C – DECEMBER 2016 – REVISED SEPTEMBER 2020 www.ti.com

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Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI's customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

10.1 Application Information

Very few external components are required for the operation of the CC2640R2F device. This section provides some general information about the various configuration options when using the CC2640R2F in an application, and then shows two examples of application circuits with schematics and layout. This is only a small selection of the many application circuit examples available as complete reference designs from the product folder on www.ti.com. Figure 10-1 shows the various RF front-end configuration options. The RF front end can be used in differential- or single-ended configurations with the options of having internal or external biasing. These options allow for various trade-offs between cost, board space, and RF performance. Differential operation with external bias gives the best performance while single-ended operation with internal bias gives the least amount of external components and the lowest power consumption. Reference designs exist for each of these options. Antenna (50 Ohm) 1 pF 1 pF 2.4 nH 2.4±2.7 nH 6.8 pF 6.2±6.8 nH Antenna (50 Ohm) 1.2 pF 15 nH 2 nH 1.2 pF Antenna (50 Ohm) 1.2 pF 2 nH 1.2 pF Antenna (50 Ohm) 1.2 pF 2 nH 1.2 pF Pin 1 (RF P) Pin 2 (RF N) Pin 3 (RXTX) Pin 1 (RF P) Pin 2 (RF N) Pin 1 (RF P) Pin 2 (RF N) Red = Not necessary if internal bias is used Red = Not necessary if internal bias is used Differential operation Single ended operation Single ended operation with 2 antennas Pin 3 (RXTX) 15 nH 15 nH CC26xx (GND exposed die attached pad ) Pin 3/4 (RXTX) Pin 1 (RF P) Pin 2 (RF N) 24MHz XTAL (Load caps on chip) 10µF 10µH Optional inductor. Only needed for DCDC operation 12 pF 12 pF 12 pF 12 pF 2 nH 2 nH 1 pF input decoupling 10µF±22µF To VDDR pins VDDS_DCDC DCDC_SW Red = Not necessary if internal bias is used Copyright © 2016, Texas Instruments Incorporated Figure 10-1. CC2640R2F Application Circuit www.ti.com CC2640R2F SWRS204C – DECEMBER 2016 – REVISED SEPTEMBER 2020 Copyright © 2020 Texas Instruments Incorporated Submit Document Feedback 43 Product Folder Links: CC2640R2F

Figure 10-2 shows the various supply voltage configuration options. Not all power supply decoupling capacitors or digital I/Os are shown. Exact pin positions will vary between the different package options. For a detailed overview of power supply decoupling and wiring, see the TI reference designs and the CC26xx technical reference manual (Section 11.3). Internal DC-DC Regulator External RegulatorInternal LDO Regulator (GND Exposed Die Attached Pad) Pin 3/4 (RXTX) Pin 1 (RF P) Pin 2 (RF N) 24-MHz XTAL (Load Caps on Chip) F H VDDS_DCDC Input Decoupling F±22 F To All VDDR Pins VDDS_DCDC Pin DCDC_SW Pin 1.8 V±3.8 V to All VDDS Pins VDDR VDDR VDDS VDDS CC26xx (GND Exposed Die Attached Pad) Pin 3/4 (RXTX) Pin 1 (RF P) Pin 2 (RF N) 24-MHz XTAL (Load Caps on Chip) VDDS_DCDC Input Decoupling F±22 F To All VDDR Pins VDDS_DCDC Pin NC 1.8 V±3.8 V Supply Voltage VDDR VDDR VDDS VDDS CC26xx F To All VDDS Pins (GND Exposed Die Attached Pad) Pin 3/4 (RXTX) Pin 1 (RF P) Pin 2 (RF N) 24-MHz XTAL (Load Caps on Chip) VDDS_DCDC Pin CC26xx 2.2 F DCDC_SW Pin 1.7 V±1.95 V to All VDDR- and VDDS Pins Except VDDS_DCDCExt. Regulator Copyright © 2016, Texas Instruments Incorporated Figure 10-2. Supply Voltage Configurations CC2640R2F SWRS204C – DECEMBER 2016 – REVISED SEPTEMBER 2020 www.ti.com

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10.2 5 × 5 External Differential (5XD) Application Circuit C12 DNM C13 1 pF L12 2 nH 1 2 L13 2 nH 1 2 VDDR Decoupling Capacitors Pin 32Pin 29 50-Ω Antenna VDDS 10 uH 32.768 kHz C18 12 pF C17 12 pF Place L1 and C8 close to pin 17 C23 DNM C22 DNM 10 µF C10 DNM C16 100 nF 10 µF CC2650F128RHB VSS33 DIO_06 DIO_17 DIO_28 DIO_39 DIO_410 DIO_515 DIO_616 DIO_720 DIO_821 DIO_922 DIO_1023 DIO_1124 DIO_1225 DIO_1326 DIO_1427 VDDR 29 VDDR 32 VDDS 28 VDDS2 11 VDDS_DCDC 18 DCOUPL12 RESET_N19 JTAG_TMSC13 JTAG_TCKC14 X32K_Q1 4X32K_Q2 X24M_N 30X24M_P RF_P 1RF_N 2RX_TX DCDC_SW

24 MHz

X24M_N X24M_P VDDS VDDR DCDC_SW DCDC_SW C31 6.8 pF VDDS nRESET C19 1 µF JTAG_TCK JTAG_TMS DIO_1 DIO_0 DIO_3 DIO_2 DIO_5/JTAG_TDO DIO_4 DIO_7 DIO_6/JTAG_TDI DIO_10 DIO_9 DIO_8 DIO_12 DIO_11 DIO_14 DIO_13 RX_TX RFP RFN L11 2.7 nH 1 2 L21 2.4 nH VDD_EB FL1 BLM18HE152SN1 100 nF 100 nF 100 nF VDDS Decoupling Capacitors Pin 18Pin 28Pin 11 100 nF L10 6.2 nH 100 k VDDR Copyright © 2016, Texas Instruments Incorporated Figure 10-3. 5 × 5 External Differential (5XD) Application Circuit www.ti.com CC2640R2F SWRS204C – DECEMBER 2016 – REVISED SEPTEMBER 2020 Copyright © 2020 Texas Instruments Incorporated Submit Document Feedback 45 Product Folder Links: CC2640R2F

10.2.1 Layout

Figure 10-4. 5 × 5 External Differential (5XD) Layout CC2640R2F SWRS204C – DECEMBER 2016 – REVISED SEPTEMBER 2020 www.ti.com

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10.3 4 × 4 External Single-ended (4XS) Application Circuit RF_P C14 12 pF

10 F µ

VDDS Decoupling CapacitorsVDDS Pin 11 Pin 27 Pin 19 32.768 kHz C18 12 pF C17 12 pF 100 nF 100 nF 100 nF C12 1.2 pF VDDS 100 k VDDR Place L1 and C8 close to pin 18 C20 100 nF nRESET DIO_8 DIO_0 DIO_7 DIO_9 Pin 28 Pin 32 100 nF VDDR Decoupling Capacitors VDDR

10 H µ

1 2DCDC_SW C19 1 µF 50-Ω Antenna FL1 BLM18HE152SN1 RF_N used for RX biasing. L21 may be removed at the cost of 1 dB degraded sensitivity VDD_EB C13 1.2 pF L12 2 nH 1 2 CC26XX_4X4 DIO_08 DIO_19 DIO_210 DIO_315 DIO_416 DIO_522 DIO_623 DIO_724 DIO_825 DIO_926 RESET_N21 JTAG_TCKC14 JTAG_TMSC13 X24M_P X24M_N DCOUPL VSS29 VSS3 EGP33 VDDS 27 VDDS2 11 VDDS_DCDC 19 VDDR 28 VDDR 32 DCDC_SW RX/TX RF_N RF_P X32K_Q2 X32K_Q1 VSS7 VSS17 VSS20 DIO_1 DIO_3/JTAG_TDO DIO_2 DIO_6 DIO_5 DIO_4/JTAG_TDI DCDC_SW JTAG_TCK nRESET JTAG_TMS C23 DNM C22 DNM X24M_N X24M_P Copyright © 2016, Texas Instruments Incorporated Figure 10-5. 4 × 4 External Single-ended (4XS) Application Circuit www.ti.com CC2640R2F SWRS204C – DECEMBER 2016 – REVISED SEPTEMBER 2020 Copyright © 2020 Texas Instruments Incorporated Submit Document Feedback 47 Product Folder Links: CC2640R2F

10.3.1 Layout

Figure 10-6. 4 × 4 External Single-ended (4XS) Layout CC2640R2F SWRS204C – DECEMBER 2016 – REVISED SEPTEMBER 2020 www.ti.com

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11 Device and Documentation Support

11.1 Device Nomenclature

To designate the stages in the product development cycle, TI assigns prefixes to all pre-production part numbers or date-code markings. Each device has one of three prefixes/identifications: X, P, or null (no prefix) (for example, CC2640R2F is in production; therefore, no prefix/identification is assigned). Device development evolutionary flow: X Experimental device that is not necessarily representative of the final device's electrical specifications and may not use production assembly flow. P Prototype device that is not necessarily the final silicon die and may not necessarily meet final electrical specifications. null Production version of the silicon die that is fully qualified. Production devices have been characterized fully, and the quality and reliability of the device have been demonstrated fully. TI's standard warranty applies. Predictions show that prototype devices (X or P) have a greater failure rate than the standard production devices. Texas Instruments recommends that these devices not be used in any production system because their expected end-use failure rate still is undefined. Only qualified production devices are to be used. TI device nomenclature also includes a suffix with the device family name. This suffix indicates the package type (for example, ). For orderable part numbers of the CC2640R2F device RSM, RHB, RGZ, or YFV package types, see the Package Option Addendum of this document, the TI website ( www.ti.com), or contact your TI sales representative. SimpleLink™ Multistandard Wireless MCU DEVICE FAMILY PREFIX X = Experimental device Blank = Qualified device PACKAGE DESIGNATOR RGZ = 48-pin VQFN (Very Thin Quad Flatpack No-Lead) RHB = 32-pin VQFN (Very Thin Quad Flatpack No-Lead) RSM = 32-pin VQFN (Very Thin Quad Flatpack No-Lead) YFV = 34-pin DSBGA (Die-Size Ball Grid Array) R = Large Reel T = Small Reel CC26 xx zzz (R/T)yyy ROM version F128 = ROM version 1 R2F = ROM version 2 DEVICE 40 = Bluetooth Figure 11-1. Device Nomenclature www.ti.com CC2640R2F SWRS204C – DECEMBER 2016 – REVISED SEPTEMBER 2020 Copyright © 2020 Texas Instruments Incorporated Submit Document Feedback 49 Product Folder Links: CC2640R2F

11.2 Tools and Software

TI offers an extensive line of development tools, including tools to evaluate the performance of the processors, generate code, develop algorithm implementations, and fully integrate and debug software and hardware modules. The following products support development of the CC2640R2F device applications: Software Tools: SmartRF Studio 7 is a PC application that helps designers of radio systems to easily evaluate the RF-IC at an early stage in the design process.

• Test functions for sending and receiving radio packets, continuous wave transmit and receive
• Evaluate RF performance on custom boards by wiring it to a supported evaluation board or debugger
• Can also be used without any hardware, but then only to generate, edit and export radio configuration settings
• Can be used in combination with several development kits for Texas Instruments’ CCxxxx RF-ICs Sensor Controller Studio provides a development environment for the CC26xx Sensor Controller. The Sensor Controller is a proprietary, power-optimized CPU in the CC26xx, which can perform simple background tasks autonomously and independent of the System CPU state.
• Allows for Sensor Controller task algorithms to be implemented using a C-like programming language
• Outputs a Sensor Controller Interface driver, which incorporates the generated Sensor Controller machine code and associated definitions
• Allows for rapid development by using the integrated Sensor Controller task testing and debugging functionality. This allows for live visualization of sensor data and algorithm verification. IDEs and Compilers: Code Composer Studio™ Integrated Development Environment (IDE):
• Integrated development environment with project management tools and editor
• Code Composer Studio (CCS) 7.0 and later has built-in support for the CC26xx device family
• Best support for XDS debuggers; XDS100v3, XDS110 and XDS200
• High integration with TI-RTOS with support for TI-RTOS Object View IAR Embedded Workbench® for Arm®:
• Integrated development environment with project management tools and editor
• IAR EWARM 7.80.1 and later has built-in support for the CC26xx device family
• Broad debugger support, supporting XDS100v3, XDS200, IAR I-Jet and Segger J-Link
• Integrated development environment with project management tools and editor
• RTOS plugin available for TI-RTOS For a complete listing of development-support tools for the CC2640R2F platform, visit the Texas Instruments website at www.ti.com . For information on pricing and availability, contact the nearest TI field sales office or authorized distributor. CC2640R2F SWRS204C – DECEMBER 2016 – REVISED SEPTEMBER 2020 www.ti.com

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Product Folder Links: CC2640R2F

11.3 Documentation Support

To receive notification of documentation updates, navigate to the device product folder on ti.com ( CC2640R2F ). In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. The current documentation that describes the CC2640R2F devices, related peripherals, and other technical collateral is listed in the following. Technical Reference Manual CC13xx, CC26xx SimpleLink™ Wireless MCU Technical Reference Manual SPACER

11.4 Texas Instruments Low-Power RF Website

Texas Instruments' Low-Power RF website has all the latest products, application and design notes, FAQ section, news and events updates. Go to www.ti.com/lprf.

11.5 Low-Power RF eNewsletter

The Low-Power RF eNewsletter is up-to-date on new products, news releases, developers’ news, and other news and events associated with low-power RF products from TI. The Low-Power RF eNewsletter articles include links to get more online information. Sign up at: www.ti.com/lprfnewsletter

11.6 Support Resources

TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight from the experts. Search existing answers or ask your own question to get the quick design help you need. Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use.

11.7 Trademarks

SmartRF™, Code Composer Studio™, LaunchPad™, TI E2E™ are trademarks of Texas Instruments. IEEE Std 1241™ is a trademark of Institute of Electrical and Electronics Engineers, Incorporated. ARM7™ is a trademark of Arm Limited (or its subsidiaries). Arm®, Cortex®, and Thumb® are registered trademarks of Arm Limited (or its subsidiaries). CoreMark® is a registered trademark of Embedded Microprocessor Benchmark Consortium. Bluetooth® is a registered trademark of Bluetooth SIG Inc. IAR Embedded Workbench® are registered trademarks of IAR Systems AB. Wi-Fi® is a registered trademark of Wi-Fi Alliance. ZigBee® is a registered trademark of ZigBee Alliance. All other trademarks are the property of their respective owners.

11.8 Electrostatic Discharge Caution

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

11.9 Export Control Notice

Recipient agrees to not knowingly export or re-export, directly or indirectly, any product or technical data (as defined by the U.S., EU, and other Export Administration Regulations) including software, or any controlled product restricted by other applicable national regulations, received from disclosing party under nondisclosure obligations (if any), or any direct product of such technology, to any destination to which such export or re-export www.ti.com CC2640R2F SWRS204C – DECEMBER 2016 – REVISED SEPTEMBER 2020 Copyright © 2020 Texas Instruments Incorporated Submit Document Feedback 51 Product Folder Links: CC2640R2F

is restricted or prohibited by U.S. or other applicable laws, without obtaining prior authorization from U.S. Department of Commerce and other competent Government authorities to the extent required by those laws.

11.10 Glossary

TI Glossary This glossary lists and explains terms, acronyms, and definitions. CC2640R2F SWRS204C – DECEMBER 2016 – REVISED SEPTEMBER 2020 www.ti.com

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12 Mechanical, Packaging, and Orderable Information

12.1 Packaging Information

The following pages include mechanical packaging and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. www.ti.com CC2640R2F SWRS204C – DECEMBER 2016 – REVISED SEPTEMBER 2020 Copyright © 2020 Texas Instruments Incorporated Submit Document Feedback 53 Product Folder Links: CC2640R2F

www.ti.com 17-Jun-2025 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) CC2640R2FRGZR Active Production VQFN (RGZ) | 48 2500 | LARGE T&R Yes NIPDAU | NIPDAUAG Level-3-260C-168 HR -40 to 85 CC2640 R2F CC2640R2FRGZR.A Active Production VQFN (RGZ) | 48 2500 | LARGE T&R Yes NIPDAU Level-3-260C-168 HR -40 to 85 CC2640 R2F CC2640R2FRGZR.B Active Production VQFN (RGZ) | 48 2500 | LARGE T&R Yes NIPDAU Level-3-260C-168 HR -40 to 85 CC2640 R2F CC2640R2FRGZRG4 Active Production VQFN (RGZ) | 48 2500 | LARGE T&R Yes NIPDAU Level-3-260C-168 HR -40 to 85 CC2640 R2F CC2640R2FRGZRG4.A Active Production VQFN (RGZ) | 48 2500 | LARGE T&R Yes NIPDAU Level-3-260C-168 HR -40 to 85 CC2640 R2F CC2640R2FRGZRG4.B Active Production VQFN (RGZ) | 48 2500 | LARGE T&R Yes NIPDAU Level-3-260C-168 HR -40 to 85 CC2640 R2F CC2640R2FRGZT Active Production VQFN (RGZ) | 48 250 | SMALL T&R Yes NIPDAU | NIPDAUAG Level-3-260C-168 HR -40 to 85 CC2640 R2F CC2640R2FRGZT.A Active Production VQFN (RGZ) | 48 250 | SMALL T&R Yes NIPDAU Level-3-260C-168 HR -40 to 85 CC2640 R2F CC2640R2FRGZT.B Active Production VQFN (RGZ) | 48 250 | SMALL T&R Yes NIPDAU Level-3-260C-168 HR -40 to 85 CC2640 R2F CC2640R2FRHBR Active Production VQFN (RHB) | 32 2500 | LARGE T&R Yes NIPDAU | NIPDAUAG Level-3-260C-168 HR -40 to 85 CC2640 R2F CC2640R2FRHBR.A Active Production VQFN (RHB) | 32 2500 | LARGE T&R Yes NIPDAU Level-3-260C-168 HR -40 to 85 CC2640 R2F CC2640R2FRHBR.B Active Production VQFN (RHB) | 32 2500 | LARGE T&R Yes NIPDAU Level-3-260C-168 HR -40 to 85 CC2640 R2F CC2640R2FRHBT Active Production VQFN (RHB) | 32 250 | SMALL T&R Yes NIPDAU | NIPDAUAG Level-3-260C-168 HR -40 to 85 CC2640 R2F CC2640R2FRHBT.A Active Production VQFN (RHB) | 32 250 | SMALL T&R Yes NIPDAU Level-3-260C-168 HR -40 to 85 CC2640 R2F CC2640R2FRHBT.B Active Production VQFN (RHB) | 32 250 | SMALL T&R Yes NIPDAU Level-3-260C-168 HR -40 to 85 CC2640 R2F CC2640R2FRSMR Active Production VQFN (RSM) | 32 3000 | LARGE T&R Yes NIPDAU | NIPDAUAG Level-3-260C-168 HR -40 to 85 CC2640 R2F Addendum-Page 1

www.ti.com 17-Jun-2025 Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) CC2640R2FRSMR.A Active Production VQFN (RSM) | 32 3000 | LARGE T&R Yes NIPDAU Level-3-260C-168 HR -40 to 85 CC2640 R2F CC2640R2FRSMR.B Active Production VQFN (RSM) | 32 3000 | LARGE T&R Yes NIPDAU Level-3-260C-168 HR -40 to 85 CC2640 R2F CC2640R2FRSMT Active Production VQFN (RSM) | 32 250 | SMALL T&R Yes NIPDAU | NIPDAUAG Level-3-260C-168 HR -40 to 85 CC2640 R2F CC2640R2FRSMT.A Active Production VQFN (RSM) | 32 250 | SMALL T&R Yes NIPDAU Level-3-260C-168 HR -40 to 85 CC2640 R2F CC2640R2FRSMT.B Active Production VQFN (RSM) | 32 250 | SMALL T&R Yes NIPDAU Level-3-260C-168 HR -40 to 85 CC2640 R2F CC2640R2FYFVR Active Production DSBGA (YFV) | 34 2500 | LARGE T&R Yes SNAGCU Level-1-260C-UNLIM -40 to 85 CC2640 CC2640R2FYFVR.B Active Production DSBGA (YFV) | 34 2500 | LARGE T&R Yes SNAGCU Level-1-260C-UNLIM -40 to 85 CC2640 CC2640R2FYFVT Active Production DSBGA (YFV) | 34 250 | LARGE T&R Yes SNAGCU Level-1-260C-UNLIM -40 to 85 CC2640 CC2640R2FYFVT.B Active Production DSBGA (YFV) | 34 250 | LARGE T&R Yes SNAGCU Level-1-260C-UNLIM -40 to 85 CC2640 (1) Status: For more details on status, see our product life cycle. (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Addendum-Page 2

www.ti.com 17-Jun-2025 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF CC2640R2F :

• Automotive : CC2640R2F-Q1 NOTE: Qualified Version Definitions:
• Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects Addendum-Page 3

PACKAGE MATERIALS INFORMATION www.ti.com 2-Oct-2025 TAPE AND REEL INFORMATION Reel Width (W1) REEL DIMENSIONS A0B0K0WDimension designed to accommodate the component lengthDimension designed to accommodate the component thicknessOverall width of the carrier tapePitch between successive cavity centersDimension designed to accommodate the component width TAPE DIMENSIONSK0 P1B0WA0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket QuadrantsSprocket HolesQ1Q1Q2Q2Q3Q3Q4Q4User Direction of Feed P1ReelDiameter *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION www.ti.com 2-Oct-2025 TAPE AND REEL BOX DIMENSIONS Width (mm) W LH *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) CC2640R2FRGZR VQFN RGZ 48 2500 367.0 367.0 35.0 CC2640R2FRGZRG4 VQFN RGZ 48 2500 336.6 336.6 31.8 CC2640R2FRGZT VQFN RGZ 48 250 210.0 185.0 35.0 CC2640R2FRHBR VQFN RHB 32 2500 367.0 367.0 35.0 CC2640R2FRHBT VQFN RHB 32 250 210.0 185.0 35.0 CC2640R2FRSMR VQFN RSM 32 3000 367.0 367.0 35.0 CC2640R2FRSMT VQFN RSM 32 250 210.0 185.0 35.0 CC2640R2FYFVR DSBGA YFV 34 2500 182.0 182.0 20.0 CC2640R2FYFVT DSBGA YFV 34 250 182.0 182.0 20.0 Pack Materials-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 2-Oct-2025 TRAY L - Outer tray length without tabs KO - Outer tray height W - Outer tray width P1 - Tray unit pocket pitch CW - Measurement for tray edge (Y direction) to corner pocket center CL - Measurement for tray edge (X direction) to corner pocket center Text Chamfer on Tray corner indicates Pin 1 orientation of packed units. *All dimensions are nominal Device Package Name Package Type Pins SPQ Unit array matrix Max temperature (°C) L (mm) W (mm) (µm) (mm) CL (mm) CW (mm) CC2640R2FRHBR RHB VQFN 32 2500 14 x 35 150 315 135.9 7620 8.8 7.9 8.15 CC2640R2FRHBR RHB VQFN 32 2500 14 x 35 150 315 135.9 7620 8.8 7.9 8.15 CC2640R2FRHBT RHB VQFN 32 250 14 x 35 150 315 135.9 7620 8.8 7.9 8.15 CC2640R2FRHBT RHB VQFN 32 250 14 x 35 150 315 135.9 7620 8.8 7.9 8.15 CC2640R2FRSMR RSM VQFN 32 3000 14 x 35 150 315 135.9 7620 8.8 7.9 8.15 CC2640R2FRSMT RSM VQFN 32 250 14 x 35 150 315 135.9 7620 8.8 7.9 8.15 CC2640R2FRSMT RSM VQFN 32 250 14 x 35 150 315 135.9 7620 8.8 7.9 8.15 Pack Materials-Page 3

PACKAGE MATERIALS INFORMATION www.ti.com 2-Oct-2025 Device Package Name Package Type Pins SPQ Unit array matrix Max temperature (°C) L (mm) W (mm) (µm) (mm) CL (mm) CW (mm) Pack Materials-Page 4

www.ti.com GENERIC PACKAGE VIEW Images above are just a representation of the package family, actual package may vary. Refer to the product data sheet for package details. VQFN - 1 mm max heightRGZ 48 PLASTIC QUADFLAT PACK- NO LEAD7 x 7, 0.5 mm pitch 4224671/A

NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. The package thermal pad must be soldered to the printed circuit board for optimal thermal and mechanical performance. PACKAGE OUTLINE 4219044/D 02/2022 www.ti.com VQFN - 1 mm max height PLASTIC QUADFLAT PACK- NO LEAD RGZ0048A A 0.08 C

0.1 C A B

0.05 C B SYMM SYMM PIN 1 INDEX AREA 7.1 6.9 7.1 6.9

1 MAX

0.05 0.00 SEATING PLANE C 5.15±0.1 2X 5.5 5.5 44X 0.5 48X 0.5 0.3 48X 0.30 0.18PIN1 ID (OPTIONAL) (0.2) TYP 13 24 3748 (0.1) TYP SIDE WALL DETAIL OPTIONAL METAL THICKNESS SEE SIDE WALL DETAIL CHAMFERED LEAD CORNER LEAD OPTION (0.45) TYP SEE LEAD OPTION

NOTES: (continued) 4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). 5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view. It is recommended that vias under paste be filled, plugged or tented. EXAMPLE BOARD LAYOUT 4219044/D 02/2022 www.ti.com VQFN - 1 mm max heightRGZ0048A PLASTIC QUADFLAT PACK- NO LEAD SYMM SYMM LAND PATTERN EXAMPLE SCALE: 15X ( 5.15) 2X (6.8) (6.8) 48X (0.6) 48X (0.24) 44X (0.5) 2X (5.5) (5.5) 21X (Ø0.2) VIA TYP (R0.05) TYP NON SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DEFINED METAL SOLDER MASK OPENING EXPOSED METAL SOLDER MASK DETAILS SOLDER MASK OPENING METAL UNDER SOLDER MASK EXPOSED METAL

0.07 MAX

0.07 MIN

(1.26) (1.065) 13 24 3748

NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. EXAMPLE STENCIL DESIGN 4219044/D 02/2022 www.ti.com VQFN - 1 mm max heightRGZ0048A PLASTIC QUADFLAT PACK- NO LEAD SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL EXPOSED PAD 67% PRINTED COVERAGE BY AREA SCALE: 15X SYMM SYMM ( 1.06) 2X (6.8) (6.8) 48X (0.6) 48X (0.24) 44X (0.5) 2X (5.5) (5.5) (R0.05) TYP (0.63) 2X (0.63) 2X (1.26) (1.26) 13 24 3748

D: Max = E: Max = 2.714 mm, Min = 2.714 mm, Min = 2.654 mm 2.654 mm

www.ti.com GENERIC PACKAGE VIEW This image is a representation of the package family, actual package may vary. Refer to the product data sheet for package details. VQFN - 1 mm max heightRSM 32 PLASTIC QUAD FLATPACK - NO LEAD4 x 4, 0.4 mm pitch 4224982/A

www.ti.com PACKAGE OUTLINE C 32X 0.25 0.15 2.8 0.05 32X 0.45 0.25 (0.2) TYP 0.05 0.00 28X 0.4 2.8 2X 2.8 A 4.1 3.9 B 4.1 3.9 0.25 0.15 0.45 0.25 4X (0.45) (0.1) VQFN - 1 mm max heightRSM0032B PLASTIC QUAD FLATPACK - NO LEAD 4219108/B 08/2019 PIN 1 INDEX AREA 0.08 C SEATING PLANE 8 17 9 16 32 25 (OPTIONAL) PIN 1 ID 0.05 EXPOSED THERMAL PAD DETAIL SEE TERMINAL SYMM SYMM NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance. SEE SIDE WALL DETAIL SIDE WALL DETAIL OPTIONAL METAL THICKNESS SCALE 3.000 DETAIL OPTIONAL TERMINAL TYPICAL

www.ti.com EXAMPLE BOARD LAYOUT

0.05 MIN

0.05 MAX

32X (0.2) 32X (0.55) ( 0.2) TYP VIA 28X (0.4) (3.85) (3.85) ( 2.8) (R0.05) TYP (1.15) (1.15) VQFN - 1 mm max heightRSM0032B PLASTIC QUAD FLATPACK - NO LEAD 4219108/B 08/2019 SYMM 9 16 2532 SYMM LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:20X NOTES: (continued) 4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). 5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view. It is recommended that vias under paste be filled, plugged or tented. SOLDER MASK OPENING METAL UNDER SOLDER MASK SOLDER MASK DEFINED EXPOSED METAL METAL SOLDER MASK OPENING SOLDER MASK DETAILS NON SOLDER MASK DEFINED (PREFERRED) EXPOSED METAL

www.ti.com EXAMPLE STENCIL DESIGN 32X (0.55) 32X (0.2) 28X (0.4) (3.85) (3.85) 4X ( 1.23) (R0.05) TYP (0.715) (0.715) VQFN - 1 mm max heightRSM0032B PLASTIC QUAD FLATPACK - NO LEAD 4219108/B 08/2019 NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. SYMM METAL TYP SOLDER PASTE EXAMPLE BASED ON 0.1 mm THICK STENCIL EXPOSED PAD 33: 77% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE SCALE:20X SYMM 9 16 2532

www.ti.com GENERIC PACKAGE VIEW Images above are just a representation of the package family, actual package may vary. Refer to the product data sheet for package details. VQFN - 1 mm max heightRHB 32 PLASTIC QUAD FLATPACK - NO LEAD5 x 5, 0.5 mm pitch 4224745/A

www.ti.com PACKAGE OUTLINE C 32X 0.3 0.2 3.45 0.1 32X 0.5 0.3 (0.2) TYP 0.05 0.00 28X 0.5 3.5 2X 3.5 A 5.1 4.9 B 5.1 4.9 (0.1) VQFN - 1 mm max heightRHB0032E PLASTIC QUAD FLATPACK - NO LEAD 4223442/B 08/2019 PIN 1 INDEX AREA 0.08 C SEATING PLANE 8 17 9 16 32 25 (OPTIONAL) PIN 1 ID 0.05 C EXPOSED THERMAL PAD

33 SYMM

NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance. SCALE 3.000 SEE SIDE WALL DETAIL 20.000 SIDE WALL DETAIL OPTIONAL METAL THICKNESS

www.ti.com EXAMPLE BOARD LAYOUT (1.475) 32X (0.25) 32X (0.6) ( 0.2) TYP VIA 28X (0.5) (4.8) (4.8) (1.475) ( 3.45) (R0.05) TYP VQFN - 1 mm max heightRHB0032E PLASTIC QUAD FLATPACK - NO LEAD 4223442/B 08/2019 SYMM 9 16 2532 SYMM LAND PATTERN EXAMPLE SCALE:18X NOTES: (continued) 4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). 5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view. It is recommended that vias under paste be filled, plugged or tented. SOLDER MASK OPENING METAL UNDER SOLDER MASK SOLDER MASK DEFINED METAL SOLDER MASK OPENINGSOLDER MASK DETAILS NON SOLDER MASK DEFINED (PREFERRED)

www.ti.com EXAMPLE STENCIL DESIGN 32X (0.6) 32X (0.25) 28X (0.5) (4.8) (4.8) 4X ( 1.49) (0.845) (0.845)(R0.05) TYP VQFN - 1 mm max heightRHB0032E PLASTIC QUAD FLATPACK - NO LEAD 4223442/B 08/2019 NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. SYMM METAL TYP SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL EXPOSED PAD 33: 75% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE SCALE:20X SYMM 9 16 2532

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