CC1206KKX7R0BB104 YAGEO | Alldatasheet
Document overview
- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 16
Technical content
Mid-voltage: NP0/X7R (Pb Free & RoHS compliant)
100 V TO 500 V
Product specification – Sep 08, 2005 V. 0
www.yageo.com Sep 08, 2005 V.0 Mid-voltage Surface-Mount Ceramic Multilayer Capacitors NP0/X7R \`SCOPE This specification describes Mid- voltage NP0/X7R series chip capacitors with lead-free terminations.
APPLICATIONS
z PCs, hard disk, game PCs z Power supplies z LCD panel z ADSL, modem
FEATURES
z Supplied in tape on reel z Nickel-barrier end termination
ORDERING INFORMATION
Part number is identified by the series, size, tolerance, packing style, TC material, rated voltage and capacitance value. YYAAGGEEOO OORRDDEERRIINNGG CCOODDEE CC XXXX X X XXX X B X XXX (1) SIZE – INCH BASED (METRIC) 0603 (1608) 0805 (2012) 1206 (3216) 1210 (3225) 1808 (4520) 1812 (4532) (2) TOLERANCE J = ±5% K = ±10% (3) PACKING STYLE R = 7” paper tape K = 7” blister tape P = 13” paper tape F = 13” blister tape C = Bulk case (4) TC MATERIAL NP0 X7R (5) RATED VOLTAGE 0 = 100 V A = 200 V Y = 250 V B = 500 V (6) PROCESS B = BME N = NME (7) CAPACITANCE VALUE: First two for significant figures and 3rd for number of zero Letter “R” for decimal point
www.yageo.com Sep 08, 2005 V.0 Mid-voltage Surface-Mount Ceramic Multilayer Capacitors NP0/X7R The capacitor consists of a rectangular block of ceramic dielectric in which a number of interleaved metal electrodes are contained. This structure gives rise to a high capacitance per unit volume. The inner electrodes are connected to the two end terminations and finally covered with a layer of plated tin (NiSn). The terminations are lead-free. A cross section of the structure is shown in Fig.1. MLB457 terminations electrodes ceramic material Fig. 1 Surface mounted multilayer ceramic capacito r construction MBB211 T L2 L3 W Fig. 2 Surface mounted multilayer ceramic capacitor dimension For dimension see Table 1 DIMENSION Table 1 TYPE CC0603 CC0805 CC1206 CC1210 CC1808 CC1812 T (mm) Refer to table 2 to 7
www.yageo.com Sep 08, 2005 V.0 Mid-voltage Surface-Mount Ceramic Multilayer Capacitors NP0/X7R Table 2 For NP0 100 V sizes from 0603 to 1812 CAPACITANCE 100 V (pF) 0603 0805 1206 1210 1808 1812 120 150 0.6 ±0.10 180 220 270 330 390 470 560 680 820 1,000 1,200 1,500 0.85 ±0.10 1,800 2,700 3,300 1.25 ±0.20 3,900 0.85 ±0.10 4,700 CAPACITANCE RANGE & THICKNESS FOR NP0 100V
www.yageo.com Sep 08, 2005 V.0 Mid-voltage Surface-Mount Ceramic Multilayer Capacitors NP0/X7R (pF) 0603 0805 1206 1210 1808 1812 6,800 1.15±0.15 10,000 1.25 ±0.20 12,000 15,000 1.25 ±0.20 0.85 ±0.10 18,000 22,000 1.15±0.15 27,000 33,000 39,000 47,000 NOTE 1. Values in shaded cells indicate thickness class in mm. 2. Capacitance range < 10 pF is on request. Table 2 For NP0 100 V sizes from 0603 to 1812 (continued) Table 3 For NP0 200/250 V sizes from 0603 to 1812 CAPACITANCE 200/250 V (pF) 0603 0805 1206 1210 1808 1812 100 120 150 180 CAPACITANCE RANGE & THICKNESS FOR NP0 200/250 V
www.yageo.com Sep 08, 2005 V.0 Mid-voltage Surface-Mount Ceramic Multilayer Capacitors NP0/X7R (pF) 0603 0805 1206 1210 1808 1812 220 270 330 0.8 ±0.10 0.85 ±0.10 390 0.6 ±0.10 470 560 1.25 ±0.20 680 820 0.8 ±0.10 1,000 0.85 ±0.10 1,200 1.25 ±0.20 2,200 0.85 ±0.10 2,700 3,300 1.15±0.15 3,900 1.25 ±0.20 0.85 ±0.10 4,700 1.25 ±0.20 5,600 1.25 ±0.20 1.15±0.15 6,800 8,200 10,000 NOTE 1. Values in shaded cells indicate thickness class in mm. 2. Capacitance range < 10 pF is on request. Table 3 For NP0 200/250 V sizes from 0603 to 1812 (continued) Table 4 For NP0 500 V sizes from 0805 to 1812 CAPACITANCE 500 V (pF) 0805 1206 1210 1808 1812 CAPACITANCE RANGE & THICKNESS FOR NP0 500 V
www.yageo.com Sep 08, 2005 V.0 Mid-voltage Surface-Mount Ceramic Multilayer Capacitors NP0/X7R Table 4 For NP0 500 V sizes from 0805 to 1812 (continued) CAPACITANCE 500 V (pF) 0805 1206 1210 1808 1812 100 120 150 180 0.85 ±0.10 220 270 330 0.85 ±0.10 390 470 0.85 ±0.10 560 680 820 1.25 ±0.20 1,000 1.15±0.15 1,200 0.8 ±0.10 1,500 1,800 1.25 ±0.20 2,200 1.25 ±0.20 2,700 1.25 ±0.20 1.15±0.15 3,300 3,900 4,700 1.25 ±0.20 5,600 6,800 8,200 10,000 NOTE 1. Values in shaded cells indicate thickness class in mm. 2. Capacitance range < 10 pF is on request.
www.yageo.com Sep 08, 2005 V.0 Mid-voltage Surface-Mount Ceramic Multilayer Capacitors NP0/X7R Table 5 For X7R 100 V sizes from 0805 to 1812 CAPACITANCE 100 V (pF) 0603 0805 1206 1210 1808 1812 100 150 220 330 470 680 1,000 0.8 ±0.10 1,500 3,300 4,700 6,800 10,000 15,000 22,000 0.85 ±0.10 33,000 47,000 1.25 ±0.20 0.85 ±0.10 68,000 0.85 ±0.10 1.25 ±0.20 100,000 1.15±0.15 150,000 1.15±0.15 220,000 1.6 ±0.20 330,000 1.15±0.15 470,000 1.6 ±0.20 680,000 1,000,000 NOTE 1. Values in shaded cells indicate thickness class in mm. CAPACITANCE RANGE & THICKNESS FOR X7R 100V
www.yageo.com Sep 08, 2005 V.0 Mid-voltage Surface-Mount Ceramic Multilayer Capacitors NP0/X7R Table 6 For X7R 200/250 V sizes from 0805 to 1812 CAPACITANCE RANGE & THICKNESS FOR X7R 200/250 V CAPACITANCE 200/250 V (pF) 0805 1206 1210 1808 1812 100 150 220 330 470 680 1,000 0.85 ±0.10 1,500 2,200 3,300 0.85 ±0.10 4,700 6,800 10,000 1.25 ±0.20 15,000 0.8 ±0.10 0.85 ±0.10 22,000 1.25 ±0.20 33,000 1.15±0.15 47,000 68,000 1.25 ±0.20 100,000 1.25 ±0.20 1.15±0.15 150,000 220,000 1.6 ±0.20 330,000 2.0 ±0.20 470,000 680,000 1,000,000 NOTE 1. Values in shaded cells indicate thickness class in mm.
www.yageo.com Sep 08, 2005 V.0 Mid-voltage Surface-Mount Ceramic Multilayer Capacitors NP0/X7R Table 7 For X7R 500 V sizes from 0805 to 1812 CAPACITANCE RANGE & THICKNESS FOR X7R 500 V CAPACITANCE 500 V (pF) 0805 1206 1210 1808 1812 100 150 220 330 470 680 1,000 0.8 ±0.10 1,500 2,200 3,300 1.15±0.15 6,800 10,000 1.25 ±0.20 1.25 ±0.20 15,000 1.25 ±0.20 1.15±0.15 22,000 1.25 ±0.20 33,000 1.6 ±0.20 47,000 68,000 1.25 ±0.20 100,000 1.6 ±0.20 150,000 220,000 330,000 470,000 680,000 1,000,000 NOTE 1. Values in shaded cells indicate thickness class in mm.
www.yageo.com Sep 08, 2005 V.0 Mid-voltage Surface-Mount Ceramic Multilayer Capacitors NP0/X7R THICKNESS CLASSES AND PACKING QUANTITY 8 mm TAPE WIDTH/AMOUNT PER REEL Ø180 mm, 7” Ø330 mm, 13” 12 mm TAPE WIDTH /AMOUNT PER REEL DESCRIPTION SIZE CODE THICKNESS CLASSIFICATION (mm) Paper Blister Paper Blister Ø180 mm, 7” Blister Mid / High voltage
www.yageo.com Sep 08, 2005 V.0 Mid-voltage Surface-Mount Ceramic Multilayer Capacitors NP0/X7R
ELECTRICAL CHARACTERISTICS
NNPP00//XX77RR DDIIEELLEECCTTRRIICC CCAAPPAACCIITTOORRSS;; NNIISSNN TTEERRMMIINNAATTIIOONNSS Unless otherwise stated all electrical values apply at an ambient temperature of 20±1 °C, an atmospheric pressure of 86 to 106 kPa, and a relative humidity of 63 to 67%. DESCRIPTION VALUE Capacitance range (1) 10 pF to 470 nF Capacitance tolerance (1) : NP0 X7R ±5% ±10% Dissipation factor (D.F.) (1): NP0 X7R ≤ 0.1% ≤ 2.5% Insulation resistance after 1 minute at Ur (DC) Rins ≥ 10 GΩ or Rins × C ≥ 500 seconds whichever is less Maximum capacitance change as a function of temperature (temperature characteristic/coefficient): NP0 X7R ±30 ppm/°C ±15% Operating temperature range: NP0/X7R –55 °C to +125 °C NOTE 1. NP0: frequency = 1 MHz for C ≤ 1 nF, measuring at voltage 1 Vrms; frequency = 1 KHz for C > 1 nF, measuring at voltage 1 Vrms X7R: frequency = 1 KHz for C ≤ 10 µF, measuring at voltage 1 Vrms. Table 9
www.yageo.com Sep 08, 2005 V.0 Mid-voltage Surface-Mount Ceramic Multilayer Capacitors NP0/X7R TEST TEST METHOD PROCEDURE REQUIREMENTS Mounting IEC 60384-
4.3 The capacitors may be mounted on printed-circuit boards or
4.4 Any applicable method using × 10 magnification In accordance with
Capacitance 4.5.1 NP0: f = 1 MHz for C ≤ 1 nF, measuring at voltage 1 Vrms at 20 °C; f = 1 KHz for C > 1 nF, measuring at voltage 1 Vrms at 20 °C X7R: f = 1 KHz for C ≤ 10 µF, measuring at voltage 1 Vrms at 20 °C Within specified tolerance Dissipation factor (D.F.)
4.5.2 NP0: f = 1 MHz for C ≤ 1 nF, measuring at voltage 1 Vrms at 20
°C; f = 1 KHz for C > 1 nF, measuring at voltage 1 Vrms at 20 °C X7R: f = 1 KHz for C ≤ 10 µF, measuring at voltage 1 Vrms at 20 In accordance with specification Insulation resistance
4.5.3 At Ur (DC) for 1 minute In accordance with
Voltage proof 4.5.4.2 Test voltage (DC) applied for 1 minute Ur ≤ 100 V: 2.5 × Ur applied to NP0/X7R series 100 V < Ur ≤ 200 V: 1.5 × Ur +100 V applied to NP0/X7R series 200 V < Ur ≤ 500 V: 1.3 × Ur +100 V applied to NP0/X7R series Ur > 500 V: 1.3 × Ur applied to NP0/X7R series I: 7.5 mA No breakdown or flashover Temperature characteristic
4.6 Between minimum and maximum temperature NP0: l ∆C/Cl: 30 ppm/°C
X7R: l∆C/Cl: 15% Adhesion 4.15 A force applied for 10 seconds to the line joining the terminations and in a plane parallel to the substrate for size ≥ 0603: a force of 5 N applied for size 0402: a force of 2.5 N applied No visible damage Table 10 Test condition, procedure and requirements TESTS AND REQUIREMENTS
www.yageo.com Sep 08, 2005 V.0 Mid-voltage Surface-Mount Ceramic Multilayer Capacitors NP0/X7R TEST TEST METHOD PROCEDURE REQUIREMENTS Mounting in accordance with IEC 60384-22 paragraph 4.3 No visible damage Bond strength of plating on end face IEC 60384- 4.8 Conditions: bending 1 mm at a rate of 1 mm/s, radius jig 340 mm NP0: l∆C/Cl: ≤ 1% or 0.5 pF whichever is greater X7R: l∆C/Cl: ≤ 10% Resistance to soldering heat
4.9 Precondition: 150 +0/–10 °C for 1 hour, then keep for
24 ±1 hours at room temperature Preheating: for size ≤ 1206: 120 to 150 °C for 1 minute Preheating: for size >1206: 100 to 120 °C for 1 minute and 170 to 200 °C for 1 minute Solder bath temperature: 260 ±5 °C Dipping time: 10 ±0.5 seconds Recovery time: 24 ±2 hours. The termination shall be well tinned NP0: l∆C/Cl: ≤ 0.5% or 0.5 pF whichever is greater X7R: l∆C/Cl: ≤ 10% D.F.: within initial specified value Rins: within initial specified value Solderability 4.10 Unmounted chips completely immersed in a solder bath at 235 ±5 °C Dipping time: 2 ±0.5 seconds Depth of immersion: 10 mm The termination shall be well tinned. Preconditioning; 150 +0/–10 °C for 1 hour, then keep for 24 ±1 hours at room temperature 5 cycles with following detail: 30 minutes at lower category temperature; 30 minutes at upper category temperature Rapid change of temperature 4.11 Recovery time 24 ±2 hours. No visual damage NP0: l∆C/Cl: ≤ 1% or 1 pF whichever is greater X7R: l∆C/Cl: ≤ 15% D.F.: within initial specified value R ins: within initial specified value Damp heat, with Ur load
4.13 Initial measurements; after 150 +0/-10 °C for 1 hour,
then keep for 24 ±1 hours at room temperature Duration and conditions: 500 ±12 hours at 40 ±2 °C; 90 to 95% RH; Ur applied Final measurement: perform a heat treatment at 150 +0/–10 °C for 1 hour, final measurements shall be carried out 24 ±1 hours after recovery at room temperature without load. NP0: l∆C/Cl: ≤ 2% or 1 pF whichever is greater X7R: l∆C/Cl: ≤ 15% NP0: D.F.: 2 × initial value max. NP0: Rins ≥ 2,500 MΩ or Rins × Cr ≥ 25 seconds, whichever is less X7R: Rins ≥ 500 MΩ or Rins × Cr ≥ 25 seconds, whichever is less Table 10 Test condition, procedure and requirements (continued)
www.yageo.com Sep 08, 2005 V.0 Mid-voltage Surface-Mount Ceramic Multilayer Capacitors NP0/X7R TEST TEST METHOD PROCEDURE REQUIREMENTS Endurance IEC 60384-
4.14 Preconditioning;
Initial measurements; after 150 +0/-10 °C for 1 hour, then keep for 24 ±1 hours at room temperature Duration and conditions: 1,000 ±12 hours at upper category temperature with 1.5 × Ur voltage applied Final measurement: perform a heat treatment at 150 +0/–10 °C for 1 hour, final measurements shall be carried out 24 ±1 hours after recovery at room temperature without load. NP0: l∆C/Cl: ≤ 2% or 1 pF whicheve r is greater X7R: l∆C/Cl: ≤ 15% NP0: D.F.: 2 × initial value max. NP0: Rins ≥ 4,000 MΩ or Rins × Cr ≥ 40 seconds, whichever is less X7R: Rins ≥ 1,000 MΩ or Rins × Cr ≥ 50 seconds, whichever is less Table 10 Test condition, procedure and requirements (continued)
www.yageo.com Sep 08, 2005 V.0 Mid-voltage Surface-Mount Ceramic Multilayer Capacitors NP0/X7R
REVISION HISTORY
REVISION DATE CHANGE NOTIFICATION DESCRIPTION Version 0 Sep 08, 2005 - - New