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Technical content
- General description CBTV24DD12A is designed for 1.8 V/2.5 V/3.3 V supply voltage operation and it supports Pseudo Open Drain (POD), SSTL_12, SSTL_15 or SSTL_18 signaling and CMOS select input levels. This device is designed for operation in DDR4, DDR3 or DDR2 memory bus systems, with speeds up to 3200 MT/s. The CBTV24DD12A has a 1 : 2 switch or 2 : 1 multiplex topology and offers a 12-bit wide bus. Each 12-bit wide A-port can be switched to one of two ports B and C, for all bits simultaneously. Each port is non-directional due to the use of FET switches, allowing a multitude of applications requiring high-bandwidth switching or multiplexing. The selection of the port is by a simple CMOS input (SELect). Another CMOS input (ENable ) is available to allow all ports to be disconnected. The SEL0, SEL1 and EN input signals are designed to operate transparently as CMOS input level signals up to 3.3 V. CBTV24DD12A uses NXP’s proprietary high-speed switch architecture providing high bandwidth, very little insertion loss, return loss, and very low propagation delay, allowing use in many applications requiring switching or multiplexing of high-speed signals. It is available in a 3.0 mm 8.0 mm TFBGA48 package with 0.65 mm ball pitch, for optimal size versus board layout density considerations. It is characterized for operation from 10 C to +85 C. 2. Features and benefits
2.1 Topology
12-bit bus width 1 : 2 switch/MUX topology Bidirectional operation Simple CMOS select pins (SEL0, SEL1) Simple CMOS enable pin (EN)
2.2 Performance
3200 MT/s throughput 7.4 GHz bandwidth (for both single-ended and differential signals) Low ON insertion loss Low return loss Low crosstalk High OFF isolation CBTV24DD12A 12-bit bus switch/multiplexer for DDR4-DDR3-DDR2
applications
Rev. 2 — 15 November 2017 Product data sheet
2.3 General attributes
4.1 Ordering options
Table 1. Ordering information Table 2. Ordering options
4500 T amb = 10 C to +85 C
Product data sheet Rev. 2 — 15 November 2017 3 of 21 NXP Semiconductors CBTV24DD12A 12-bit bus switch/multiplexer for DDR4-DDR3-DDR2 applications 5. Functional diagram Fig 1. Functional diagram aaa-020030 B0A0 B1A1 B2A2 B3A3 B4A4 B5A5 B6A6 B7A7 B8A8 B9A9 B10A10 B11 A11 C10 C11 CONTROL LOGIC EN SEL2 SEL1
6.1 Pinning
6.2 Pin description
Table 3. Pin description CMOS input CMOS input signal. port B[0,1,4,5,8,9] are mutually connected. port C[0,1,4,5,8,9] are mutually connected. port B[2,3,6,7,10,11] are mutually connected. port C[2,3,6,7,10,11] are mutually connected.
EN H2 CMOS input CMOS input signal. When HIGH, all ports are mutually isolated. VDD C2, G2, K2 supply Must be connected to supply voltage power plane. grounding and thermal relief. Table 3. Pin description …continued
Refer to Figure 1 “Functional diagram”.
7.1 Function selection
and EN, as described in Table 4. Table 4. Function selection
State Technology Association, Arlington, VA, USA. testing, Charged-Device Model - Component level; JEDEC Solid State Technology Association, Arlington, VA, USA.
- Recommended operating conditions
[1] Typical values are at V DD =2 . 5V ; Tamb =2 5 C, and maximum loading. Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Table 6. Operating conditions Table 7. Static characteristics Typical VDD; Tamb = 10 C to +85 C; unless otherwise specified.
[1] Smooth transition without glitch under DDR termination schemes. [2] R ON(flat) is the difference of the RON in a given channel across all VI voltage ranges. [3] RON is the difference of RON from one port to any other ports when the same VI voltage is applied to all channels. Table 8. Dynamic characteristics
Product data sheet Rev. 2 — 15 November 2017 9 of 21 NXP Semiconductors CBTV24DD12A 12-bit bus switch/multiplexer for DDR4-DDR3-DDR2 applications 12. Package outline Fig 4. Package outline TFBGA48 (SOT1365-1) (1 of 3)
Product data sheet Rev. 2 — 15 November 2017 10 of 21 NXP Semiconductors CBTV24DD12A 12-bit bus switch/multiplexer for DDR4-DDR3-DDR2 applications Fig 5. Package outline TFBGA48 (SOT1365-1) (2 of 3)
Product data sheet Rev. 2 — 15 November 2017 11 of 21 NXP Semiconductors CBTV24DD12A 12-bit bus switch/multiplexer for DDR4-DDR3-DDR2 applications Fig 6. Package outline TFBGA48 (SOT1365-1) (3 of 3)
Product data sheet Rev. 2 — 15 November 2017 12 of 21 NXP Semiconductors CBTV24DD12A 12-bit bus switch/multiplexer for DDR4-DDR3-DDR2 applications 13. Packing information Fig 7. Carrier tape Notes: 1. Dimentions in mm. 2. 10 sprocket hole pitches cumulative tolerance ±0.20 mm. 3. Camber not to exceed 1 mm in 250 mm. 4. Pocket position relative to sprocket hole measured as true position of pocket, not pocket hole. 0.30 ± 0.05 (T) 8.30 ± 0.10 (B0) 4.00 ± 0.10 (P0) 2.00 ± 0.10 (P2) 8.00 ± 0.10 (P1) Ø 1.50 + 0.10 − 0.00 (D0) Ø 1.60 ± 0.10 (D1) 16.00 ± 0.30 (W) 7.50 ± 0.10 (F) aaa-011237 1.75 ± 0.10 (E1) 3.30 ± 0.10 (A0) 1.20 ± 0.05 (K0) Pin 1 (ball A1) is in Quadrant 1. Fig 8. Product orientation in carrier tape aaa-006540 pin 1
Product data sheet Rev. 2 — 15 November 2017 13 of 21 NXP Semiconductors CBTV24DD12A 12-bit bus switch/multiplexer for DDR4-DDR3-DDR2 applications Fig 9. 13-inch reel Ø 330 ± 0.5 Ø 318 2.0 ± 0.5 10.6 Ø 13.0 + 0.5 − 0.2 Ø 97.0 ± 1.0 17.0 + 1.5 − 0 2.2 aaa-012172
Product data sheet Rev. 2 — 15 November 2017 14 of 21 NXP Semiconductors CBTV24DD12A 12-bit bus switch/multiplexer for DDR4-DDR3-DDR2 applications 14. Soldering of SMD packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “Surface mount reflow soldering description”.
14.1 Introduction to soldering
Soldering is one of the most common methods through which packages are attached to Printed Circuit Boards (PCBs), to form electrical circuits. The soldered joint provides both the mechanical and the electrical connection. There is no single soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and Surface Mount Devices (SMDs) are mixed on one printed wiring board; however, it is not suitable for fine pitch SMDs. Reflow soldering is ideal for the small pitches and high densities that come with increased miniaturization.
14.2 Wave and reflow soldering
Wave soldering is a joining technology in which the joints are made by solder coming from a standing wave of liquid solder. The wave soldering process is suitable for the following:
- Through-hole components
- Leaded or leadless SMDs, which are glued to the surface of the printed circuit board Not all SMDs can be wave soldered. Packages with solder balls, and some leadless packages which have solder lands underneath the body, cannot be wave soldered. Also, leaded SMDs with leads having a pitch smaller than ~0.6 mm cannot be wave soldered, due to an increased probability of bridging. The reflow soldering process involves applying solder paste to a board, followed by component placement and exposure to a temperature profile. Leaded packages, packages with solder balls, and leadless packages are all reflow solderable. Key characteristics in both wave and reflow soldering are:
- Board specifications, including the board finish, solder masks and vias
- Package footprints, including solder thieves and orientation
- The moisture sensitivity level of the packages
- Package placement
- Inspection and repair
- Lead-free soldering versus SnPb soldering
14.3 Wave soldering
Key characteristics in wave soldering are:
- Process issues, such as application of adhesive and flux, clinching of leads, board transport, the solder wave parameters, and the time during which components are exposed to the wave
- Solder bath specifications, including temperature and impurities
14.4 Reflow soldering
- Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to higher minimum peak temperatures (see Figure 10) than a SnPb process, thus reducing the process window
- Solder paste printing issues including smearing, release, and adjusting the process window for a mix of large and small components on one board
- Reflow temperature profile; this profile includes preheat, reflow (in which the board is heated to the peak temperature) and cooling down. It is imperative that the peak temperature is high enough for the solder to make reliable solder joints (a solder paste characteristic). In addition, the peak temperature must be low enough that the packages and/or boards are not damaged. The peak temperature of the package depends on package thickness and volume and is classified in accordance with Table 9 and 10 Moisture sensitivity precautions, as indicated on the packing, must be respected at all times. Studies have shown that small packages reach higher temperatures during reflow soldering, see Figure 10.
Table 9. SnPb eutectic process (from J-STD-020D) Table 10. Lead-free process (from J-STD-020D)
Product data sheet Rev. 2 — 15 November 2017 16 of 21 NXP Semiconductors CBTV24DD12A 12-bit bus switch/multiplexer for DDR4-DDR3-DDR2 applications For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description”. MSL: Moisture Sensitivity Level Fig 10. Temperature profiles for large and small components 001aac844 temperature time minimum peak temperature = minimum soldering temperature maximum peak temperature = MSL limit, damage level peak temperature
Product data sheet Rev. 2 — 15 November 2017 17 of 21 NXP Semiconductors CBTV24DD12A 12-bit bus switch/multiplexer for DDR4-DDR3-DDR2 applications 15. Soldering: PCB footprints Fig 11. PCB footprint for SOT1365-1 (TFBGA48); reflow soldering SOT1365-1Footprint information for reflow soldering of TFBGA48 package Dimensions in mm PS L S P 0.65 0.35 SR 0.45 Hx 3.3 Hy 8.3 sot1365-1_fr solder land plus solder paste solder resist opening (SR) solder land (SL) solder paste deposit (SP) occupied area
0.35 Issue date 14-03-13
SL = SP SR detail X P P recommend stencil thickness: 0.1 mm Hx Hy see detail X
Table 11. Abbreviations Table 12. Revision history
- Updated Figure 4 “Package outline TFBGA48 (SOT1365-1) (1 of 3)” CBTV24DD12A v.1 20170628 Product data sheet - -
Product data sheet Rev. 2 — 15 November 2017 19 of 21 NXP Semiconductors CBTV24DD12A 12-bit bus switch/multiplexer for DDR4-DDR3-DDR2 applications 18. Legal information
18.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.
18.2 Definitions
Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet.
18.3 Disclaimers
Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains da ta from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This docu ment contains the product specification.
Product data sheet Rev. 2 — 15 November 2017 20 of 21 NXP Semiconductors CBTV24DD12A 12-bit bus switch/multiplexer for DDR4-DDR3-DDR2 applications Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions.
18.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 19. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com
NXP Semiconductors CBTV24DD12A 12-bit bus switch/multiplexer for DDR4-DDR3-DDR2 applications © NXP B.V. 2019. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 15 November 2017 Document identifier: CBTV24DD12A Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. 20. Contents