CBTD3306_11 NXP | Alldatasheet

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disabled when the associated output enable (nOE) input is HIGH. The CBTD3306 is characterized for operation from −40 °C to +85 °C. Table 1. Ordering information Table 2. Marking codes

Product Specification Rev. 5 — 28 April 2011 2 of 17 NXP Semiconductors CBTD3306 Dual bus switch with level shifting 5. Functional diagram 6. Pinning information

6.1 Pinning

Fig 1. Logic diagram 1OE 1A 1B 002aab985 2OE Fig 2. Pin configuration for SO8 (SOT96-1) Fig 3. Pin configuration for TSSOP8 (SOT530-1) CBTD3306 1OE VCC 1A 2OE 1B 2B GND 2A 001aak832 CBTD3306 1OE V CC 1A 2OE 1B 2B GND 2A 001aak833 Fig 4. Pin configuration SOT833-1 (XSON8) Fig 5. Pin configuration SOT902-1 (XQFN8U) CBTD3306 2OE VCC 1OE GND 001aal404 Transparent top view 001aal405 2B1A 2OE VCC 1OE GND Transparent top view terminal 1 index area CBTD3306

6.2 Pin description

[1] H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state. conditions for extended periods may affect device reliability. [2] The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.

  1. Recommended operating conditions

Table 3. Pin description Table 4. Function selection [1] Table 5. Limiting values Tamb = −40 °C to +85 °C, unless otherwise specified. Table 6. Operating conditions All unused control inputs of the device must be held at VCC or GND to ensure proper device operation.

[1] All typical values are at V CC =5V , Tamb =2 5 °C. [2] This is the increase in supply current for each input th at is at the specified TTL voltage level rather than VCC or GND. determined by the lowest voltage of the two (nA or nB) terminals. Table 7. Static characteristics Voltages are referenced to GND (ground = 0 V).

Product Specification Rev. 5 — 28 April 2011 5 of 17 NXP Semiconductors CBTD3306 Dual bus switch with level shifting

10.1 Typical pass voltage graphs

(1) I SW = 100 μA (2) I SW = 6 mA (3) I SW =12 mA (4) I SW = 24 mA (1) I SW = 100 μA (2) I SW = 6 mA (3) I SW =12 mA (4) I SW = 24 mA Fig 6. Pass voltage versus supply voltage; Tamb =8 5 °C (typical) Fig 7. Pass voltage versus supply voltage; Tamb =7 0 °C (typical) 001aak834 VCC (V) 4.4 5.6 5.24.8 2.8 2.4 3.2 3.6 Vpass (V) 2.0 (4) (3) (1) (2) 001aak835 VCC (V) 4.4 5.6 5.24.8 2.8 2.4 3.2 3.6 Vpass (V) 2.0 (4) (1) (2) (3) (1) I SW = 100 μA (2) I SW = 6 mA (3) I SW =12 mA (4) I SW = 24 mA (1) I SW = 100 μA (2) I SW = 6 mA (3) I SW =12 mA (4) I SW = 24 mA Fig 8. Pass voltage versus supply voltage; Tamb =2 5 °C (typical) Fig 9. Pass voltage versus supply voltage; Tamb =0 °C (typical) 001aak836 VCC (V) 4.4 5.6 5.24.8 2.8 2.4 3.2 3.6 Vpass (V) 2.0 (4) (1) (2) (3) 001aak837 VCC (V) 4.4 5.6 5.24.8 2.8 2.4 3.2 3.6 Vpass (V) 2.0 (4) (1) (3) (2)

Product Specification Rev. 5 — 28 April 2011 6 of 17 NXP Semiconductors CBTD3306 Dual bus switch with level shifting (1) I SW = 100 μA (2) I SW = 6 mA (3) I SW =12 mA (4) I SW = 24 mA Fig 10. Pass voltage versus supply voltage; T amb = −40 °C (typical) 001aak838 VCC (V) 4.4 5.6 5.24.8 2.8 2.4 3.2 3.6 Vpass (V) 2.0 (1) (3) (2) (4)

when driven by an ideal voltage source (zero output impedance). [2] t pd is the same as tPLH and tPHL. ten is the same as tPZL and tPZH. tdis is the same as tPLZ and tPHZ. Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 13. Measurement points are given in Table 9. Logic levels: VOL and VOH are typical output voltage levels that occur with the output load.

Measurement points are given in Table 9. Logic levels: VOL and VOH are typical output voltage levels that occur with the output load. Table 9. Measurement points

Test data is given in Table 10. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz; Zo =5 0 Ω. The outputs are measured one at a time with one transition per measurement. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to output impedance Zo of the pulse generator. VEXT = External voltage for measuring switching times. Table 10. Test data

Product Specification Rev. 5 — 28 April 2011 10 of 17 NXP Semiconductors CBTD3306 Dual bus switch with level shifting 14. Package outline Fig 14. Package outline SOT96-1 (SO8) UNIT A max. A1 A2 A3 bp cD (1) E(2) (1)eH E LL p QZ ywv θ REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA mm inches 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 5.0 4.8 4.0 3.8 1.27 6.2 5.8 1.05 0.7 0.6 0.7 0.3 8 o o 0.25 0.10.25 DIMENSIONS (inch dimensions are derived from the original mm dimensions) Notes 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. 1.0 0.4 SOT96-1 X w M θ AA1 bp D HE Lp Q detail X E Z e c L v M A (A )3 A pin 1 index y 076E03 MS-012 0.069 0.010 0.004 0.057 0.049 0.01 0.019 0.014 0.0100 0.0075 0.20 0.19 0.16 0.15 0.05 0.244 0.228 0.028 0.024 0.028 0.016 0 2.5 5 mm scale SO8: plastic small outline package; 8 leads; body width 3.9 mm SOT96-1 99-12-27 03-02-18

Product Specification Rev. 5 — 28 April 2011 11 of 17 NXP Semiconductors CBTD3306 Dual bus switch with level shifting Fig 15. Package outline SOT530-1 (TSSOP8) UNIT A1 A max. A2 A3 bp LHE Lp wyvce D(1) E(2) Z(1) θ REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA mm 0.15 0.05 0.95 0.85 0.30 0.19 0.20 0.13 3.1 2.9 4.5 4.3 0.65 6.5 6.3 0.70 0.35 0°0.1 0.10.10.94 DIMENSIONS (mm are the original dimensions) Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. 0.7 0.5 SOT530-1 MO-153 00-02-24 03-02-18 w Mbp D Z e 0.25 8 5 θ AA2 Lp (A3) detail X L HE E c v M A X A y 2.5 5 mm0 scale TSSOP8: plastic thin shrink small outline package; 8 leads; body width 4.4 mm SOT530-1 1.1 pin 1 index

Product Specification Rev. 5 — 28 April 2011 12 of 17 NXP Semiconductors CBTD3306 Dual bus switch with level shifting Fig 16. Package outline SOT833-1 (XSON8) terminal 1 index area REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA SOT833-1 07-11-14 07-12-07 DIMENSIONS (mm are the original dimensions) XSON8: plastic extremely thin small outline package; no leads; 8 terminals; body 1 x 1.95 x 0.5 mm D E e b LL1 e1 e1 0 1 2 mm scale Notes 1. Including plating thickness. 2. Can be visible in some manufacturing processes. UNIT mm 0.25 0.17 2.0 1.9 0.35 0.27 A max b E 1.05 0.95 D ee 1 L 0.40 0.32 0.50.6 A(1) max 0.5 0.04 (2) (2) A

Product Specification Rev. 5 — 28 April 2011 13 of 17 NXP Semiconductors CBTD3306 Dual bus switch with level shifting Fig 17. Package outline SOT902-1 (XQFN8U) REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA SOT902-1 05-11-25 07-11-14 UNIT A max mm 0.5 0.25 0.15 0.05 0.00 1.65 1.55 0.35 0.25 0.15 0.05 DIMENSIONS (mm are the original dimensions) XQFN8U: plastic extremely thin quad flat package; no leads; 8 terminals; UTLP based; body 1.6 x 1.6 x 0.5 mm b DL e1 1.65 1.55 eE L1 v 0.10.55 0.5 w 0.05 y 0.05 0.05 0 1 2 mm scale X C yCy1 terminal 1 index area terminal 1 index area B AD E detail X A b ee AC B∅ v M C∅ w M4 L metal area not for soldering

Table 11. Abbreviations Table 12. Revision history

  • Table 2: Marking code table corrected (errata). CBTD3306 v.4 20100325 Product data sheet - CBTD3306 v.3 CBTD3306 v.3 20100223 Product data sheet - CBTD3306 v.2 CBTD3306 v.2 20091015 Product data sheet - CBTD3306 v.1 CBTD3306 v.1 20011108 Product data - -

Product Specification Rev. 5 — 28 April 2011 15 of 17 NXP Semiconductors CBTD3306 Dual bus switch with level shifting 17. Legal information

17.1 Data sheet status

[1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.

17.2 Definitions

Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet.

17.3 Disclaimers

Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use in automotive applications — This NXP Semiconductors product has been qualified for use in automotive applications. The product is not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms , unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This docu ment contains the product specification.

Product Specification Rev. 5 — 28 April 2011 16 of 17 NXP Semiconductors CBTD3306 Dual bus switch with level shifting Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities.

17.4 Trademarks

Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 18. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com

NXP Semiconductors CBTD3306 Dual bus switch with level shifting © NXP B.V. 2011. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 28 April 2011 Document identifier: CBTD3306 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. 19. Contents