CAV24C128_18 ONSEMI | Alldatasheet

Document overview

  • Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 16

Technical content

Features

  • Automotive Temperature Grade 1 (−40°C to +125°C)
  • Supports Standard, Fast and Fast−Plus I2C Protocol
  • 2.5 V to 5.5 V Supply V oltage Range
  • 64−Byte Page Write Buffer
  • Hardware Write Protection for Entire Memory
  • Schmitt Triggers and Noise Suppression Filters on I2C Bus Inputs (SCL and SDA)
  • Low Power CMOS Technology
  • 1,000,000 Program/Erase Cycles
  • 100 Year Data Retention
  • 8−lead SOIC and TSSOP Packages
  • This Device is Pb−Free, Halogen Free/BFR Free and RoHS Compliant*

Figure 1. Functional Symbol Reference Manual, SOLDERRM/D. dimensions section on page 11 of this data sheet.

ORDERING INFORMATION

SOIC−8 W SUFFIX CASE 751BD SOIC (W), TSSOP (Y) TSSOP−8 Y SUFFIX CASE 948AL Device Address InputsA0, A1, A2 Serial Data Input/OutputSDA Serial Clock InputSCL Write Protect InputWP Power SupplyVCC GroundVSS FunctionPin Name PIN FUNCTION For the location of Pin 1, please consult the corresponding package drawing. SDA WP VCC VSS A0 1 SCL

Table 1. ABSOLUTE MAXIMUM RATINGS should not be assumed, damage may occur and reliability may be affected.

  1. The DC input voltage on any pin should not be lower than −0.5 V or higher than V

undershoot to no less than −1.5 V or overshoot to no more than VCC + 1.5 V, for periods of less than 20 ns. Table 2. RELIABILITY CHARACTERISTICS (Note 2)

  1. These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AEC−Q100
  2. This device uses ECC (Error Correction Code) logic with 6 ECC bits to correct one bit error in 4 data bytes. Therefore, when a single byte

from the maximum number of write cycles. Table 4. PIN IMPEDANCE CHARACTERISTICS (VCC = 2.5 V to 5.5 V, TA = −40°C to +125°C, unless otherwise specified.)

  1. These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AEC−Q100
  2. When not driven, the WP, A0, A1, A2 pins are pulled down to GND internally. For improved noise immunity, the internal pull−down is relatively

as the input level exceeds the trip point of the CMOS input buffer (~ 0.5 x VCC), the strong pull−down reverts to a weak current source.

  1. Test conditions according to “A.C. Test Conditions” table.
  2. Tested initially and after a design or process change that affects this parameter.

PU is the delay between the time VCC is stable and the device is ready to accept commands. Table 6. A.C. TEST CONDITIONS

www.onsemi.com Power−On Reset (POR) The CA V24C128 incorporates Power−On Reset (POR) circuitry which protects the device against powering up in the wrong state. The CA V24C128 will power up into Standby mode after VCC exceeds the POR trigger level and will power down into Reset mode when VCC drops below the POR trigger level. This bi−directional POR feature protects the device against ‘brown−out’ failure following a temporary loss of power. Pin Description SCL: The Serial Clock input pin accepts the Serial Clock generated by the Master. SDA: The Serial Data I/O pin receives input data and transmits data stored in EEPROM. In transmit mode, this pin is open drain. Data is acquired on the positive edge, and is delivered on the negative edge of SCL. A 0, A1 and A2: The Address pins accept the device address. When not driven, these pins are pulled LOW internally. WP: The Write Protect input pin inhibits all write operations, when pulled HIGH. When not driven, this pin is pulled LOW internally. Functional Description The CA V24C128 supports the Inter −Integrated Circuit (I2C) Bus data transmission protocol, which defines a device that sends data to the bus as a transmitter and a device receiving data as a receiver. Data flow is controlled by a Master device, which generates the serial clock and all START and STOP conditions. The CA V24C128 acts as a Slave device. Master and Slave alternate as either transmitter or receiver. Up to 8 devices may be connected to the bus as determined by the device address inputs A 0, A1, and A2. I2C Bus Protocol The I2C bus consists of two ‘wires’, SCL and SDA. The two wires are connected to the V CC supply via pull −up resistors. Master and Slave devices connect to the 2 −wire bus via their respective SCL and SDA pins. The transmitting device pulls down the SDA line to ‘transmit’ a ‘0’ and releases it to ‘transmit’ a ‘1’. Data transfer may be initiated only when the bus is not busy (see A.C. Characteristics). During data transfer, the SDA line must remain stable while the SCL line is HIGH. An SDA transition while SCL is HIGH will be interpreted as a START or STOP condition (Figure 2). The START condition precedes all commands. It consists of a HIGH to LOW transition on SDA while SCL is HIGH. The START acts as a ‘wake −up’ call to all receivers. Absent a START, a Slave will not respond to commands. The STOP condition completes all commands. It consists of a LOW to HIGH transition on SDA while SCL is HIGH. Device Addressing The Master initiates data transfer by creating a START condition on the bus. The Master then broadcasts an 8 −bit serial Slave address. The first 4 bits of the Slave address are set to 1010, for normal Read/Write operations (Figure 3). The next 3 bits, A 2, A1 and A0, select one of 8 possible Slave devices and must match the state of the external address pins. The last bit, R/W, specifies whether a Read (1) or Write (0) operation is to be performed. Acknowledge After processing the Slave address, the Slave responds with an acknowledge (ACK) by pulling down the SDA line during the 9 th clock cycle (Figure 4). The Slave will also acknowledge all address bytes and every data byte presented in Write mode. In Read mode the Slave shifts out a data byte, and then releases the SDA line during the 9 th clock cycle. As long as the Master acknowledges the data, the Slave will continue transmitting. The Master terminates the session by not acknowledging the last data byte (NoACK) and by issuing a STOP condition. Bus timing is illustrated in Figure 5.

acknowledge the Slave address, address bytes and data byte. or Write requests will be ignored (Figure 7). Page Write sequence will be written to memory. CA V24C128 will not acknowledge the Slave address. byte and the Write request will be rejected. The CA V24C128 is shipped erased, i.e., all bytes are FFh. Figure 6. Byte Write Sequence

Figure 9. WP Timing CA V24C128 returns to Standby mode. responds with a NoACK, followed by a STOP (Figure 12). wrap−around at end of memory (rather than end of page).

www.onsemi.com PACKAGE DIMENSIONS SOIC 8, 150 mils CASE 751BD−01 ISSUE O E1 E A h θ L c e b D PIN # 1 IDENTIFICATION TOP VIEW SIDE VIEW END VIEW Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC MS-012. SYMBOL MIN NOM MAX θ A b c D E e h 0º 8º 0.10 0.33 0.19 0.25 4.80 5.80 3.80

1.27 BSC

1.75 0.25 0.51 0.25 0.50 5.00 6.20 4.00 L 0.40 1.27 1.35

www.onsemi.com PACKAGE DIMENSIONS TSSOP8, 4.4x3 CASE 948AL−01 ISSUE O E1 E e b D cA TOP VIEW SIDE VIEW END VIEW /C01131 L Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC MO-153. SYMBOL θ MIN NOM MAX A b c D E e 0º 8º L 0.05 0.80 0.19 0.09 0.50 2.90 6.30 4.30

0.65 BSC

1.00 REF

1.20 0.15 1.05 0.30 0.20 0.75 3.10 6.50 4.50 0.90 0.60 3.00 6.40 4.40

www.onsemi.com ORDERING INFORMATION (Notes 10 thru 13) Device Order Number Specific Device Marking Package Type Temperature Range Lead Finish Shipping† CAV24C128WE−GT3 24128C SOIC−8, JEDEC E = Extended (−40°C to +125°C) NiPdAu Tape & Reel, 3,000 Units / Reel CAV24C128YE−GT3 C28C TSSOP−8 E = Extended (−40°C to +125°C) NiPdAu Tape & Reel, 3,000 Units / Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. 10.All packages are RoHS−compliant (Lead−free, Halogen−free). 11.The standard lead finish is NiPdAu. 12.For additional package and temperature options, please contact your nearest ON Semiconductor Sales office. 13.For detailed information and a breakdown of device nomenclature and numbering systems, please see the ON Semiconductor Devic e Nomenclature document, TND310/D, available at www.onsemi.com ON Semiconductor is licensed by the Philips Corporation to carry the I2C bus protocol.

SOIC 8, 150 mils CASE 751BD−01 ISSUE O DATE 19 DEC 2008 E1 E A h θ L c e b D PIN # 1 IDENTIFICATION TOP VIEW SIDE VIEW END VIEW Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC MS-012. SYMBOL MIN NOM MAX θ A b c D E e h 0º 8º 0.10 0.33 0.19 0.25 4.80 5.80 3.80 1.75 0.25 0.51 0.25 0.50 5.00 6.20 4.00 L 0.40 1.27 1.35 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS http://onsemi.com © Semiconductor Components Industries, LLC, 2002 October, 2002 − Rev. 0 Case Outline Number: XXX DOCUMENT NUMBER: STATUS: REFERENCE: DESCRIPTION: 98AON34272E ON SEMICONDUCTOR STANDARD SOIC 8, 150 MILS Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 2

DOCUMENT NUMBER: 98AON34272E PAGE 2 OF 2 ISSUE REVISION DATE O RELEASED FOR PRODUCTION FROM POD #SOIC8−002−01 TO ON SEMICONDUCTOR. REQ. BY B. BERGMAN.

19 DEC 2008

© Semiconductor Components Industries, LLC, 2008 December, 2008 − Rev. 01O Case Outline Number: 751BD ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

TSSOP8, 4.4x3 CASE 948AL−01 ISSUE O DATE 19 DEC 2008 E1 E e b D cA TOP VIEW SIDE VIEW END VIEW /C01131 L Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC MO-153. SYMBOL θ MIN NOM MAX A b c D E e 0º 8º L 0.05 0.80 0.19 0.09 0.50 2.90 6.30 4.30 1.20 0.15 1.05 0.30 0.20 0.75 3.10 6.50 4.50 0.90 0.60 3.00 6.40 4.40 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS http://onsemi.com © Semiconductor Components Industries, LLC, 2002 October, 2002 − Rev. 0 Case Outline Number: XXX DOCUMENT NUMBER: STATUS: REFERENCE: DESCRIPTION: 98AON34428E ON SEMICONDUCTOR STANDARD TSSOP8, 4.4X3 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 2

DOCUMENT NUMBER: 98AON34428E PAGE 2 OF 2 ISSUE REVISION DATE O RELEASED FOR PRODUCTION FROM POD #TSSOP8−004−01 TO ON SEMICONDUCTOR. REQ. BY B. BERGMAN. © Semiconductor Components Industries, LLC, 2008 December, 2008 − Rev. 01O Case Outline Number: 948AL ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries i n the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property . A listing of ON Semiconductor’s product/patent ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, reg ulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor 19521 E. 32nd Pkwy, Aurora, Colorado 80011 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative