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Technical content

Features

  • Automotive Temperature Grade 1 (−40°C to +125°C)
  • Supports Standard and Fast I2C Protocol
  • 2.5 V to 5.5 V Supply V oltage Range
  • 16−Byte Page Write Buffer
  • Hardware Write Protection for Entire Memory
  • CA V Prefix for Automotive and Other Applications Requiring Site and Change Control
  • Schmitt Triggers and Noise Suppression Filters on I2C Bus Inputs (SCL and SDA)
  • Low power CMOS Technology
  • 1,000,000 Program/Erase Cycles
  • 100 Year Data Retention
  • These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant SCL WP CAV24Cxx

Figure 1. Functional Symbol dimensions section on page 11 of this data sheet.

ORDERING INFORMATION

SOIC−8 W SUFFIX CASE 751BD TSSOP−8 Y SUFFIX CASE 948AL PIN CONFIGURATIONS (Top View) SDA SCL WP VCC VSS SOIC (W), TSSOP (Y) PIN FUNCTION Pin Name A0, A1, A2 Function Device Address Input SDA Serial Data Input/Output SCL Serial Clock Input WP Write Protect Input VCC Power Supply VSS Ground NC No Connect CAV24C__ 16 / 08 / 04 / 02 NC ///NC NC NC NC NC A1 A1 A2 A2A2 /// ///

Table 1. ABSOLUTE MAXIMUM RATINGS

  1. During input transitions, voltage undershoot on any pin should not exceed −1 V for more than 20 ns. Voltage overshoot on pins A

maximum ratings, irrespective of VCC. Table 2. RELIABILITY CHARACTERISTICS (Note 2)

  1. These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AEC−Q100

Table 3. D.C. OPERATING CHARACTERISTICS

Table 4. PIN IMPEDANCE CHARACTERISTICS (VCC = 2.5 V to 5.5 V, TA = −40°C to +125°C, unless otherwise specified.)

  1. These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AEC−Q100
  2. When not driven, the WP, A0, A1 and A2 pins are pulled down to GND internally. For improved noise immunity, the internal pull−down is relatively

as the input level exceeds the trip point of the CMOS input buffer (~ 0.5 x VCC), the strong pull−down reverts to a weak current source.

  1. Test conditions according to “AC Test Conditions” table.
  2. Tested initially and after a design or process change that affects this parameter.

PU is the delay between the time VCC is stable and the device is ready to accept commands. Table 6. A.C. TEST CONDITIONS

Figure 2. Start/Stop Timing

1010 A2 a9 a8 R/W CAV24C08

1010 A2 A1 a8 R/W CAV24C04

1010 A2 A1 A0 R/W CAV24C02

Figure 3. Slave Address Bits Figure 4. Acknowledge Timing Figure 5. Bus Timing

respond to any request from the Master device (Figure 7). operation, the CA V24Cxx initiates the internal write cycle. next read or write operation. and the Write request will be rejected. The CA V24Cxx is shipped erased, i.e., all bytes are FFh. Figure 6. Byte Write Sequence

CAV24C02, CAV24C04, CAV24C08, CAV24C16 http://onsemi.com PACKAGE DIMENSIONS SOIC 8, 150 mils CASE 751BD−01 ISSUE O E1 E A h θ L c e b D PIN # 1 IDENTIFICATION TOP VIEW SIDE VIEW END VIEW Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC MS-012. SYMBOL MIN NOM MAX θ A b c D E e h 0º 8º 0.10 0.33 0.19 0.25 4.80 5.80 3.80

1.27 BSC

1.75 0.25 0.51 0.25 0.50 5.00 6.20 4.00 L 0.40 1.27 1.35

CAV24C02, CAV24C04, CAV24C08, CAV24C16 http://onsemi.com PACKAGE DIMENSIONS TSSOP8, 4.4x3 CASE 948AL−01 ISSUE O E1 E e b D cA TOP VIEW SIDE VIEW END VIEW /C01131 L Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC MO-153. SYMBOL θ MIN NOM MAX A b c D E e 0º 8º L 0.05 0.80 0.19 0.09 0.50 2.90 6.30 4.30

0.65 BSC

1.00 REF

1.20 0.15 1.05 0.30 0.20 0.75 3.10 6.50 4.50 0.90 0.60 3.00 6.40 4.40

CAV24C02, CAV24C04, CAV24C08, CAV24C16 http://onsemi.com Example of Ordering Information CAV24C02/04/08/16 (Note 11) Prefix Device # Suffix Company ID CAV 24C16 W Product Number E − G Package E = Automotive (−40°C to +125°C) Temperature Range W: SOIC, JEDEC Y: TSSOP Lead Finish G: NiPdAu T: Tape & Reel 3: 3000 Units / Reel 24C02 24C04 24C08 24C16 Tape & Reel (Note 13) 9. All packages are RoHS −compliant (Lead−free, Halogen−free). 10.The standard lead finish is NiPdAu. 11. The device used in the above example is a CAV24C16WE−GT3 (SOIC, Automotive Temperature, NiPdAu, Tape & Reel, 3,000/Reel). 12.For availability of other package options, please contact your nearest ON Semiconductor Sales Office. 13.For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Ree l Packaging Specifications Brochure, BRD8011/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5773−3850 CAV24C02/D ON Semiconductor is licensed by Philips Corporation to carry the I2C Bus Protocol. LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative