CAT5111 ONSEMI | Alldatasheet
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Technical content
Characteristics subject to change without notice 100-Tap Digitally Programmable Potentiometer (DPP™) with Buffered Wiper
FEATURES
100-position linear taper potentiometer Non-volatile EEPROM wiper storage; buffered wiper Low power CMOS technology Single supply operation: 2.5 V - 6.0 V Increment up/down serial interface Resistance values: 10 kΩ, 50 kΩ and 100 kΩ Available in PDIP, SOIC, TSSOP and MSOP packages
APPLICATIONS
Automated product calibration Remote control adjustments Offset, gain and zero control Tamper-proof calibrations Contrast, brightness and volume controls Motor controls and feedback systems Programmable analog functions For Ordering Information details, see page 12.
DESCRIPTION
The CAT5111 is a single digitally programmable potentiometer (DPP™) designed as a electronic replacement for mechanical potentiometers. Ideal for automated adjustments on high volume production lines, they are also well suited for applications where equipment requiring periodic adjustment is either difficult to access or located in a hazardous or remote environment. The CAT5111 contains a 100-tap series resistor array connected between two terminals R H and R L. An up/down counter and decoder that are controlled by three input pins, determines which tap is connected to the wiper, RWB. The CAT5111 wiper is buffered by an op amp that operates rail to rail. The wiper setting, stored in non-volatile memory, is not lost when the device is powered down and is automatically recalled when power is returned. The wiper can be adjusted to test new system values without effecting the stored setting. Wiper-control of the CAT5111 is accomplished with three input control pins, CS¯¯, U/D¯, and INC¯¯¯. The INC¯¯¯ input increments the wiper in the direction which is determined by the logic state of the U/D¯ input. The CS¯¯ input is used to select the device and also store the wiper position prior to power down. The digitally programmable potentiometer can be used as a buffered voltage divider. For applications where the potentiometer is used as a 2-terminal variable resistor, please refer to the CAT5113. The buffered wiper of the CAT5111 is not compatible with that application. FUNCTIONAL DIAGRAM Control and Memory Power On Recall VCC GND U/D INC CS RH RH RWB RWB RL RL Electronic Potentiometer Implementation
Characteristics subject to change without notice PIN CONFIGURATION PDIP 8-Lead (L) SOIC 8 Lead (V) MSOP 8 Lead (Z) INC¯¯¯ 1 8 VCC U/D¯ 2 7 CS¯¯ RH 3 6 RL GND 4 5 RWB CAT TSSOP 8 Lead (Y) CS¯¯ 1 8 RL VCC 2 7 RWB INC¯¯¯ 3 6 GND U/D¯ 4 5 RH CAT PIN DESCRIPTIONS Name Function INC¯¯¯ Increment Control U/D¯ Up/Down Control RH Potentiometer High Terminal GND Ground RWB Buffered Wiper Terminal RL Potentiometer Low Terminal CS¯¯ Chip Select VCC Supply Voltage PIN DESCRIPTION INC¯¯¯: Increment Control Input The INC¯¯¯ input (on the falling edge) moves the wiper in the up or down direction determined by the condition of the U/D¯ input. U/D¯: Up/Down Control Input The U/D¯ input controls the direction of the wiper movement. When in a high state and CS¯¯ is low, any high-to-low transition on INC¯¯¯ will cause the wiper to move one increment toward the R H terminal. When in a low state and CS¯¯ is low, any high-to-low transition on INC¯¯¯ will cause the wiper to move one increment towards the RL terminal. RH: High End Potentiometer Terminal RH is the high end terminal of the potentiometer. It is not required that this terminal be connected to a potential greater than the R L terminal. Voltage applied to the R H terminal cannot exceed the supply voltage, VCC or go below ground, GND. RWB: Wiper Potentiometer Terminal (Buffered) RWB is the buffered wiper terminal of the poten– tiometer. Its position on the resistor array is controlled by the control inputs, INC¯¯¯, U/D¯ and CS¯¯. R L: Low End Potentiometer Terminal RL is the low end terminal of the potentiometer. It is not required that this terminal be connected to a potential less than the R H terminal. Voltage applied to the R L terminal cannot exceed the supply voltage, VCC or go below ground, GND. R L and R H are electri- cally interchangeable. CS¯¯: Chip Select The chip select input is used to activate the control input of the CAT5111 and is active low. When in a high state, activity on the INC¯¯¯ and U/D¯ inputs will not affect or change the position of the wiper. DEVICE OPERATION The CAT5111 operates like a digitally controlled potentiometer with R H and R L equivalent to the high and low terminals and R WB equivalent to the mecha– nical potentiometer's wiper. There are 100 available tap positions including the resistor end points, R H and RL. There are 99 resistor elements connected in series between the R H and R L terminals. The wiper terminal is connected to one of the 100 taps and controlled by three inputs, INC¯¯¯, U/D¯ and CS¯¯. These inputs control a seven-bi t up/down counter whose output is decoded to select the wiper position. The selected wiper position can be stored in nonvolatile memory using the INC and CS¯¯ inputs. With CS¯¯ set LOW the CAT5111 is selected and will respond to the U/D¯ and INC¯¯¯ inputs. HIGH to LOW transitions on INC¯¯¯ wil increment or decrement the wiper (depending on the state of the U/D ¯ input and seven-bit counter). The wiper, when at either fixed terminal, acts like its mechanical equivalent and does not move beyond the last position. The value of the counter is stored in nonvolatile memory whenever CS¯¯ transitions HIGH while the INC¯¯¯ input is also HIGH. When the CAT5111 is powered-down, the last stored wiper counter position is maintained in the nonvolatile memory. When power is restor ed, the contents of the memory are recalled and the counter is set to the value stored. With INC¯¯¯ set low, the CAT5111 may be de-selected and powered down without storing the current wiper position in nonvolatile memory. This allows the system to always power up to a preset value stored in non- volatile memory.
Characteristics subject to change without notice OPERATION MODES High to Low Low High Wiper toward R H High to Low Low Low Wiper toward R L High Low to High X Store Wiper Position Low Low to High X No Store, Return to Standby X High X Standby ABSOLUTE MAXIMUM RATINGS(1) Parameters Ratings Units Supply Voltage V CC to GND -0.5 to +7 V Inputs CS¯¯ to GND -0.5 to VCC +0.5 V INC¯¯¯ to GND -0.5 to VCC +0.5 V U/D¯ to GND -0.5 to VCC +0.5 V R H to GND -0.5 to V CC +0.5 V R L to GND -0.5 to V CC +0.5 V R WB to GND -0.5 to V CC +0.5 V Parameters Ratings Units Operating Ambient Temperature Commercial (‘C’ or Blank suffix) 0 to 70 ºC Industrial (‘I’ suffix) -40 to +85 ºC Junction Temperature +150 ºC Storage Temperature -65 to 150 ºC Lead Soldering (10s max) +300 ºC RELIABILITY CHARACTERISTICS Symbol Parameter Test Method Min Typ Max Units VZAP (2) ESD Susceptibility MIL-STD-883, Test Method 3015 2000 V ILTH (2) (3) Latch-Up JEDEC Standard 17 100 mA TDR Data Retention MIL-STD-883, Test Method 1008 100 Years NEND Endurance MIL-STD-883, Test Method 1003 1,000,000 Stores DC ELECTRICAL CHARACTERISTICS VCC = +2.5 V to +6 V unless otherwise specified Power Supply Symbol Parameter Conditions Min Typ Max Units VCC Operating Voltage Range 2.5 – 6 V VCC = 6 V, f = 1 MHz, IW = 0 – – 200 µA ICC1 Supply Current (Increment) VCC = 6 V, f = 250 kHz, IW = 0 – – 100 µA Programming, VCC = 6 V – – 1000 µA ICC2 Supply Current (Write) VCC = 3 V – – 500 µA ISB1 (3) Supply Current (Standby) CS¯¯ = VCC - 0.3 V U/D¯, INC¯¯¯ = VCC - 0.3 V or GND – 75 150 µA Notes: (1) Stresses above those listed under “Absolut e Maximum Ratings” may cause permanent dam age to the device. These are stress rat ings only, and functional operation of the device at these or any other conditions outside of those listed in the operational sectio ns of this specification is not implied. Exposure to any absolute maxi mum rating for extended periods may affect device performance and re liability. (2) This parameter is tested initially and after a des ign or process change that affects the parameter. (3) Latch-up protection is provided for stresses up to 100 mA on address and data pins from -1 V to VCC + 1 V (4) I W = source or sink (5) These parameters are periodically sampled and are not 100% tested. CH RH RWI RWB Potentiometer Equivalent Circuit CW CL RL
Characteristics subject to change without notice Logic Inputs Symbol Parameter Conditions Min Typ Max Units IIH Input Leakage Current V IN = VCC – – 10 µA IIL Input Leakage Current VIN = 0 V – – -10 µA VIH1 TTL High Level Input Voltage 2 – V CC V VIL1 TTL Low Level Input Voltage 4.5 V ≤ VCC ≤ 5.5 V 0 – 0.8 V VIH2 CMOS High Level Input Voltage V CC x 0.7 – V CC + 0.3 V VIL2 CMOS Low Level Input Voltage 2.5 V ≤ VCC ≤ 6 V -0.3 – V CC x 0.2 V Potentiometer Characteristics Symbol Parameter Conditions Min Typ Max Units -10 Device 10 -50 Device 50 RPOT Potentiometer Resistance -00 Device 100 kΩ Pot. Resistance Tolerance ±20 % VRH Voltage on R H pin 0 V CC V VRL Voltage on R L pin 0 V CC V Resolution 1 % INL Integral Linearity Error IW ≤ 2 µA 0.5 1 LSB DNL Differential Linearity Error IW ≤ 2 µA 0.25 0.5 LSB ROUT Buffer Output Resistance 0.05VCC ≤ VWB ≤ 0.95VCC, VCC = 5 V 1 Ω IOUT Buffer Output Current 0.05VCC ≤ VWB ≤ 0.95VCC, VCC = 5 V 3 mA TCRPOT TC of Pot Resistance 300 ppm/ºC TCRATIO Ratiometric TC 20 ppm/ºC CRH/CRL/CRW Potentiometer Capacitances 8/8/25 pF fc Frequency Response Passive Attenuator, 10 kΩ 1.7 MHz VWB(SWING) Output Voltage Range IOUT ≤ 100 µA, VCC = 5 V 0.01VCC 0.99V CC
Characteristics subject to change without notice AC TEST CONDITIONS VCC Range 2.5 V ≤ VCC ≤ 6 V Input Pulse Levels 0.2V CC to 0.7VCC Input Rise and Fall Times 10 ns Input Reference Levels 0.5V CC AC OPERATING CHARACTERISTICS VCC = +2.5 V to +6.0 V, VH = VCC, VL = 0 V, unless otherwise specified Symbol Parameter Min Typ (1) Max Units tCI CS¯¯ to INC¯¯¯ Setup 100 – – ns tDI U/D¯ to INC¯¯¯ Setup 50 – – ns tID U/D¯ to INC¯¯¯ Hold 100 – – ns tIL INC¯¯¯ LOW Period 250 – – ns tIH INC¯¯¯ HIGH Period 250 – – ns tIC INC¯¯¯ Inactive to CS¯¯ Inactive 1 – – µs tCPH CS¯¯ Deselect Time (NO STORE) 100 – – ns tCPH CS¯¯ Deselect Time (STORE) 10 – – ms tIW INC¯¯¯ to VOUT Change – 1 5 µs tCYC INC¯¯¯ Cycle Time 1 – – µs tR, tF (2) INC¯¯¯ Input Rise and Fall Time – – 500 µs tPU (2) Power-up to Wiper Stable – – 1 ms tWR Store Cycle – 5 10 ms A.C. TIMING Notes: (1) Typical values are for T A = 25ºC and nominal supply voltage. (2) This parameter is periodically sampled and not 100% tested. (3) MI in the A.C. Timing diagram refers to the minimum incr emental change in the W output due to a change in the wiper position. CS INC U/D RWB tCI tIL MI(3) 90% 90% 10% (store)tCYC tIH tIC tCPH tF tR tDI tID tIW
Characteristics subject to change without notice APPLICATIONS INFORMATION Potentiometer Configuration Programmable Instrumentation Amplifier Programmable Sq. Wave Oscillator (555) Sensor Auto Referencing Circuit (a) resistive divider (b) variable resistance (c) two-port A1 = A2 = A3 = ¼ LM6064 R2 = R3 = R4 = 5kΩ RPOT = 10kΩ +5V +2.5V VO R3 R4 10 11 +5V V1 (-) V2 (+) CAT5113/5114 DPP +5V 0.01µF0.01µF 0.003µF pRPOT (1-p)RPOT C RB RA +5V DPP 555 +5V -5V VREF = 1V VOUT = 1V ± 1mV VSENSOR = 1V ± 50mV VCORR 499kΩ IC1B IC1A 20kΩ 499kΩ 499kΩ 499kΩ 10kΩ 0.01µF OSC CS IC3A ¼ 74HC132 Sensor +5V +200mV CAT5111/5112 IC2 DPP
Characteristics subject to change without notice Programmable Voltage Regulator Programmable I to V Converter Automatic Gain Control Programmable Bandpass Filter Programmable Current Source/Sink 0.1µF 1µF 6.8µF 11kΩ 100kΩ VO (REG) 10kΩ 820Ω 1.23V +5V DPP 2952 CAT5113/5114 VOUT FBSDSHUTDOWN VIN (UNREG) GND +5V 100kΩ 10kΩ R1 C2 0.001µF 0.001µF 1µF 3 4 +5V CAT5113/5114 DPP VO VS +2.5V 50kΩ +2.5V VO +5V IS – A2 LT1097 +5V 2 7 3 4 +5V CAT5113/5114 DPP pR (1-p)R330Ω 330Ω 1MΩ 10k +5V +5V VS 0 ≤ VS ≤ 2.5V 0 ≤ VO ≤ 2.5V VO +2.5V +5V IC3 CAT5111/5112 CLO VLL IC1 393 AI IC4 VUL +5V 10kΩ 10kΩ OSC IC2 74HC132 0.1µF CHI DPP CAT5111/5112 +5V +5V Serial Bus VS +2.5V +2.5V +5V2 3 11 100kΩ 100kΩ A1 =A 2 = LMC6064A R 2.5kΩ IS 100kΩ 100kΩ
Characteristics subject to change without notice PACKAGE OUTLINE DRAWINGS PDIP 8-Lead 300mils (L) (1)(2) Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC standard MS-001. D A L eb E eB c TOP VIEW SIDE VIEW END VIEW PIN # 1 IDENTIFICATION SYMBOL MIN NOM MAX A5 . 3 3 A1 0.38 A2 2.92 3.30 4.95 b 0.36 0.46 0.56 b2 1.14 1.52 1.78 c 0.20 0.25 0.36 D 9.02 9.27 10.16 E 7.62 7.87 8.25 e2 . 5 4 B S C E1 6.10 6.35 7.11 eB 7.87 10.92 L 2.92 3.30 3.80
Characteristics subject to change without notice SOIC 8-Lead 150mils (V) (1)(2) Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC standard MS-012. E1 E A h θ L c e b D PIN # 1 IDENTIFICATION TOP VIEW SIDE VIEW END VIEW A 1.35 1.75 A1 0.10 0.25 b 0.33 0.51 c 0.19 0.25 D 4.80 5.00 E 5.80 6.20 E1 3.80 4.00 e 1.27 BSC h 0.25 0.50 L 0.40 1.27 θ 0º 8º SYMBOL MIN NOM MAX
Characteristics subject to change without notice TSSOP 8-Lead (Y) (1)(2) Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC standard MS-153. E1 E e b D cA TOP VIEW SIDE VIEW END VIEW L1 L SYMBOL MIN NOM MAX A1 . 2 0 A1 0.05 0.15 A2 0.80 0.90 1.05 b 0.19 0.30 c 0.09 0.20 D 2.90 3.00 3.10 E 6.30 6.40 6.50 E1 4.30 4.40 4.50 e 0.65 BSC L 1.00 REF L1 0.50 0.60 0.75 θ10 ° 8 °
Characteristics subject to change without notice MSOP 8-Lead 3.0 x 3.0mm (Z) (1)(2) Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC standard MS-187. θ E1E A1 e b D c A TOP VIEW SIDE VIEW END VIEW L DETAIL A DETAIL A SYMBOL MIN NOM MAX A1 . 1 0 A1 0.05 0.10 0.15 A2 0.75 0.85 0.95 b 0.22 0.38 c 0.13 0.23 D 2.90 3.00 3.10 E 4.80 4.90 5.00 E1 2.90 3.00 3.10 e0 . 6 5 B S C L 0.40 0.60 0.80 L1 0.95 REF L2 0.25 BSC θ 0º 6º
Characteristics subject to change without notice EXAMPLE OF ORDERING INFORMATION (1)
ORDERING INFORMATION
Orderable Part Number Resistance (k Ω) Package-Pins Lead Finish CAT5111LI-10-G 10 CAT5111LI-50-G 50 CAT5111LI-00-G 100 PDIP-8 NiPdAu CAT5111VI-10-GT3 10 CAT5111VI-50-GT3 50 CAT5111VI-00-GT3 100 SOIC-8 NiPdAu CAT5111YI-10-GT3 10 CAT5111YI-50-GT3 50 CAT5111YI-00-GT3 100 TSSOP-8 NiPdAu CAT5111ZI-10-T3 10 CAT5111ZI-50-T3 50 CAT5111ZI-00-T3 100 MSOP-8 Matte-Tin Notes: (1) All packages are RoHS compliant. (2) Standard lead finish is NiPdAu, except MSOP package is Matte-Tin. (3) Contact factory for Matte-Tin finish ava ilability for PDIP, SOIC and TSSOP packages. (4) This device used in the above example is a CAT5111VI-10-GT3 (SOIC, Industrial Temperature, 10 kΩ, NiPdAu, Tape & Reel, 3,000/Reel). Prefix Device # Suffix CAT 5111 V I -10 – G (2)(3) T3 Optional Company ID Temperature Range I = Industrial (-40ºC to 85ºC) Resistance -10: 10 k Ω -50: 50 k Ω -00: 100 k Ω Lead Finish Blank: Matte-Tin G: NiPdAu Package L: PDIP V: SOIC Y: TSSOP Z: MSOP Tape & Reel T: Tape & Reel 3: 3 ,000/Reel Product Number 5111
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REVISION HISTORY
Date Rev. Description 10-Mar-04 M Updated Potentiometer Parameters 29-Mar-04 N Changed Green Package marking for SOIC from W to V 12-Apr-04 O Updated Reel Ordering Information 01-Jun-07 P Updated Example of Ordering Information Added Package Outline Added MD- in front of Document No. 27-Mar-08 Q Update Potentiometer Characteristics table Update Package Outline Drawings Update Example of Ordering Information Delete MSOP in NiPdAu plated finish Add Top Mark Codes link. 20-Nov-08 R Change logo and fine print to ON Semiconductor 10-Jul-09 S Update Ordering Information table