CAT34C02_V01 ONSEMI | Alldatasheet
Document overview
- Manufacturer or author: Provided By alldatasheet.com(free datasheet download site)
- PDF pages: 14
Technical content
Features
- Supports Standard and Fast I2C Protocol
- 1.7 V to 5.5 V Supply V oltage Range
- 16−Byte Page Write Buffer
- Hardware Write Protection for Entire Memory
- Software Write Protection for Lower 128 Bytes
- Schmitt Triggers and Noise Suppression Filters on I2C Bus Inputs (SCL and SDA)
- Low power CMOS Technology
- 1,000,000 Program/Erase Cycles
- 100 Year Data Retention
- Industrial and Extended Temperature Range
- This Device is Pb−Free, Halogen Free/BFR Free and RoHS Compliant*
Figure 1. Functional Symbol Reference Manual, SOLDERRM/D. dimensions section on page 10 of this data sheet.
ORDERING INFORMATION
TSSOP (Y), TDFN (VP2), UDFN (HU4) TSSOP−8 Y SUFFIX CASE 948AL Device Address InputA0, A1, A2 Serial Data Input/OutputSDA Serial Clock InputSCL Write Protect InputWP Power SupplyVCC GroundVSS FunctionPin Name PIN FUNCTION For the location of Pin 1, please consult the corresponding package drawing. TDFN−8 VP2 SUFFIX CASE 511AK UDFN−8 EP HU4 SUFFIX CASE 517AZ
Table 1. ABSOLUTE MAXIMUM RATINGS should not be assumed, damage may occur and reliability may be affected.
- The DC input voltage on any pin should not be lower than −0.5 V. During transitions, the voltage on any pin may undershoot to no less than
−1.5 V, for periods of less than 20 ns. Table 2. RELIABILITY CHARACTERISTICS (Note 2)
- These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AEC−Q100
Table 3. D.C. OPERATING CHARACTERISTICS *VIH Max = 4 V for SDA and SCL when VCC = 0 V. Table 4. PIN IMPEDANCE CHARACTERISTICS
- These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AEC−Q100
- When not driven, the WP, A0, A1 and A2 pins are pulled down to GND internally. For improved noise immunity, the internal pull−down is relatively
as the input level exceeds the trip point of the CMOS input buffer (~ 0.5 x VCC), the strong pull−down reverts to a weak current source.
Table 5. A.C. CHARACTERISTICS
- Test conditions according to “A.C. Test Conditions” table.
- Tested initially and after a design or process change that affects this parameter.
- t PU is the delay between the time VCC is stable and the device is ready to accept commands.
Table 6. THERMAL CHARACTERISTICS (Air velocity = 0 m/s, 4 layers PCB) (Notes 9 and 10)
- T J = TA + PD * /C0113JA, where: TJ is the Junction Temperature, TA the Ambient Temperature, PD the Power dissipation.
10.TJ = TC + PD * /C0113JC, where: TC is the Case Temperature, etc. Table 7. A.C. TEST CONDITIONS
Reset mode when VCC drops below the POR trigger level. ‘brown−out’ failure following a temporary loss of power. delivered on the negative edge of SCL. 0, A1 and A2: The Address pins accept the device address. These pins have on−chip pull−down resistors. releases it to ‘transmit’ a ‘1’. busy (see A.C. Characteristics). of a HIGH to LOW transition on SDA while SCL is HIGH. a START, a Slave will not respond to commands. of a LOW to HIGH transition on SDA while SCL is HIGH. (when following a Read command). set to 1010, for normal Read/Write operations (Figure 3). Write (0) operation is to be performed. a STOP to the Slave. Bus timing is illustrated in Figure 5. Figure 2. Start/Stop Timing
Software Write Protection (SWP) flags. instead of the regular 1010 (Ah) used for memory access. before the START and maintained just beyond the STOP. to a regular memory Read, a SWP Read does not return Data. no meaningful data following the ACK interval (Figure 15). of SCL immediately preceding the first data byte (Figure 9). Figure 13. Memory Protection Map Table 8. RSWP D.C. OPERATING CONDITIONS (Note 11)
- To prevent damaging the CAT34C02 while applying VHV, it is strongly recommended to limit the power delivered to pin A0, by inserting a series
the resistor can be omitted if VHV is clamped well below 10 V, it nevertheless provides simple protection against EOS events.
www.onsemi.com Marking Package Type Temperature Range Lead Finish Shipping† CAT34C02HU4EGT4A D1U UDFN−8 I = Industrial (−40°C to +85°C) NiPdAu Tape & Reel, 4,000 Units / Reel CAT34C02HU4I−GT4 D1U UDFN−8 I = Industrial (−40°C to +85°C) NiPdAu Tape & Reel, 4,000 Units / Reel CAT34C02HU4I−GTK D1U UDFN−8 I = Industrial (−40°C to +85°C) NiPdAu Tape & Reel, 4,000 Units / Reel CAT34C02HU4IGT4A D1U UDFN−8 I = Industrial (−40°C to +85°C) NiPdAu Tape & Reel, 4,000 Units / Reel CAT34C02HU4IGT4U5 D1U UDFN−8 I = Industrial (−40°C to +85°C) NiPdAu Tape & Reel, 4,000 Units / Reel CAT34C02VP2I−GT4 D1T TDFN−8 I = Industrial (−40°C to +85°C) NiPdAu Tape & Reel, 4,000 Units / Reel CAT34C02VP2IGT4A D1T TDFN−8 I = Industrial (−40°C to +85°C) NiPdAu Tape & Reel, 4,000 Units / Reel CAT34C02YI−GT5 34CH TSSOP−8 I = Industrial (−40°C to +85°C) NiPdAu Tape & Reel, 5,000 Units / Reel CAT34C02YI−GT5A 34CH TSSOP−8 I = Industrial (−40°C to +85°C) NiPdAu Tape & Reel, 5,000 Units / Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. 14.All packages are RoHS−compliant (Lead−free, Halogen−free) 15.The standard lead finish is NiPdAu. 16.For Gresham ONLY die, please order the OPNs: CAT34C02YI −GT5A, CAT34C02VP2IGT4A, CAT34C02HU3IGT4A, CAT34C02HU4IGT4A or CAT34C02HU4IGTU5. 17.For additional package and temperature options, please contact your nearest ON Semiconductor Sales office. ON Semiconductor is licensed by the Philips Corporation to carry the I2C bus protocol.
TDFN8, 2x3, 0.5P CASE 511AK ISSUE B DATE 18 MAR 2015SCALE 2:1 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.25MM FROM THE TERMINAL TIP . 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. ÇÇ ÇÇ ÇÇ AD E B C0.10 PIN ONE REFERENCE TOP VIEW SIDE VIEW BOTTOM VIEW LD2 C C0.10 C0.08 A1 SEATING PLANE NOTE 3 b8X 0.10 C 0.05 C A B DIM MIN MAX MILLIMETERS A 0.70 0.80 A1 0.00 0.05 b 0.20 0.30 D 2.00 BSC D2 1.30 1.50 E 3.00 BSC E2 1.20 1.40 e 0.50 BSC L 0.20 0.40 1 4 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. SOLDERING FOOTPRINT* 0.50 PITCH 1.45 3.40 DIMENSIONS: MILLIMETERS NOTE 4 0.30 DETAIL A A3 0.20 REF ADETAIL B DETAIL A L ALTERNATE CONSTRUCTIONS L ÇÇ ÇÇÉÉ DETAIL B MOLD CMPDEXPOSED Cu ALTERNATE CONSTRUCTION L1 −−− 0.15 e RECOMMENDED 1.56 GENERIC MARKING DIAGRAM* XXXXX = Specific Device Code A = Assembly Location WL = Wafer Lot Y = Year W = Work Week /C0071 = Pb−Free Package *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ /C0071”, may or may not be present. XXXXX AWLYW/C0071 M M 0.68 C0.10 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. 98AON34336EDOCUMENT NUMBER: DESCRIPTION: Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1TDFN8, 2X3, 0.5P © Semiconductor Components Industries, LLC, 2019 www.onsemi.com
UDFN8, 2x3 EXTENDED PAD CASE 517AZ ISSUE A DATE 23 MAR 2015SCALE 2:1 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.25MM FROM THE TERMINAL TIP . 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. ÇÇ ÇÇ ÇÇ AD E B C0.10 PIN ONE REFERENCE TOP VIEW SIDE VIEW BOTTOM VIEW LD2 C C0.10 C0.08 A1 SEATING PLANE NOTE 3 b8X 0.10 C 0.05 C A B DIM MIN MAX MILLIMETERS A 0.45 0.55 A1 0.00 0.05 b 0.20 0.30 D 2.00 BSC D2 1.35 1.45 E 3.00 BSC E2 1.25 1.35 e 0.50 BSC L 0.25 0.35 1 4 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. SOLDERING FOOTPRINT* 0.50 PITCH 1.45 3.40 DIMENSIONS: MILLIMETERS NOTE 4 0.30 DETAIL A A3 0.13 REF A DETAIL B DETAIL A L ALTERNATE CONSTRUCTIONS L L1 −−− 0.15 e RECOMMENDED 1.56 GENERIC MARKING DIAGRAM* XXXXX = Specific Device Code A = Assembly Location WL = Wafer Lot Y = Year W = Work Week /C0071 = Pb−Free Package *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ /C0071”, may or may not be present. XXXXX AWLYW/C0071 M M 0.68 C0.10 ÉÉ ÉÉÇÇ DETAIL B MOLD CMPDEXPOSED Cu ALTERNATE CONSTRUCTIONS ÉÉÉ ÉÉÉÇÇÇ MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. 98AON42552EDOCUMENT NUMBER: DESCRIPTION: Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1UDFN8, 2X3 EXTENDED PAD © Semiconductor Components Industries, LLC, 2019 www.onsemi.com
TSSOP8, 4.4x3.0, 0.65P CASE 948AL ISSUE A DATE 20 MAY 2022 /C0113 /C0113 XXX = Specific Device Code Y = Year WW = Work Week A = Assembly Location /C0071 = Pb−Free Package *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “/C0071”, may or may not be present. Some products may not follow the Generic Marking. GENERIC MARKING DIAGRAM* XXX YWW A/C0071 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS 98AON34428EDOCUMENT NUMBER: DESCRIPTION: Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1TSSOP8, 4.4X3.0, 0.65P onsemi and are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com
onsemi, , and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any products or information herein, without notice. The information herein is provided “as−is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license under any of its intellectual property rights nor the rights of others. onsemi products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use onsemi products for any such unintended or unauthorized application, Buyer shall indemnify and hold onsemi and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that onsemi was negligent regarding the design or manufacture of the part. onsemi is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. ADDITIONAL INFORMATION TECHNICAL PUBLICATIONS: Technical Library: www.onsemi.com/design/resources/technical−documentation onsemi Website: www.onsemi.com ONLINE SUPPORT: www.onsemi.com/support For additional information, please contact your local Sales Representative at www.onsemi.com/support/sales