CABT16245AMDLREP TI1 | Alldatasheet

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(TOP VIEW) 1DIR 1B1 1B2 GND 1B3 1B4 V CC 1B5 1B6 GND 1B7 1B8 2B1 2B2 GND 2B3 2B4 V CC 2B5 2B6 GND 2B7 2B8 2DIR 1OE 1A1 1A2 GND 1A3 1A4 V CC 1A5 1A6 GND 1A7 1A8 2A1 2A2 GND 2A3 2A4 V CC 2A5 2A6 GND 2A7 2A8 2OE DESCRIPTION/ORDERING INFORMATION SN74ABT16245A-EP 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS SCBS807B OCTOBER 2005 REVISED JANUARY 2006 Controlled Baseline One Assembly/Test Site, One Fabrication Site Enhanced Diminishing Manufacturing Sources (DMS) Support Enhanced Product-Change Notification Qualification Pedigree (1) Member of the Texas Instruments Widebus Family State-of-the-Art EPIC-IIB BiCMOS Design Significantly Reduces Power Dissipation Typical V OLP (Output Ground Bounce) V at V CC T A C High-Impedance State During Power Up and Power Down Distributed V CC and GND Pin Configuration Minimizes High-Speed Switching Noise Flow-Through Architecture Optimizes PCB Layout High-Drive Outputs 32-mA I OH 64-mA I OL Latch-Up Performance Exceeds 500 mA Per JESD ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model 200 pF, R Shrink Small-Outline (DL) Package (1) Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits. The SN74ABT16245A-EP is a 16-bit noninverting 3-state transceiver designed for synchronous two-way communication between data buses. The control-function implementation minimizes external timing requirements. This device can be used as two 8-bit transceivers or one 16-bit transceiver. It allows data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable OE input can be used to disable the device so that the buses are effectively isolated. When V CC is between and 2.1 the device is in the high-impedance state during power up or power down. However, to ensure the high-impendance state above 2.1 OE should be tied to V CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. The SN74ABT16245A-EP is characterized for operation from C to 125 Please be aware that an important notice concerning availability, standard warranty, and use in critical

applications

sheet. Widebus, EPIC-IIB are trademarks of Texas Instruments. PRODUCTION DATA information is current as of publication date. Copyright 2005 2006, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

www.ti.com 1A2 1A3 1A4 1A5 1A6 1A7 1A8 2A2 2A3 2A4 2A5 2A6 2A7 2A8 1OE 2OE 1A1

3 EN1 [BA]

3 EN2 [AB]

6 EN4 [BA]

6 EN5 [AB]

T A PACKAGE (1) ORDERABLE PART NUMBER TOP-SIDE MARKING C to 125 C SSOP DL Reel of 1000 CABT16245AMDLREP ABT16245AMEP (1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. FUNCTION TABLE (EACH 8-BIT SECTION) INPUTS OPERATION OE DIR L L B data to A bus L H A data to B bus H X Isolation LOGIC SYMBOL (1) (1) This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.

www.ti.com To Seven Other Channels 1DIR 1A1 1B1 1OE To Seven Other Channels 2DIR 2A1 2B1 2OE Absolute Maximum Ratings (1) Recommended Operating Conditions (1) SN74ABT16245A-EP 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS SCBS807B OCTOBER 2005 REVISED JANUARY 2006 LOGIC DIAGRAM (POSITIVE LOGIC) over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT V CC Supply voltage range 0.5 V V I Input voltage range (except I/O ports) (2) 0.5 V V O Voltage range applied to any output in the high or power-off state 0.5 5.5 V I O Current into any output in the low state mA I IK Input clamp current V I mA I OK Output clamp current V O mA θ JA Package thermal impedance (3) C/W T stg Storage temperature range 150 C (1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. (3) The package thermal impedance is calculated in accordance with JESD 51. MIN MAX UNIT V CC Supply voltage 4.5 5.5 V V IH High-level input voltage V V IL Low-level input voltage 0.8 V V I Input voltage V CC V I OH High-level output current mA I OL Low-level output current mA Δ Δ v Input transition rise or fall rate Outputs enabled ns/V Δ Δ V CC Power-up ramp rate 200 µ s/V T A Operating free-air temperature 125 C (1) All unused inputs of the device must be held at V CC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs literature number SCBA004.

www.ti.com Electrical Characteristics SN74ABT16245A-EP 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS SCBS807B OCTOBER 2005 REVISED JANUARY 2006 over recommended operating free-air temperature range (unless otherwise noted) T A C PARAMETER TEST CONDITIONS MIN MAX UNIT MIN TYP (1) MAX V IK V CC 4.5 I I mA 1.2 1.2 V V CC 4.5 I OH mA 2.5 2.5 V CC I OH mA V OH V I OH mA V CC 4.5 V I OH mA I OL mA 0.55 0.55 V OL V CC 4.5 V V I OL mA 0.55 V hys 100 mV Control V CC to 5.5 V I V CC or GND inputs I I µ A A or B V CC 2.1 V to 5.5 V I V CC or GND 100 port I OZPU V CC to 2.1 V O 0.5 V to 2.7 OE X µ A I OZPD V CC 2.1 V to V O 0.5 V to 2.7 OE X µ A I OZH (2) V CC 2.7 V to 5.5 V O 2.7 OE V (3) µ A I OZL (2) V CC 2.7 V to 5.5 V O 0.5 OE V (3) µ A I off V CC V I or V O 5.5 V 100 µ A I CEX V CC 5.5 V O 5.5 V Outputs high µ A I O (4) V CC 5.5 V O 2.5 V 100 180 180 mA Outputs high A or B V CC 5.5 I O I CC Outputs low mA port V I V CC or GND Outputs disabled V CC 5.5 Outputs enabled 1.5 Data One input at 3.4 inputs Outputs disabled 0.05 Other inputs at V CC or GND Δ I CC (5) mA Control V CC 5.5 One input at 3.4 1.5 1.5 inputs Other inputs at V CC or GND Control C i V I 2.5 V or 0.5 V pF inputs A or B C o V O 2.5 V or 0.5 V pF port (1) All typical values are at V CC (2) The parameters I OZH and I OZL include the input leakage current. (3) This limit may vary among suppliers. (4) Not more than one output should be tested at a time, and the duration of the test should not exceed one second. (5) This is the increase in supply current for each input that is at the specified TTL voltage level, rather than V CC or GND.

www.ti.com Switching Characteristics SN74ABT16245A-EP 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS SCBS807B OCTOBER 2005 REVISED JANUARY 2006 over recommended operating ranges of supply voltage and operating free-air temperature, C L pF (unless otherwise noted) (see Figure V CC FROM TO T A C PARAMETER MIN MAX UNIT (INPUT) (OUTPUT) MIN TYP MAX t PLH 0.5 2.2 3.4 0.5 A or B B or A ns t PHL 0.5 2.3 3.8 0.5 4.6 t PZH 0.8 3.6 5.2 0.8 5.5 OE B or A ns t PZL 0.9 3.7 6.1 0.1 7.3 t PHZ 1.3 4.4 5.8 1.3 6.3 OE B or A ns t PLZ 1.4 3.3 4.7 1.4 5.5

www.ti.com PARAMETER MEASUREMENT INFORMATION 1.5 V thtsu From Output Under Test CL = 50 pF (see Note A) LOAD CIRCUIT 7 V Open GND 500 Ω 500 Ω Data Input Timing Input 1.5 V 3 V 0 V 1.5 V 1.5 V 3 V 0 V 3 V 0 V 1.5 V tw Input VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS VOLTAGE WAVEFORMS PULSE DURATION tPLH tPHL tPHL tPLH VOH VOH VOL VOL 1.5 V 1.5 V 3 V 0 V 1.5 V1.5 V Input 1.5 V Output Control Output Waveform 1 S1 at 7 V (see Note B) Output Waveform 2 S1 at Open (see Note B) VOL VOH tPZL tPZH tPLZ tPHZ 1.5 V1.5 V 3.5 V 0 V 1.5 V VOL + 0.3 V 1.5 V VOH − 0.3 V ≈ 0 V 3 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING Output Output tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open 7 V Open TEST S1 NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω , tr ≤ 2.5 ns, tf/char????????≤ 2.5 ns. D. The outputs are measured one at a time, with one transition per measurement. 1.5 V SN74ABT16245A-EP 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS SCBS807B OCTOBER 2005 REVISED JANUARY 2006 Figure Load Circuit and Voltage Waveforms

www.ti.com CABT16245A*DL*EP Estimated Device Life at Elevated Temperatures Electromigration and Wirebond Voiding Fail Modes 120 125 130 135 140 145 150 155 Continuous Tj (°C) Years estimated life Wirebond Voiding Fail Mode Electromigration Fail Mode SN74ABT16245A-EP 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS SCBS807B OCTOBER 2005 REVISED JANUARY 2006

Orderable Device Status(1) Package Type Package Drawing Pins Package Qty Eco Plan(2) Lead/Ball FinishMSL Peak Temp (3) CABT16245AMDLREP ACTIVE SSOP DL 48 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM V62/06609-01XE ACTIVE SSOP DL 48 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM (1)The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2)Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontentfor the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS):TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt):This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br):TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF SN74ABT16245A-EP :

  • Catalog:SN74ABT16245A
  • Military:SN54ABT16245A NOTE: Qualified Version Definitions:
  • Catalog - TI's standard catalog product
  • Military - QML certified for Military and Defense Applications PACKAGE OPTION ADDENDUM www.ti.com 18-Sep-2008 Addendum-Page 1

*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W (mm) Pin1 Quadrant PACKAGE MATERIALS INFORMATION www.ti.com 5-Aug-2008 Pack Materials-Page 1

*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) CABT16245AMDLREP SSOP DL 48 1000 346.0 346.0 49.0 PACKAGE MATERIALS INFORMATION www.ti.com 5-Aug-2008 Pack Materials-Page 2

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