CA358A

CA158_01 INTERSIL | Alldatasheet

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• Internal Frequency Compensation for Unity Gain  Wide Power Supply Range:  Low Input Bias Current  Low Input Offset Voltage and Current  Input Common-Mode Voltage Range Includes Ground  Differential Input Voltage Range Equal to V+ Range Related Literature  TB363, Guidelines for Handling and Processing Moisture Sensitive Surface Mount Devices (SMDs) OUTPUT (B) V+V- INV. INPUT (B) NON-INV. INPUT (B) NON-INV. INPUT (A) INV. INPUT (A) OUTPUT (A) A B B A OUTPUT (B) NON-INV. INPUT (B) INV. INPUT (B) OUTPUT (A) INV . INPUT (A) NON-INV. INPUT (A) Part Number Information PART NUMBER TEMP. RANGE ( oC) PACKAGE PKG. NO. CA0158E -55 to 125 8 Ld PDIP E8.3 CA0158AE -55 to 125 8 Ld PDIP E8.3 CA0158M -55 to 125 8 Ld SOIC M8.15 CA0158T -55 to 125 8 Pin Can T8.C CA0258E -25 to 85 8 Ld PDIP E8.3 CA0258M -25 to 85 8 Ld SOIC M8.15 CA0358E 0 to 70 8 Ld PDIP E8.3 CA0358AE 0 to 70 8 Ld PDIP E8.3 CA0358M 0 to 70 8 Ld SOIC M8.15 CA2904E -40 to 85 8 Ld PDIP E8.3 LM358N 0 to 70 8 Ld PDIP E8.3 LM2904N -40 to 85 8 Ld PDIP E8.3 Data Sheet May 2001 tle 290 al, ra- al pli- li- CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143| Intersil and Design is a trademark of Intersil Americas Inc.|Copyright © Intersil Americas Inc. 2001 O B SO LETE PR O D U C T N O R EC O M M EN D ED R EPLA C EM EN T

Absolute Maximum Ratings Thermal Information Supply Voltage Input Current (V Operating Conditions T emperature Range Thermal Resistance (Typical, Note 3)θJA (oC/W) θJC (oC/W) oC (SOIC - Lead Tips Only) CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationo ft h e device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES: 1. This input current will only exist when the voltage at any of the input leads is driven negative. This current is due to the collector base junction of the input PNP transistors becoming forward biased and thereby acting as input diode clamps. In addition to this diode action, there is also lateral NPN parasitic transistor action on the IC chip. This transistor action can cause the output voltages of the amplifiers to go to the V+ voltage level (or to ground for a large overdrive) for the time duration that an input is driven negative. This transistor action is not destructive and normal output states will re-establish when the input voltage, which was negative, again returns to a value greater than -0.3V. 2. The maximum output current is approximately 40mA independent of the magnitude of V+. Continuous short circuits at V+ > 15V can cause excessive power dissipation and eventual destruction. Short circuits from the output to V+ can cause overheating and eventual destruction of the device. Destructive dissipation can result from simultaneous short circuits on both amplifiers. 3. θ JA is measured with the component mounted on an evaluation PC board in free air. Electrical SpecificationsValues Apply for Each Operational Amplifier. Supply Voltage V+ = 5V, V- = 0V, Unless Otherwise Specified PARAMETER TEST CONDITIONS TEMP (oC) CA158A CA358A UNITSMIN TYP MAX MIN TYP MAX Input Offset Voltage (Note 6) 2 5 -12-2 3 m V Full - - 4 - - 5 mV Average Input Offset Voltage Drift R S =0 Ω Full - 7 15 - 7 20 µV/oC Input Common Mode Voltage Range (Note 5) V+ = 30V Full 0 - V+ -2 0 - V+ -2 V Common Mode Rejection Ratio DC 25 70 85 - 65 85 - dB Power Supply Rejection Ratio DC 25 65 100 - 65 100 - dB Input Bias Current (Note 4) II+o rII- 25 - 20 50 - 45 100 nA II+o rII- Full - 40 100 - 40 200 nA Input Offset Current II+-II-2 5 - 2 1 0 - 5 3 0 n A II+-II-F u l l - - 3 0 - - 7 5 n A Average Input Offset Current Drift Full - 10 200 - 10 300 pA/ oC Large Signal Voltage Gain RL ≥ 2kΩ ,V +=1 5 V( F o r Large VO Swing) 25 50 100 - 25 100 - kV/V Output Voltage Swing R L =2 kΩ 25 0 - V+ -1.5 0 - V+ -1.5 V CA158, CA158A, CA258, CA258A, CA358, CA358A, CA2904, LM358, LM2904

Source V I+=+ 1 V ,VI-=0 V ,V += 15V 25 20 40 - 20 40 - mA Sink V I+=0 V ,VI-=1 V , V+ = 15V 25 10 20 - 10 20 - mA VI+=0 V ,VI-=1 V , VO =2 0 0 m V 25 12 50 - 12 50 - µA Short Circuit Output Current (Note 2) R L =0 Ω 25 - 40 60 - 40 60 mA Crosstalk f = 1 to 20kHz (Input Referred) Total Supply Current R L = ∞ Full - 0.7 1.2 - 0.7 1.2 mA R L = ∞ , V+ = 30V Full - 1.5 3 - 1.5 3 mA NOTES: 4. Due to the PNP input stage the direction of the input current is out of the IC. No loading change exists on the input lines because the current is essentially constant, independent of the state of the output. 5. The input signal voltage and the input common mode voltage should not be allowed to go negative by more than 0.3V. The positive limit of the common mode voltage range is V+ - 1.5V, but either or both inputs can go to +32V without damage. 6. VO =1 . 4 V ,RS =0 Ω with V+ from 5V to 30V, and over the full input common mode voltage range (0V to V+ - 1.5V). Electrical SpecificationsValues Apply for Each Operational Amplifier. Supply Voltage V+ = 5V, V- = 0V, Unless Otherwise Specified(Continued) PARAMETER TEST CONDITIONS TEMP (oC) CA158A CA358A UNITSMIN TYP MAX MIN TYP MAX Electrical SpecificationsValues Apply for Each Operational Amplifier. Supply Voltage V+ = 5V, V- = 0V, Unless Otherwise Specified PARAMETER TEST CONDITIONS TEMP (oC) CA158, CA258 CA358, LM358 CA2904, LM2904 UNITSMIN TYP MAX MIN TYP MAX MIN TYP MAX Input Offset Voltage (Note 9) 25 - 2 5 - 2 7 - 2 7 mV Full - - 7 - - 9 - - 10 mV Average Input Offset Voltage Drift R S =0 Ω Full - 7 - - 7 - - 7 - µV/oC Input Common Mode Voltage Range (Note 8) V+ = 30V 25 0 - V+ - 1.5 0- V + - 1.5 0- V + - 1.5 V V+ = 30V Full 0 - V+ -2 0 - V+ -2 0 - V+ -2 V Common Mode Rejection Ratio DC 25 70 85 - 65 70 - 50 70 - dB Power Supply Rejection Ratio DC 25 65 100 - 65 100 - 50 100 - dB Input Bias Current (Note 7) II+o rII- 25 - 45 150 - 45 250 - 45 250 nA II+o rII- Full - 40 300 - 40 500 - 40 500 nA Input Offset Current II+-II- 2 5- 33 0- 55 0-5 5 0 n A II+-II- Full - - 100 - - 150 - 45 200 nA Average Input Offset Cur- rent Drift F u l l -1 0- -1 0- - 1 0 - p A / oC Large Signal Voltage Gain R L ≥ 2kΩ , V+ = 15V (For Large VO Swing) 25 50 100 - 25 100 - - 100 - kV/V Output Voltage Swing R L =2 kΩ 25 0 - V+ - 1.5 0- V + - 1.5 0- V + - 1.5 V CA158, CA158A, CA258, CA258A, CA358, CA358A, CA2904, LM358, LM2904

Source V I+=+ 1 V ,VI-=0 V , V+ = 15V 25 20 40 - 20 40 - 20 40 - mA Sink V I+=0 V ,VI-=1 V , V+ = 15V 25 10 20 - 10 20 - 10 20 - mA VI+=0 V ,VI-=1 V , VO =2 0 0 m V 25 12 50 - 12 50 - - - - µA Short Circuit Output Current (Note 2) R L =0 Ω 25 - 40 60 - 40 60 - 40 60 mA Crosstalk f = 1 to 20kHz (Input Referred) R L = ∞ , V+ = 30V Full - 1.5 3 - 1.5 3 - 1.5 3 mA NOTES: 7. Due to the PNP input stage the direction of the input current is out of the IC. No loading change exists on the input lines because the current is essentially constant, independent of the state of the output. 8. The input signal voltage and the input common mode voltage should not be allowed to go negative by more than 0.3V. The positive limit of the common mode voltage range is V+ - 1.5V, but either or both inputs can go to +32V without damage. 9. VO =1 . 4 V ,RS =0 Ω with V+ from 5V to 30V, and over the full input common mode voltage range (0V to V+ - 1.5V). Electrical SpecificationsValues Apply for Each Operational Amplifier. Supply Voltage V+ = 5V, V- = 0V, Unless Otherwise Specified(Continued) PARAMETER TEST CONDITIONS TEMP (oC) CA158, CA258 CA358, LM358 CA2904, LM2904 UNITSMIN TYP MAX MIN TYP MAX MIN TYP MAX Schematic Diagram ONE OF TWO OPERATIONAL AMPLIFIERS INPUTS 6µA4 µA 100 µA C COMP 50µA Q 1 Q 2 Q 3 Q 4 Q 9Q 8 Q 10 Q 11 Q 12 Q 13 Q 6 Q 5 Q 7 VO R SC TO 2 TO 2 CA158, CA158A, CA258, CA258A, CA358, CA358A, CA2904, LM358, LM2904

FIGURE 7. VOLTAGE FOLLOWER PULSE RESPONSE FIGURE 8. VOLTAGE FOLLOWER PULSE RESPONSE FIGURE 9. LARGE-SIGNAL FREQUENCY RESPONSE FIGURE 10. INPUT CURRENT vs SUPPLY VOLTAGE FIGURE 11. OUTPUT SOURCE CURRENT CHARACTERISTICS FIGURE 12. OUTPUT SINK CURRENT CHARACTERISTICS

0.01 OUTPUT VOLTAGE (V)

All Intersil semiconductor products are manufactured, assembled and tested underISO9000 quality systems certification. its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. FIGURE 13. OUTPUT CURRENT vs AMBIENT TEMPERATURE 7mils (0.17mm) larger in both dimensions.