CA3450 INTERSIL | Alldatasheet

Document overview

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  • PDF pages: 8

Technical content

Features

  • High Open Loop Gain at Video Frequencies
  • f T = 220MHz; CC = 0pF With a Load of 50Ω ||20pF|| 1MΩ (Scope Input)
  • V OUT =±4.1V Into 75Ω
  • Offset Null Terminals

Applications

  • Video Line Driver
  • High Frequency Unity Gain Buffer
  • Pulse Amplifier
  • High Speed Comparator
  • High Frequency Oscillator and Video Amplifiers OFFSET NULL NC - INPUT VO OFFSET NULL + INPUT COMP NC COMP NC Part Number Information PART NUMBER TEMP. RANGE ( oC) PACKAGE PKG. NO. CA3450E -40 to 85 16 Ld PDIP E16.3 January 1999 File Number 1732.5 OBSOLETE PRODUCT NO RECOMMENDED REPLA CEMENT Call Central Applications 1-800-442-7747or email: centapp@harris.com CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143| Copyright © Intersil Corporation 1999

X0.50 X18 BIAS CIRCUIT 1254119 STAGE 161 7V + 8V + OFFSET NULL PHASE COMP +IN -IN Q 2 Q 1 Q 3 D 1 Q 26 Q 27 Q 24 Q 25 Q 28 D 7 R 12 250 R 13 860 C 7 Q 29 Q 30 Q 31 Q 32 C 1 Q 33 Q 34 Q 36 Q 37 FREQUENCY COMPEN- R 11 R 14 860 R 15 130 R 16 860 R 17 500 R 18 200 R 19 100 R 20 170 R 21 270 R 22 250 Q 7Q 6 Q 5 Q 4 D 2 Q 8 Q 10 Q 11 C 2 Q 9 Q 12 Q 14 Q 15 Q 16 C 3 Q 35 Q 38 C 4 C 5 C 6 D 3 D 4 D 5 D 6 Q 18 Q 19 D 9 R 7 OUTPUT 16 4, 5, 12, 13 D 10 R 8 R 5 R 6 R 4 8.5K 11 7 V+V+ FREQUENCY COMPENSATION Q 17 143 NON- INVERTING INPUT INVERTING INPUT Q 21 Q 22 R 3R 2 140 Q 20 Q 23 R 1 100K R 9 780 R 10 3.2K SATION CA3450

Absolute Maximum Ratings Thermal Information Operating Conditions oC to 85oC Thermal Resistance (Typical, Note 1) θJA (oC/W) CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. θJA is measured with the component mounted on an evaluation PC board in free air. Electrical SpecificationsC C = 5pF , VSUPPL Y =±6V, Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS TEMP. (oC) MIN TYP MAX UNITS DC Input Offset Voltage |V IO|2 5 - 8 2 0 m V Full - 10 35 mV Input Bias current |I IB| 25 - 100 400 nA Input Offset Current |I IO| 25 - 50 200 nA Open Loop DC Gain A OL VOUT =±2.5V, RL = 50Ω 25 60 70 - dB Full 55 - - dB Power Supply Rejection Ratio PSRR ∆V =±1V 25 55 65 - dB Common Mode Rejection Ratio CMRR V ICR =±3.5V 25 50 60 - dB Common Mode Input Range V ICR 25 ±3.5 ±3.7 - V Full ±3.0 - - V Supply Current I+ 25 - 30 40 mA Full - - 50 mA DYNAMIC -3dB Bandwidth A V = 1 (See Figure 2) C C = 5pF No Load 25 - 200 - MHz R L = 1MΩ ||20pF 25 - 190 - MHz R L = 50Ω ||20pF 25 - 185 - MHz Bandwidth (Unity Gain Crossing) AV = Open Loop C C = 0 (See Figure 1) No Load 25 210 230 - MHz R L = 20pF||1MΩ 25 180 200 - MHz R L = 50Ω ||20pF 25 180 220 - MHz Bandwidth (Unity Gain Crossing) AV = 10, CC = 0pF R FEEDBACK = 450Ω R PIN 3 - G = 50Ω (See Figure 2) No Load 25 200 210 - MHz 50Ω 25 175 190 - MHz 1M||20pF 25 180 195 - MHz 50Ω ||1M||20pF 25 170 188 - MHz Transient Response, Overshoot (See Figure 3) OS A V = 1, CC = 5pF R L = 50Ω ||20pF 25 - 30 - % No Load 25 - 20 - % AV ≥10, CC = 0pF, RL = 50Ω ||20pF 25 - 10 - % Settling Time (See Figure 5) (2V Step, RL = 50Ω ||20pF) tS AV = -1, CC = 5pF, 0.1%, 10 Bits 25 - 35 - ns AV = 1, CC = 5pF, 0.1%, 10 Bits 25 - 50 - ns AV = 10, CC = 0pF, 0.1%, 10 Bits 25 - 35 - ns AV = 10, CC = 0pF, 1.0%, 7 Bits 25 - 25 - ns CA3450

FIGURE 1. OPEN LOOP GAIN vs FREQUENCY TEST CIRCUIT

  1. A 10Ω ,1/4W supply decoupling resistor is shown in all application circuits of this device. The resistor serves two purposes. First it provides a

it also provides protection for the device in event of a sustained short circuit applied directly to the output terminals. are multilayer ceramic chip types.