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Document overview

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Technical content

Features

  • Tight g M Spread:

Applications

  • Sample and Hold • Multiplier
  • Multiplexer • Comparator
  • Voltage Follower Pinouts CA3080 (PDIP, SOIC) TOP VIEW Part Number Information PART NUMBER (BRAND) TEMP. RANGE (oC) PACKAGE PKG. NO. CA3080AE -55 to 125 8 Ld PDIP E8.3 CA3080AM (3080A) -55 to 125 8 Ld SOIC M8.15 CA3080AM96 (3080A) -55 to 125 8 Ld SOIC Tape and Reel M8.15 CA3080E 0 to 70 8 Ld PDIP E8.3 CA3080M (3080) 0 to 70 8 Ld SOIC M8.15 CA3080M96 (3080) 0 to 70 8 Ld SOIC Tape and Reel M8.15 NC INV. INPUT NON-INV. INPUT NC OUTPUT AMPLIFIER BIAS INPUT OBSOLETE PRODUCT NO RECOMMENDED REPLACEMENT contact our Technical Support Center at 1-888-INTERSIL or www.intersil.com/tsc

CA3080, CA3080A FN475 Rev.6.00 Page 2 of 11 Jan 13, 2017 Absolute Maximum Ratings Thermal Information Amplifier Bias Current (I Operating Conditions Temperature Range Thermal Resistance (Typical, Note 2) JA (oC/W) JC (oC/W) (SOIC - Lead Tips Only) CAUTION: Stresses above those listed in “Abs olute Maximum Ratings” may cause permanent dam age to the device. This is a stress o nly rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES: 1. Short circuit may be applied to ground or to either supply. 2. JA is measured with the component mounted on an evaluation PC board in free air. Electrical Specifications For Equipment Design, VSUPPLY = 15V, Unless Otherwise Specified PARAMETER TEST CONDITIONS TEMP CA3080 CA3080A UNITSMIN TYP MAX MIN TYP MAX Input Offset Voltage I ABC = 5A2 5 - 0 . 3 - - 0 . 3 2 m V IABC = 500A2 5 - 0 . 4 5 - 0 . 4 2 m V Full - - 6 - - 5 mV Input Offset Voltage Change I ABC = 500A to 5A2 5 - 0 . 2 - - 0 . 1 3 m V Input Offset Voltage Temp. Drift I ABC = 100AF u l l - - - - 3 . 0 - V/oC Input Offset Voltage Sensitivity Positive I ABC = 500A 25 - - 150 - - 150 V/V Negative 25 - - 150 - - 150 V/V Input Offset Current I ABC = 500A 25 - 0.12 0.6 - 0.12 0.6  Input Bias Current I ABC = 500A2 5 - 2 5 - 2 5 A Full - - 7 - - 15 A Differential Input Current I ABC = 0, VDIFF = 4V 25 - 0.008 - - 0.008 5 nA Amplifier Bias Voltage I ABC = 500A 25 - 0.71 - - 0.71 - V Input Resistance I ABC = 500A 25 10 26 - 10 26 - k  Input Capacitance I ABC = 500A, f = 1MHz 25 - 3.6 - - 3.6 - pF Input-to-Output Capacitance I ABC = 500A, f = 1MHz 25 - 0.024 - - 0.024 - pF Common-Mode Input-Voltage Range IABC = 500A 25 12 to -12 13.6 to -14.6 - 12 to -12 13.6 to -14.6 Forward Transconductance (Large Signal) IABC = 500A 25 6700 9600 13000 7700 9600 12000 S Full 5400 - - 4000 - - S Output Capacitance I ABC = 500Af = 1MHz 25 - 5.6 - - 5.6 - pF Output Resistance I ABC = 500A 25 - 15 - - 15 - M  Peak Output Current I ABC = 5A, RL = 0 25 - 5 - 3 5 7 A IABC = 500A, RL = 0 25 350 500 650 350 500 650 A Full 300 - - 300 - - A

FIGURE 1. SCHEMATIC DIAGRAM OF THE CA3080 AND CA3080A IN A UNITY-GAIN VOLTAGE FOLLOWER CONFIGURATION AND

2 OUTPUT

otherwise under any patent or patent rights of Intersil or its subsidiaries. © Copyright Intersil Americas LLC 2001-2004. All Rights Reserved. All trademarks and registered trademarks are the property of their respective owners. FIGURE 30. INPUT-TO-OUTPUT CAPACITANCE TEST CIRCUIT FIGURE 31. INP UT-TO-OUTPUT CAPACITANCE vs SUPPLY