CA3080 INTERSIL | Alldatasheet

Document overview

  • Manufacturer or author: Provided By alldatasheet.com(free datasheet download site)
  • PDF pages: 11

Technical content

Features

  • Tight gM Spread:
  • Extended g

Applications

  • Sample and Hold • Multiplier
  • Multiplexer • Comparator
  • Voltage Follower Pinouts CA3080 (PDIP, SOIC) TOP VIEW CA3080 (METAL CAN) TOP VIEW

Ordering Information

(BRAND) TEMP. RANGE ( oC) PACKAGE PKG. NO. CA3080A -55 to 125 8 Pin Metal Can T8.C CA3080AE -55 to 125 8 Ld PDIP E8.3 CA3080AM (3080A) -55 to 125 8 Ld SOIC M8.15 CA3080AM96 (3080A) -55 to 125 8 Ld SOIC Tape and Reel M8.15 CA3080E 0 to 70 8 Ld PDIP E8.3 CA3080M (3080) 0 to 70 8 Ld SOIC M8.15 CA3080M96 (3080) 0 to 70 8 Ld SOIC Tape and Reel M8.15 NC INV. INPUT NON-INV. INPUT NC OUTPUT AMPLIFIER BIAS INPUT OUTPUT BIAS TAB NON-INV. INPUT INV. INPUT Data Sheet September 1998 File Number 475.4 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143| Copyright © Intersil Corporation 1999

Absolute Maximum Ratings Thermal Information Amplifier Bias Current (I Operating Conditions Temperature Range Thermal Resistance (Typical, Note 2)θJA (oC/W) θJC (oC/W) oC (SOIC - Lead Tips Only) CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES: 1. Short circuit may be applied to ground or to either supply. 2. θ JA is measured with the component mounted on an evaluation PC board in free air. Electrical SpecificationsFor Equipment Design, VSUPPL Y = ±15V, Unless Otherwise Specified PARAMETER TEST CONDITIONS TEMP CA3080 CA3080A UNITSMIN TYP MAX MIN TYP MAX Input Offset Voltage I ABC = 5µA 25 - 0.3 - - 0.3 2 mV IABC = 500µA 25 - 0.4 5 - 0.4 2 mV Full - - 6 - - 5 mV Input Offset Voltage Change I ABC = 500µA to 5µA 25 - 0.2 - - 0.1 3 mV Input Offset Voltage Temp. Drift IABC = 100µA Full - - - - 3.0 - µV/oC Input Offset Voltage Sensitivity Positive IABC = 500µA 25 - - 150 - - 150 µV/V Negative 25 - - 150 - - 150 µV/V Input Offset Current I ABC = 500µA 25 - 0.12 0.6 - 0.12 0.6 µΑ Input Bias Current I ABC = 500µA2 5 - 2 5 - 2 5 µA Full - - 7 - - 15 µA Differential Input Current I ABC = 0, VDIFF = 4V 25 - 0.008 - - 0.008 5 nA Amplifier Bias Voltage I ABC = 500µA 25 - 0.71 - - 0.71 - V Input Resistance I ABC = 500µA 25 10 26 - 10 26 - k Ω Input Capacitance I ABC = 500µA, f = 1MHz 25 - 3.6 - - 3.6 - pF Input-to-Output Capacitance I ABC = 500µA, f = 1MHz 25 - 0.024 - - 0.024 - pF Common-Mode Input-Voltage Range IABC = 500µA 25 12 to -12 13.6 to -14.6 - 12 to -12 13.6 to -14.6 Forward Transconductance (Large Signal) IABC = 500µA 25 6700 9600 13000 7700 9600 12000 µS Full 5400 - - 4000 - - µS Output Capacitance I ABC = 500µA,f = 1MHz 25 - 5.6 - - 5.6 - pF Output Resistance I ABC = 500µA 25 - 15 - - 15 - M Ω Peak Output Current I ABC = 5µA, RL = 0Ω 25 - 5 - 3 5 7 µA IABC = 500µA, RL = 0Ω 25 350 500 650 350 500 650 µA Full 300 - - 300 - - µA CA3080, CA3080A

FIGURE 1. SCHEMATIC DIAGRAM OF THE CA3080 AND CA3080A IN A UNITY-GAIN VOLTAGE FOLLOWER CONFIGURATION AND

2 OUTPUT

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FIGURE 30. INPUT-TO-OUTPUT CAPACITANCE TEST CIRCUIT FIGURE 31. INPUT-TO-OUTPUT CAPACITANCE vs SUPPLY