CA3045 INTERSIL | Alldatasheet
Document overview
- Manufacturer or author: Provided By alldatasheet.com(free datasheet download site)
- PDF pages: 6
Technical content
Features
- Two Matched Transistors
- 5 General Purpose Monolithic Transistors
- Operation From DC to 120MHz
- Wide Operating Current Range
- Full Military Temperature Range
Applications
- Three Isolated Transistors and One Differentially Connected Transistor Pair for Low Power Applications at Frequencies from DC Through the VHF Range
- Custom Designed Differential Amplifiers
- Temperature Compensated Amplifiers
- See Application Note, AN5296 “Application of the CA3018 Integrated-Circuit Transistor Array” for Suggested
Ordering Information
(BRAND) TEMP. RANGE ( oC) PACKAGE PKG. NO. CA3045F -55 to 125 14 Ld CERDIP F14.3 CA3046 -55 to 125 14 Ld PDIP E14.3 CA3046M (3046) -55 to 125 14 Ld SOIC M14.15 CA3046M96 (3046) -55 to 125 14 Ld SOIC Tape and Reel M14.15 SUBSTRATE DIFFERENTIAL PAIR Q 1 Q 5 Q 4 Q 3 Q 2 Data Sheet September 1998 File Number 341.4 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143| Copyright © Intersil Corporation 1999
Absolute Maximum Ratings Thermal Information Operating Conditions Thermal Resistance (Typical, Note 2)θJA (oC/W) θJC (oC/W) oC (SOIC - Lead Tips Only) CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTES: 1. The collector of each transistor of the CA3045 and CA3046 is isolated from the substrate by an integral diode. The substrate (Terminal 13) must be connected to the most negative point in the external circuit to maintain isolation between transistors and to provide for normal transistor ac- tion. 2. θ JA is measured with the component mounted on an evaluation PC board in free air. PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS DC CHARACTERISTICS Collector-to-Base Breakdown Voltage V (BR)CBO IC = 10µA, IE = 0 20 60 - V Collector-to-Emitter Breakdown Voltage V (BR)CEO IC = 1mA, IB = 0 15 24 - V Collector-to-Substrate Breakdown Voltage V (BR)CIO IC = 10µA, ICI = 0 20 60 - V Emitter-to-Base Breakdown Voltage V (BR)EBO IE = 10µA, IC = 0 5 7 - V Collector Cutoff Current (Figure 1) I CBO VCB = 10V, IE = 0 - 0.002 40 nA Collector Cutoff Current (Figure 2) I CEO VCE = 10V, IB = 0 - See Fig. 2 0.5 µA Forward Current Transfer Ratio (Static Beta) (Note 3) (Figure 3) hFE VCE = 3V I C = 10mA - 100 - - IC = 1mA 40 100 - - IC = 10µA-5 4- - Input Offset Current for Matched Pair Q1 and Q2. |IIO1 - IIO2| (Note 3) (Figure 4) VCE = 3V, IC = 1mA - 0.3 2 µA Base-to-Emitter Voltage (Note 3) (Figure 5) VBE VCE = 3V I E = 1mA - 0.715 - V IE = 10mA - 0.800 - V Magnitude of Input Offet Voltage for Differential Pair |VBE1 - VBE2 | (Note 3) (Figures 5, 7) VCE = 3V, IC = 1mA - 0.45 5 mV Magnitude of Input Offset Voltage for Isolated Transistors |VBE3 - VBE4 |, |VBE4 - VBE5 |, |VBE5 - VBE3 | (Note 3) (Figures 5, 7) VCE = 3V, IC = 1mA - 0.45 5 mV Temperature Coefficient of Base-to-Emitter Voltage (Figure 6) VCE = 3V, IC = 1mA - -1.9 - mV/ oC Collector-to-Emitter Saturation Voltage V CES IB = 1mA, IC = 10mA - 0.23 - V Temperature Coefficient: Magnitude of Input Off- set Voltage (Figure 7) VCE = 3V, IC = 1mA - 1.1 - µV/oC DYNAMIC CHARACTERISTICS Low Frequency Noise Figure (Figure 9) NF f = 1kHz, V CE = 3V, IC = 100µA, Source Resistance = 1kΩ - 3.25 - dB Low Frequency, Small Signal Equivalent Circuit Characteristics Forward Current Transfer Ratio (Figure 11) hFE f = 1kHz, VCE = 3V, IC = 1mA - 110 - - Short Circuit Input Impedance (Figure 11) hIE f = 1kHz, VCE = 3V, IC = 1mA - 3.5 - k Ω ∆ V BE ∆ V IO CA3045, CA3046
- Actual forcing current is via the emitter for this test.
FIGURE 1. TYPICAL COLLECTOR-TO-BASE CUTOFF CURRENT FIGURE 2. TYPICAL COLLECTOR-TO-EMITTER CUTOFF FIGURE 3. TYPICAL STATIC FORWARD CURRENT TRANSFER
1 AND Q2 vs
FIGURE 4. TYPICAL INPUT OFFSET CURRENT FOR
0.01 INPUT OFFSET CURRENT ( µA)
All Intersil semiconductor products are manufactured, assembled and tested underISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with- out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web sitewww.intersil.com Sales Office Headquarters NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (321) 724-7000 FAX: (321) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee
1130 Brussels, Belgium
TEL: (32) 2.724.2111 ASIA Intersil (Taiwan) Ltd. 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029 CA3045, CA3046