C1888CT

UCC1888 TI | Alldatasheet

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Technical content

Off-line Power Supply Controller

• Transformerless Off-line Power Supply
• Wide 100VDC to 400VDC Allowable Input Range
• Fixed 5VDC or Adjustable Low Voltage Output
• Output Sinks 200mA, Sources 150mA Into a MOSFET Gate
• Uses Low Cost SMD Inductors
• Short Circuit Protected
• Optional Isolation Capability The UCC3888 controller is optimized for use as an off-line, low power, low voltage, regulated bias supply. The unique circuit topology utilized in this device can be visualized as two cascaded flyback converters, each operating in the discontinu- ous mode, both driven from a single external power switch. The significant benefit of this approach is the ability to achieve voltage conversion ratios as high as 400V to 2.7V with no transformer and low internal losses. The control algorithm utilized by the UCC3888 sets the switch on time inversely proportional to the input line voltage and sets the switch off time inversely propor- tional to the output voltage. This action is automatically controlled by an internal feedback loop and reference. The cascaded configuration allows a voltage conver- sion from 400V to 2.7V to be achieved with a switch duty cycle of 7.6%. This topol- ogy also offers inherent short circuit protection since as the output voltage falls to zero, the switch off time approaches infinity. The output voltage is set internally to 5V. It can be programmed for other output voltages with two external resistors. An isolated version can be achieved with this topology as described further in Unitrode Application Note U-149. UCC1888 UCC2888 UCC3888 FEATURES DESCRIPTION OPERATION With reference to the application diagram below, when input voltage is first applied, the current through RON into TON is directed to VCC where it charges the external capacitor, C3, connected to VCC . As voltage builds on VCC , an internal undervol- tage lockout holds the circuit off and the output at DRIVE low until VCC reaches 8.4V. At this time, DRIVE goes high turning on the power switch, Q1, and redirect- ing the current into T ON to the timing capacitor, CT. CT charges to a fixed threshold with a current ICHG =0.8 • (VIN - 4.5V)/RON . Since DRIVE will only be high for as long as CT charges, the power switch on time will be inversely proportional to line voltage. This provides a constant (line voltage) • (switch on time) product. Note: This device incorporates patented technology used under license from Lambda Electronics, Inc. TYPICAL APPLICATION UDG-96013

OPERATION (cont.) At the end of the on time, Q1 is turned off and the current through RON is again diverted to VCC . Thus the current through RON , which charges CT during the on time, con- tributes to supplying power to the chip during the off time. The power switch off time is controlled by the discharge of CT which, in turn, is programmed by the regulated out- put voltage. The relationship between CT discharge cur- rent, IDCHG , and output voltage is illustrated as follows: Region 1. When VOUT = 0, the off time is infinite. This feature provides inherent short circuit protec- tion. However, to ensure output voltage startup when the output is not a short, a high value resistor, R S, is placed in parallel with CT to establish a minimum switching frequency. Region 2. As VOUT rises above approximately 0.7V to its regulated value, IDCHG is defined by ROFF , and is equal to: IDCHG = (VOUT - 0.7V) / ROFF As VOUT increases, IDCHG increases reducing off time. The operating frequency increases and VOUT rises quickly to its regulated value. Region 3. In this region, a transconductance amplifier re- duces IDCHG in order to maintain a regulated VOUT . Region 4. If VOUT should rise above its regulation range, IDCHG falls to zero and the circuit returns to the minimum frequency established by RS and C T. The range of switching frequencies is established by R ON , ROFF , RS, and CT as follows: Frequency = 1/(TON + TOFF ) TON = RON • CT • 4.6 V/(VIN - 4.5V) TOFF (max) = 1.4 • RS • CT Regions 1 and 4 TOFF = ROFF • CT • 3.7V /(VOUT - 0.7V) Region 2, excluding the effects of RS which have a minimal impact on TOFF . The above equations assume that VCC equals 9V. The voltage at TON increases from approximately 2.5V to 6.5V while CT is charging. To take this into account, VIN is adjusted by 4.5V in the calculation of TON . The voltage at TOFF is approximately 0.7V. DESIGN EXAMPLE The UCC3888 regulates a 5 volt, 1 Watt nonisolated DC output from AC inputs between 80 and 265 volts. In this ex- ample, the IC is programmed to deliver a maximum on time gate drive pulse width of 2.2 microseconds which occurs at 80 VAC. The corresponding switching frequency is approximately 100kHz at low line, and overall efficiency is ap- proximately 50%. Additional design information is available in Unitrode Application Note U-149.UDG-96014

PARAMETER TEST CONDITIONS MIN TYP MAX UNITS General VCC Zener Voltage I CC < 1.5mA 8.6 9.0 9.3 V Startup Current V OUT = 0 150 250 µA Operating Current I(VCC )V CC = VCC (zener) – 100mV, F = 150kHz 1.2 2.5 mA Under-Voltage-Lockout Start Threshold V OUT = 0 8.0 8.4 8.8 V Minimum Operating Voltage after Start VOUT = 0 6.0 6.3 6.6 V Hysteresis V OUT = 0 1.8 V Oscillator Amplitude V CC = 9V 3.5 3.7 3.9 V C T to DRIVE high Propagation Delay Overdrive = 0.2V 100 200 ns C T to DRIVE low Propagation Delay Overdrive = 0.2V 50 100 ns Driver VOL I = 20mA, V CC = 9V 0.15 0.4 V I = 100mA, VCC = 9V 0.7 1.8 V VOH I = −20mA, VCC = 9V 8.5 8.8 V I = −100mA, VCC = 9V 6.1 7.8 V Rise Time C LOAD = 1nF 35 70 ns Fall Time C LOAD = 1nF 30 60 ns Line Voltage Detection Charge Coefficient: ICHG / I(TON ) VCT = 3V, DRIVE = High, I(T ON ) = 1mA 0.73 0.79 0.85 Minimum Line Voltage for Fault R ON = 330k 60 80 100 V Minimum Current I(TON ) for Fault R ON = 330k 220 µA On Time During Fault C T = 150pF, VLINE = Min − 1V 2 µs Oscillator Restart Delay after Fault 0.5 ms VOUT Error Amp VOUT Regulated 5V (ADJ Open) V CC = 9V, IDCHG = I(TOFF )/2 4.5 5.0 5.5 V Discharge Ratio: IDCHG / I(TOFF )I ( T OFF ) = 50µA 0.95 1.01 1.07 Voltage at TOFF I(TOFF ) = 50µA 0.6 0.95 1.3 V Regulation gm (Note 1) Max I DCHG = 50µA2 . 4 m A / V Max IDCHG = 125µA 1.9 4.1 7.0 mA/V Unless otherwise stated, these specifications hold for TA = 0°C to 70°C for the UCC3888, -40°C to +85°C for the UCC2888, and -55°C to +125°C for the UCC1888. No load at DRIVE pin (CLOAD =0).

ELECTRICAL CHARACTERISTICS

DIL-8, SOIC-8 (Top View) N or J, D Package CONNECTION DIAGRAM Note: Unless otherwise indicated, voltages are referenced to ground and currents are positive into, negative out of, the speci- fied terminals. ABSOLUTE MAXIMUM RATINGS UCC1888 UCC2888 UCC3888 Note 1: gm is defined as ΔIDCHG ΔVOUT for the values of VOUT when VOUT is in regulation. The two points used to calculate gm are for IDCHG at 65% and 35% of its maximum value.

ADJ: The ADJ pin is used to provide a 5V regulated sup- ply without additional external components. Other output voltages can be obtained by connecting a resistor divider between V OUT , ADJ and GND. Use the formula VOUT = 2.5V • R1 + R2 where R1 is connected between VOUT and ADJ, and R2 is connected between ADJ and GND. R1 || R2 should be less than 1kΩ to minimize the effect of the temperature coefficient of the internal 30k resistors which also connect to V OUT , ADJ, and GND. See Block Diagram. C T (timing capacitor): The signal voltage at CT has a peak-to-peak swing of 3.7V for 9V VCC . As the voltage at C T crosses the oscillator upper threshold, DRIVE goes low. As the voltage on CT crosses the oscillator lower threshold, DRIVE goes high. DRIVE: This output is a CMOS stage capable of sinking 200mA peak and sourcing 150mA peak. The output volt- age swing is 0 to V CC . GND (chip ground): All voltages are measured with re- spect to GND. TOFF (regulated output control): TOFF sets the dis- charge current of the timing capacitor through an external resistor connected between V OUT and TOFF . TON (line voltage control): TON serves three functions. When C T is discharging (off time), the current through TON is routed to VCC. When CT is charging (on time), the current through TON is split 80% to set the CT charge time and 20% to sense minimum line voltage which oc- curs for a TON current of 220µA. For a minimum line volt- age of 80V, RON is 330kΩ . The C T voltage slightly affects the value of the charge current during the on time. During this time, the voltage at the TON pin increases from 2.5V to 6.5V. VCC (chip supply voltage): The supply voltage of the device at pin VCC is internally clamped at 9V. The device needs an external supply, from a source such as the rec- tified AC line or derived from the switching circuit. Pre- cautions must be taken to ensure that total ICC does not exceed 8mA. VOUT (regulated output): The VOUT pin is directly con- nected to the power supply output voltage. When VOUT is greater than VCC , VOUT bootstraps VCC . UCC1888 UCC2888 UCC3888 PIN DESCRIPTIONS BLOCK DIAGRAM UDG-96015

7 CONTINENTAL BLVD. • MERRIMACK, NH 03054 TEL. (603) 424-2410 • FAX (603) 424-3460 UCC1888 UCC2888 UCC3888 TYPICAL CHARACTERISTICS CURVES

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