C122F1 ONSEMI | Alldatasheet

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Technical content

Features

  • Glass Passivated Junctions and Center Gate Fire for Greater Parameter Uniformity and Stability
  • Small, Rugged, Thermowatt Construction for Low Thermal Resistance, High Heat Dissipation and Durability
  • Blocking V oltage to 200 V olts
  • Pb−Free Packages are Available* MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Rating Symbol Value Unit Peak Repetitive Off−State Voltage (Note 1) (TJ = 25 to 100°C, Sine Wave, 50 to 60 Hz; Gate Open) C122F1 C122B1 VDRM, VRRM 200 V On-State RMS Current (180° Conduction Angles; TC = 75°C) IT(RMS) 8.0 A Peak Non-Repetitive Surge Current (1/2 Cycle, Sine Wave, 60 Hz, T C = 75°C) ITSM 90 A Circuit Fusing Considerations (t = 8.3 ms) I2t 34 A2s Forward Peak Gate Power (Pulse Width = 10 /C0109s, TC = 70°C) PGM 5.0 W Forward Average Gate Power (t = 8.3 ms, TC = 70°C) PG(AV) 0.5 W Forward Peak Gate Current (Pulse Width = 10 /C0109s, TC = 70°C) IGM 2.0 A Operating Junction Temperature Range TJ −40 to +125 °C Storage Temperature Range Tstg −40 to +150 °C Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. V DRM and VRRM for all types can be applied on a continuous basis. Ratings apply for zero or negative gate voltage; however, positive gate voltage shall not be applied concurrent with negative potential on the anode. Blocking voltages shall not be tested with a constant current source such that the voltage ratings of the devices are exceeded. *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com SCRs

8 AMPERES RMS

K G A TO−220AB CASE 221A STYLE 3 PIN ASSIGNMENT Anode Gate Cathode

4 Anode

ORDERING INFORMATION

C122F1 TO220AB 500 Units / Box C122B1 TO220AB 500 Units / Box A = Assembly Location Y = Year W = Work Week C122F1 = Device Code G = Pb−Free Package AKA = Diode Polarity MARKING DIAGRAM 2 3 A YW C122F1G AKA C122F1G TO220AB (Pb−Free)

500 Units / Box

(Pb−Free)

C122F1, C122B1 http://onsemi.com THERMAL CHARACTERISTICS Characteristic Symbol Max Unit Thermal Resistance, Junction−to−Case R/C0113JC 1.8 °C/W Thermal Resistance, Junction−to−Ambient R/C0113JA 62.5 °C/W Maximum Lead Temperature for Soldering Purposes 1/8 in. from Case for 10 Seconds TL 260 °C ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted.) Characteristic Symbol Min Typ Max Unit OFF CHARACTERISTICS Peak Repetitive Forward or Reverse Blocking Current (VAK = Rated VDRM or VRRM, Gate Open) T C = 25°C TC = 125°C IDRM, IRRM 0.5 /C0109A mA ON CHARACTERISTICS Peak On−State Voltage (Note 2) (ITM = 16 A Peak, TC = 25°C) VTM − − 1.83 V Gate Trigger Current (Continuous dc) (VAK = 12 V, RL = 100 /C0087)T C = 25°C TC = −40°C IGT mA Gate Trigger Voltage (Continuous dc) (VAK = 12 V, RL = 100 /C0087)T C = 25°C TC = −40°C VGT 1.5 2.0 V Gate Non−Tri gger Voltage (Continuous dc) (VAK = 12 V, RL = 100 /C0087, TC = 125°C) VGD 0.2 − − V Holding Current (VAK = 12 Vdc, Initiating Current = 200 mA, Gate Open) T C = 25°C TC = −40°C IH mA Turn-Off Time (VD = Rated VDRM) (ITM = 8 A, IR = 8 A) tq − 50 − /C0109s DYNAMIC CHARACTERISTICS Critical Rate−of−Rise of Off−State Voltage (VAK = Rated VDRM, Exponential Waveform, Gate Open, TC = 100°C) dv/dt − 50 − V//C0109s 2. Pulse Test: Pulse Width ≤ 1 ms, Duty Cycle ≤ 2%.

50 TO 400 Hz

Figure 1. Current Derating (Half−Wave) Figure 2. Current Derating (Full−Wave) Figure 3. Maximum Power Dissipation Figure 4. Maximum Power Dissipation

C122F1, C122B1 http://onsemi.com PACKAGE DIMENSIONS TO−220AB CASE 221A−07 ISSUE AA STYLE 3: PIN 1. CATHODE 2. ANODE 3. GATE 4. ANODE NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED. DIM MIN MAX MIN MAX MILLIMETERSINCHES A 0.570 0.620 14.48 15.75 B 0.380 0.405 9.66 10.28 C 0.160 0.190 4.07 4.82 D 0.025 0.035 0.64 0.88 F 0.142 0.147 3.61 3.73 G 0.095 0.105 2.42 2.66 H 0.110 0.155 2.80 3.93 J 0.014 0.022 0.36 0.55 K 0.500 0.562 12.70 14.27 L 0.045 0.060 1.15 1.52 N 0.190 0.210 4.83 5.33 Q 0.100 0.120 2.54 3.04 R 0.080 0.110 2.04 2.79 S 0.045 0.055 1.15 1.39 T 0.235 0.255 5.97 6.47 U 0.000 0.050 0.00 1.27 A K L V G D N Z H Q FB 123 −T− SEATING PLANE S R J U T C ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION N. American Technical Support: 800−282−9855 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Phone: 81−3−5773−3850 C122F1/D LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 61312, Phoenix, Arizona 85082−1312 USA Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative.