BSS91 PHILIPS | Alldatasheet
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© Direct interface to C-MOS, TTL, ete. © High-speed switching - © No secondary breakdown. QUICK REFERENCE DATA Drain-source voltage Vos max. 200 V Drain current (DC) Ip max. 350 mA Total power dissipation up to Tease = 25 °C Prot max. 1.5 W Drain-source ON-resistance oo rae Ip = 400 mA; VGs = 2 i b= 100 mA: Vas = 10V Roson max, 6.0.2 Transfer admittance rIC5 Ip= A; Vps = 25 V min, D = 400 mA; Vps = 25 W¥fsl typ. 380 mS MECHANICAL DATA Dimensions in mm Fig. 1 TO-18, Pinning 146 1* source max ¥ ase7] 2= gate S. Hi 2 3=drain KES 4 Y A}. 4B imax ‘ AG oS /) _ SE + 1 ss ; a 37 [254 Liss 12,7min nwone aa le (58 -» August 1988 545
Limiting values in accordance with the Absolute Maximum System (IEC 134) Drain-source voltage Vos max. 200 V Gate-source voltage (open drain) +VGso max. 20 Vv Drain current (DC) Ip max. 350 mA Drain current (peak) lpm max. 1.4 A Total power dissipation up to Tamb = 25°C Prot max. 04W Tease = 25°C Prot max. 1.5 W ‘Storage temperature range Tstg —55 to+150 OC Junction temperature Tj max. 150 °C THERMAL RESISTANCE From junction to ambient Rthie = 310 KW From junction to case Rthjie = 83 K/W CHARACTERISTICS Tj = 25 OC unless otherwise specified Drain-source breakdown voltage Ip = 10 nA; Vgs = 0 V(BR)Dgg min. 200 V Drain-source leakage current Vps = 60 V; Vas =0 Ipss max. 200 nA Vps = 200 V; Veg =0 Iss typ. 100 nA max. 10 pA Gate-source leakage current VGs=20V; Vps=0 less max. 100 nA Gate threshold voltage ayia Vesith) min. 08 Vv Ip= = D= 1 mA; Vps = Ves max. 28V Drain-source ON-resistance typ. 452 Ip = 400 mA; Veg = 10 V Roson mx 602 Transfer admittance = ma min, 140 mS. Ip = 400 mA; Vps = 25 V Ivfst typ. 350 mS Input capacitance at f = 1 MHz; = ; - ; typ. 45 pF Vps = 25 V; Veg =0 Ciss max. 60 pF Output capacitance at f= 1 MHz; =25V: 5 typ. 15 pF Vps = 25 V; Vas =0 Coss ne 25 oF Feedback capacitance at f = 1 MHz; = ; = typ. 3.5 pF Vos = 25 V; Veg = 0 Crss ox. 10 pF Switching times (see Figs 2 and 3) 1p. 5 ns Ip = 300 mA; Vpp = 50 V; Veg = Oto 10 V . by) ™ cl) Se ° ton max, 15 ns ‘typ. 15 ns tatt max, 25 ns
646 August 1988
N-channel enhancement mode vertical D-MOS transistor BSS91 Voo = 80¥ eur 30% ov | ourrur o Ip 10% son rom ott rz007r3.1 . yase775 Fig. 2 Switching time test circuit. Fig. 3 Input and output waveforms. August 1988 547