BSC004NE2LS5 | DigiCamel IC Datasheet

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—_— secon Giineon OptiMOS™ 5 Power-Transistor, 25 V ITDSON-8 FL (enlarged source interconnection)| Features <j A * Optimized for OR-ing application + Very low on-resistance Rosjon) @ Ves=4.5 V 1 5 + 100% avalanche tested 23 7 + Superior thermal resistance Y Sa + N-channel + Pb-free lead plating; ROHS compliant Pe : + Halogen-free according to IEC61249-2-21 2s Product validation Fully qualified according to JEDEC for Industrial Applications rain Fin 58 Table1 Key Performance Parameters ww (bok smote: PINTS @ RoHS BSCOO4NE2LS5 PG-TDSON-8 FL O4NE2LS5 [le Final Data Sheet 1 Rev. 2.1, 2021-03-08

OptiMOS™ 5 Power-Transistor, 25 V ¢ Infi neon BSCO004NE2LS5 Table of Contents Final Data Sheet 2 Rev. 2.1, 2021-03-08

OptiMOS™ 5 Power-Transistor, 25 V nrineon BSCO04NE2LS5

1 Maximum ratings

at Ta=25 °C, unless otherwise specified Table 2__ Maximum ratings Paramet ymeot [—taues Note / Test Condit arameter [Min. | ote / Test Condition Typ. Max. |

479 Ves=10 V, Tc=25 °C

2 Thermal characteristics

Table 3 Thermal characteristics Paramet symbol Note / Test Condit arameter ymbol [Min. | jlote / Test Condition Tye. Max. | Thermal resistance, junction - case, ey bottom ee ee ca : wma resistance, junction - case, ne | | ao ow . Device on PCB, 2 6 om? cooling area Fon Fro. *) Rating refers to the product only with datasheet specified absolute maximum values, maintaining case temperature as specified. For other case temperatures please refer to Diagram 2, De-rating will be required based on the actual environmental conditions. 2) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm? (one layer, 70 ym thick) copper area for drain connection. PCB is vertical in still air. 3) See Diagram 3 for more detailed information ” See Diagram 13 for more detailed information Final Data Sheet 3 Rev. 2.1, 2021-03-08

OptiMOS™ 5 Power-Transistor, 25 V nrineon BSCO004NE2LS5 3_ Electrical characteristics at Tj=25 °C, unless otherwise specified Table 4 Static characteristics Paramet symbol Note / Test Condit ‘arameter mbol lote est Condition ymbot iin. [Typ [Max._| Drain-source breakdown voltage [Veaoss [25 |- |- |v | Ves=0 V, lb=1 mA Gate threshold voltage Vos=Ves, 250 HA Zero gate voltage drain current lees | oo 1a ye35 Vv ay My pat3s sc Gate-source leakage current licss [= ——«|10—s[t00. [na Ves=16 V, Vos=0 V . . 0.40 {0.45 Ves=10 V, Ib=30 A Drain-source on-state resistance roam [FRA B88 Ima | Ves=4.5 V, Ib=30 A Transconductance lo [- —s fa30s s/s ss [Vos|22|/o|Ros(on)max, Ib=30 A Table 5 Dynamic characteristics Paramet yma [taut Note / Test Condit ‘arameter [Min. | ote est Condition Typ. Max. | Input capacitance [Css [= =| 44000 |- [pF _| Vas=0 V, Vos=12.5 V, 1 MHz Output capacitance a 3600 |- [pF | Ves=0 V, Vos=12.5 V, 1 MHz Reverse transfer capacitance Ce 3100 |- [pF | Ves=0 V, Vos=12.5 V, f©1 MHz i Vop=12.5 V, Ves=4.5 V, In=30 A, ise ti Voo=12.5 V, Ves=4.5 V, Ib=30 A, i Voo=12.5 V, Ves=4.5 V, In=30 A, . Voo=12.5 V, Ves=4.5 V, Ib=30 A, Table 6 Gate charge characteristics” Paramet symbst a a Note / Test Conditi ‘arameter [Min | lote / Test Condition Typ. [Max Gate to source charge [as - —f24 |= [nC _ | Von 12.5 V, 1o=30 A, Vos=0 to 4.5 V Gate charge at threshold [Quem - *|15 + —|n | Von 42.5 V, fo=30 A, Vos=0 to 4.5 V Gate to drain charge [Qe f/m Von 42.5 V, fo=30 A, Ves=0 to 4.5 V Switching charge [Qu [= «78 |= ———[nC_| Von 12.5 V, 1o=30 A, Vos=0 to 4.5 V Gate charge total la E185 Jn | Von 12.5 V, fo=30 A, Vos=0 to 4.5 V Gate plateau voltage [Vou > (2.2 V_[ Von 42.5 V, lo=30A, Ves=0 to 4.5 V Gate charge total la faze Jn | Von= 12.5 V, fo=30 A, Ves=0 to 10 V *) See "Gate charge waveforms” for parameter definition Final Data Sheet 4 Rev. 2.1, 2021-03-08

e OptiMOS™ 5 Power-Transistor, 25 V ¢ In fi neon BSCO004NE2LS5 Table 7 Reverse diode Paramet symbol Note / Test Condit arameter ymbo! ote / Test Condition win. [Typ._[Max._| Diode continuous forward current lis (- i[- ——s[taa [A Tc=25 °C Diode forward voltage [Vo |- «0.77 [4.0 |V__ | Vas=0 V, K=30 A, Ti=25 °C Reverse recovery charge la |- —fg0s/ Sn Va=12.5 V, Ir=ls, dir/dt=400 A/yus Final Data Sheet 5 Rev. 2.1, 2021-03-08

OptiMOS™ 5 Power-Transistor, 25 V ¢ In fi neon BSCOO4NE2LS5

4 Electrical characteristics diagrams

\\ ooo Nr \\ a 180 A a a 125 300 (Nr a = eg fo = 100 . Sa é a \\ 200 | Ne 15 a \\ a \\ eS 50 sO \\ 100 a

28 N a

a | a 9 a 0 25 50 75 100 125 150 175 200 i) 25 50 75 100 125 150 175 200 Te [°C] Tc [°C]

0 SS 10) rr a

——— H—— single pulse HHH HHH EHH —— a }—- 0.01 rh CCCHSE PES TIT Hem o08 | MMP CCT

0 SS SSS | eet) a eT

No us =r SSS ee | oe {Cocco UI El a aN SS 10° EI LI we ZLLUTINA ENT Foes TTT SSetiiimemest eet oer ei SSS See PS CMe ceaem COT Ce

2 SEH eS = Ceo nmr Cn Ce

2 PATINA 2 LUM eT TTT CET

oer | CMA UII LII Ii FH Pet INSET Bessie aoeet ect eet 40° CTU TPP TTT] Leet ecco Ee eee ew SESE Fagen CoCo ee ees eel ise ii PZT CE TI PET ee mg ON yo LL Ey 102 10" 10° 10° 10? 10° 10+ 10° 107 107 10° Vos [V] tris] Final Data Sheet 6 Rev. 2.1, 2021-03-08

( infir OptiMOS™ 5 Power-Transistor, 25 V In neon BSCO04NE2LS5 Diagram 5: Typ. output characteristics Diagram 6: Typ. drain-source on resistance

2000 NIV “477 pev- PEt

1750 th 12 ZEEE Eee) y HL 27 JS0e7 AV 40005 42S 1500 away, Leo Soap 40 MD Auneze 10 LEAZCEEEEC cee cece 207 4000 cee eee Maer (<2 0e 1250 7 EERE Eee eee eee} Wy, = oe CECE Cee Cee = / /} (| g 8 Cee eee Eee $1000 Hf Coo = PERRET Ete = = js ] ‘ TY 2 oo eee 750 f/ 7 arr | & EE Vi, COPE eee) If, Yl oa EEC 00 oor © EEEEEEEEEE EEE EEE EEE FEET 3 V, OE TETCOUoOITT) |.» BEERS

250 Yo SEEcE a

ofA oo SEE CECE ECC eE eee 0.0 05 1.0 15 2.0 25 3.0 (0) 200 400 600 800 1000 Vos [V] Io IA] To=1(Vos), T=25 °C; parameter: Ves Rosion=f(lb), T1=25 °C; parameter: Ves Diagram 7: Typ. transfer characteristics Diagram 8: Typ. drain-source on resistance

2000 I Cn oo

| EERE ECAR} 1750 aso 12 EEE CEE) a j l Sees 2 I 4500 [|175 °C EEE ECCI Eee eee} V1 / 10 EEE CE EIPC REE) So / COPECO Nee 41250 y 20S es / = os EEE RSC) = gOS CER se CE Z 000 [| a = 2 // A 8 Se SOOO ONEEEe eee) A & °} COCOONS eee 750 | 20S y/ HERRERA PBs eh ECEEE EE oa EEE CECE? PEE

500 A 4 Eee eee eee

Y, 2 ECC

250 Sf CECE

WA, CREEP EEE rece eee | S20 es ° LV oo SEE EE EEE CeCe eer reer 0 1 2 3 4 5 0 2 4 6 8 10 Ves [V] Ves [VI] Ip=f(Ves), |Vos|>2[/o|Rostonjmax; parameter: T; Ros(on)=f(Ves), l5=30 A; parameter: T; Final Data Sheet 7 Rev. 2.1, 2021-03-08

OptiMOS™ 5 Power-Transistor, 25 V Cin neon BSCO04NE2LS5 Diagram 9: Normalized drain-source on resistance Diagram 10: Typ. gate threshold voltage 2.0 2.00 LETT TTT TTT TT | LETT TTT LY LETT 1.75 OL ee DEERE ITH uy NUTT THTL TTT TEL CO |g PTW os LETT A PN & Ce NN S 2H eA 1.25 NO <a EASA UCHRRERUU NOES” ORREREREREOE OG TUTTLE AAMT HT BC eae |e NUNU

3 LETT TTT TPP TTT} é N \\|

5 oe tH er TTT TTT TTT TT Ts Js \\ & “LATTE 0.75 N g LETT € LETT 0.50 \\ os HUTT LETT TTT TTT 250 WA LETT 0.25 CCEECCCCECCEeeCCCee Cee TUTTLE TT oo LELEEEEEPEEEE EEE] | oo -80 -40 0 40 80 120 160 200 -80 -40 0 40 80 120 160 200 TPC) TPC) Roseo=H TD. B=80 A, Vos=TO Diagram 11: Typ. capacitances 10 Sooo 10! soe FERRERS EEE fj 2:..)--—--F-— F se Hau > 25.cmae FE HERE EEE EEE EEE [[o== 1786, max DELLE EEL CECC Eee eee eee POO ETT ee TET) | ELE er NII FRRE=SSRE === SE SR eo SSI ee eee Ey Sette = EEE at & 10° See Eee = / .

0 Geek EEEEEEEEE ees ye HET eT

CININ ITT TT Te , LTP NESE . / HE EES)” BEEBE EERE EE SER ES e eee LUTTE ERE EEE HEE EE eH TT | EE Re ee ee Cran Tost ants eAacaTfantall ° TUTTE TPE vo (ULEAD TET Vos [V] Vsp [V] O=(Vos): Ves=0 V; 1 MHz Final Data Sheet 8 Rev. 2.1, 2021-03-08

OptiMOS™ 5 Power-Transistor, 25 V Cin neon BSC004NE2LS5 Diagram 13: Avalanche characteristics Diagram 14: Typ. gate charge 10° or oo 10 Toe Ee ELE Jy 71 et on oY CoCo on ey ea CPU TP PP os a a a LOE er LET PM TT TTT He A TT TTT TTT TTT TTT yr Pr TT TT TMT UTM TTI ET “TATA PTT x J "| TTT TTT A eA N N eH AA ITT TT TTT TT yr ere Zw a StU Pam careatentenyca7a7csntatectn = 10 nN X A 2 es “ot g CECE eee EEE Ee 100 *o Nw CCCEECCCLV CLP CLE en 100 °C NTI 4 y CCC CCU NCI HA LETT TT IN TTT NTT HA \\| Ni LT TTT TTT AT TT TT CTE TIT TNT TNT EECCA Eee Kt NI o Leper iN N SF ASRS N TIA TTT TTT Ty ee TT TWIT TTT TTT Ty eT TAT TT eee 40° N\\ rp AB 10° 10° 10 10° 10* 0 40 80 120 160 200 240 280 tav [us] Qeate [NC] Tos=t Ona), OPO A pulsed, T=25 °C; parameter Vo “THT TTT TTT f° ar Ve na Q, AUT oo HTT We = LAT eA eZ Eos LI VA TAT Lf UAT TTT “TPP TTEETETTUCIUTETII TITEL LETTE | tS -80 -40 to) 40 80 120 160 200 TPC] Final Data Sheet 9 Rev. 2.1, 2021-03-08

OptiMOS™ 5 Power-Transistor, 25 V nrineon BSCO04NE2LS5

5 Package Outlines

Figure 2. Outline Boardpads (TDSON-8 FL)

OptiMOS™ 5 Power-Transistor, 25 V ¢ | nrineon BSCO04NE2LS5

Revision History

Revision: 2021-03-08, Rev. 2.1 Previous Revision Revision [Date __| Subjects (major changes since last revision) 2.0 2020-04-23 |Release of final version 21 2021-03-08 |Update Id condition for EAS and VGS(th) Trademarks All referenced product or service names and trademarks are the property of their respective owners. We Listen to Your Comments Any information within this document that you feel is wrong, unclear or missing at all? Your feedback will help us to continuously improve the quality of this document. Please send your proposal (including a reference to this document) to: erratum@infineon.com Published by Infineon Technologies AG

81726 Miinchen, Germany

© 2020 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics (‘Beschaffenheitsgarantie’) . With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. In addition, any information given in this document is subject to customer's compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer's products and any use of the product of Infineon Technologies in customer's applications. The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of customer's technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with respect to such application. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. The Infineon Technologies component described in this Data Sheet may be used in life-support devices or systems and/or automotive, aviation and aerospace applications or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support, automotive, aviation and aerospace device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Final Data Sheet 12 Rev. 2.1, 2021-03-08

Product Information

BSC004NE2LS5 specifications and overview.

Summary

OptiMOS5 Power-Transistor, 25 V Rev.2.1, 2021-03-08

Description

OptiMOS5 Power-Transistor, 25 V Rev.2.1, 2021-03-08

Source title BSC004NE2LS5 Datasheet(PDF) - Infineon Technologies AG

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