BLF4G10-120

BLF4G10-120 PHILIPS | Alldatasheet

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Technical content

1. Product profile

1.1 General description

120 W LDMOS power transistor for base station applications at frequencies from

800 MHz to 1000 MHz. [1] ACPR 400 at 30 kHz resolution bandwidth [2] ACPR 600 at 30 kHz resolution bandwidth

1.2 Features

■ Typical GSM EDGE performance at frequency of 960 MHz, a supply voltage of 28 V and an IDq of 850 mA: ◆ Load power = 48 W (AV) ◆ Gain = 19 dB (typ) ◆ Efficiency = 40 % (typ) ◆ ACPR 400 = −61 dBc (typ) ◆ ACPR 600 = −72 dBc (typ) ◆ EVM rms = 1.5 % (typ) ■ Easy power control ■ Excellent ruggedness ■ High efficiency ■ Excellent thermal stability ■ Designed for broadband operation (800 MHz to 1000 MHz) ■ Internally matched for ease of use BLF4G10-120; BLF4G10S-120 UHF power LDMOS transistor Rev. 01 — 10 January 2006 Product data sheet Table 1: Typical performance RF performance at Th =2 5°C in a common base class-AB test circuit. Mode of operation f (MHz) VDS (V) PL (W) G p (dB) (typ) ηD (%) ACPR 400 (dBc) (typ) ACPR 600 (dBc) (typ) EVM rms (%) IMD3 (dBc) (typ) CW 861 to 961 28 120 19 57 - - - - GSM EDGE 861 to 961 28 48 (AV) 19 40 −61 [1] −72 [2] 1.5 - 2-tone 861 to 961 28 120 (PEP) 19 46 - - - −31 CAUTION This device is sensitive to ElectroStatic Discharge (ESD). Therefore care should be taken during transport and handling.

9397 750 14549 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 — 10 January 2006 2 of 14 Philips Semiconductors BLF4G10-120; BLF4G10S-120 UHF power LDMOS transistor

1.3 Applications

■ RF power amplifiers for GSM, GSM EDGE and CDMA base stations and multicarrier applications in the 800 MHz to 1000 MHz frequency range. 2. Pinning information [1] Connected to flange 3. Ordering information 4. Limiting values Table 2: Pinning Pin Description Simplified outline Symbol BLF4G10-120 (SOT502A) 1 drain 2 gate 3 source [1] BLF4G10S-120 (SOT502B) 1 drain 2 gate 3 source [1] 1 1 sym039 1 1 sym039 Table 3: Ordering information Type number Package Name Description Version BLF4G10-120 - flanged LDMOST ceramic package; 2 mounting holes; 2 leads SOT502A BLF4G10S-120 - earless flanged LDMOST ceramic package; 2 leads SOT502B Table 4: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage - 65 V VGS gate-source voltage −0.5 +15 V ID drain current - 12 A Tstg storage temperature −65 +150 °C Tj junction temperature - 200 °C

9397 750 14549 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 — 10 January 2006 3 of 14 Philips Semiconductors BLF4G10-120; BLF4G10S-120 UHF power LDMOS transistor 5. Thermal characteristics 6. Characteristics 7. Application information

7.1 Ruggedness in class-AB operation

The BLF4G10-120 and BLF4G10S-120 are capable of withstanding a load mismatch corresponding to VSWR = 10 : 1 through all phases under the following conditions: V DS = 28 V; IDq = 850 mA; PL = 120 W (CW); f = 960 MHz. Table 5: Thermal characteristics Symbol Parameter Conditions Min Typ Max Unit R th(j-case) thermal resistance from junction to case Tcase =8 0°C PL = 60 W - 0.76 0.85 K/W PL = 120 W - 0.65 0.74 K/W Table 6: Characteristics Tj=2 5°C; unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit V(BR)DSS drain-source breakdown voltage VGS =0V ; ID = 0.9 mA 65 - - V VGS(th) gate-source threshold voltage VDS = 10 V; ID = 180 mA 2.5 3.1 3.5 V VGSq gate-source quiescent voltage VDS = 28 V; ID = 900 mA 2.7 3.2 3.7 V IDSS drain leakage current V GS =0V ; VDS =2 8V - - 3 µA IDSX drain cut-off current V GS =V GS(th)+6V ; VDS =1 0V 27 30 - A IGSS gate leakage current V GS = 15 V; VDS = 0 V - - 300 nA gfs forward transconductance V DS =1 0V ; ID =1 0A - 9 . 0 - S R DS(on) drain-source on-state resistance VGS =V GS(th)+6 V ; ID =6A - 0.09 - Ω C rs feedback capacitance V GS =0V ; VDS =2 8V ; f=1M H z - 2.5 - pF Table 7: Application information Mode of operation: 2-tone (100 kHz tone spacing); f = 960 MHz. VDS =2 8V ; IDq = 850 mA; Tcase =2 5°C; unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit G p power gain P L(PEP) = 120 W 18 19 - dB IRL input return loss P L(PEP) = 120 W - −8 −5d B ηD drain efficiency P L(PEP) = 1 2 0 W 4 44 6- % IMD3 third order intermodulation distortion PL(PEP) = 120 W - −31 −27 dBc

9397 750 14549 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 — 10 January 2006 4 of 14 Philips Semiconductors BLF4G10-120; BLF4G10S-120 UHF power LDMOS transistor VDS = 28 V; IDq = 850 mA; Tcase =2 5°C; f = 960 MHz VDS =2 8V ; IDq = 850 mA; Tcase =2 5°C; f = 960 MHz Fig 1. One-tone CW power gain and drain efficiency as functions of load power; typical values Fig 2. Two-tone CW power gain and drain efficiency as functions of peak envelope load power; typical values VDS = 28 V; IDq = 850 mA; Tcase =2 5°C; f = 960 MHz VDS =2 8V ; Tcase =2 5°C; f = 960 MHz (1) IDq = 650 mA (2) IDq = 750 mA (3) IDq = 850 mA (4) IDq = 950 mA Fig 3. Intermodulation distortion as a function of peak envelope load power; typical values Fig 4. Third order intermodulation distortion as a function of peak envelope load power; typical values PL (W) 0 200 15050 100 001aac400 18.5 40 17.5 19.5 20.5 G p (dB) 16.5 G p ηD (%) ηD PL(PEP) (W) 0 300 200100 001aac401 20 60 G p (dB) G p hD (%) hD 001aac402 PL(PEP) (W) 0 300 200100 -40 -60 -20 IMD3 IMD5 IMD7 IMD (dBc) -80 001aac403 PL(PEP) (W) 0 300 200100 -40 -60 -20 IMD3 (dBc) -80

9397 750 14549 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 — 10 January 2006 5 of 14 Philips Semiconductors BLF4G10-120; BLF4G10S-120 UHF power LDMOS transistor VDS = 28 V; IDq = 850 mA; Tcase =2 5°C; f = 960 MHz VDS =2 8V ; IDq = 850 mA; Tcase =2 5°C; f = 960 MHz Fig 5. GSM EDGE power gain and drain efficiency as functions of average load power; typical values Fig 6. GSM EDGE ACPR at 400 kHz and at 600 kHz as functions of average load power; typical values VDS = 28 V; IDq = 850 mA; Tcase =2 5°C; f = 960 MHz VDS =2 8V ; IDq = 850 mA; Tcase =2 5°C; f = 960 MHz Fig 7. GSM EDGE rms EVM as a function of average load power; typical values Fig 8. GSM EDGE ACPR at 400 kHz and rms EVM as functions of drain efficiency; typical values PL(AV) (W) 08 0 6020 40 001aac404 19 40 G p (dB) ηD (%) G p ηD PL(AV) (W) 08 0 6020 40 001aac405 -75 -65 -55 ACPR (dBc) -85 ACPR 400 ACPR 600 PL(AV) (W) 08 0 6020 40 001aac406 EVM rms (%) 001aac407 ηD (% ) 06 0 4020 −61 −63 −59 3 −57 ACPR (dBc) EVM (%) −65 ACPR 400 EVM rms

xxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxxxxx xxxxxxxxxx xxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxx xx xxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxx xxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxx xxxxxx xx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxx xxxxx x x 9397 750 14549 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 — 10 January 2006 6 of 14 Philips Semiconductors BLF4G10-120; BLF4G10S-120 UHF power LDMOS transistor 8. Test information See Table8 for list of components. Fig 9. Class-AB test circuit for operation at 960 MHz L11 L12 R1 R2 R3 +VG L7 L8 C5C7 C11 C14 C15 C13 C12 C17 C18 C10 L9 L10 C16C1 VDD RF outRF in 001aac408

xxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx x xxxxxxxxxxxxxx xxxxxxxxxx xxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxx xx xxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxx xxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxxxxxxxxxxxx xxxxxx xx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxx xxxxx x x 9397 750 14549 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 — 10 January 2006 7 of 14 Philips Semiconductors BLF4G10-120; BLF4G10S-120 UHF power LDMOS transistor The components are situated on one side of the copper-clad Printed-Circuit Board (PCB) with Duroid dielectric (εr = 2.5), thickness 31 mils. The other side is unetched and serves as a ground plane. See Table8 for list of components. Fig 10. Component layout for 960 MHz test circuit C1 C16 L7 L8 R1 L1 +VG L9 L10 C14 C11C7 C5 C15 C12 C13 C10C4 C17 VDD C18 L11 L12 001aac409

9397 750 14549 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 — 10 January 2006 8 of 14 Philips Semiconductors BLF4G10-120; BLF4G10S-120 UHF power LDMOS transistor [1] American Technical Ceramics type 100B or capacitor of same quality. [2] Mounted flat. [3] Low ESR. [4] Striplines are on a double copper-clad Ultralam 2000 PCB (ε r = 2.5); thickness = 31 mils. Table 8: List of components (seeFigure9 andFigure10) Component Description Value Dimensions C1 multilayer ceramic chip capacitor [1] 30 pF C2, C12 multilayer ceramic chip capacitor[1] 47 pF C3, C13 multilayer ceramic chip capacitor[1] 300 pF C4 multilayer ceramic chip capacitor [1] 6.2 pF C5 multilayer ceramic chip capacitor [1] 7.5 pF C6, C7, C11, C15 trimmer capacitors (Tekelec) [2] 0.8 pF to 8 pF C8 multilayer ceramic chip capacitor 20 nF C9 tantalum capacitor 10 µF; 35 V C10 multilayer ceramic chip capacitor [1] 6.8 pF C14 multilayer ceramic chip capacitor [1] 5.1 pF C16 multilayer ceramic chip capacitor [1] 56 pF C17 tantalum capacitor [3] 10 µF; 35 V C18 electrolytic capacitor 220 µF; 63 V L1 ferrite bead (long) grade 4S2 L2 3 turn inductor ID 4.5 mm, Cu-wire diameter 1 mm L3 4 turn inductor ID 3 mm, Cu-wire diameter 1 mm L4 ferrite bead (short) grade 4S2 L5 stripline [4] Z0 =5 0Ω (W × L) 2 mm× 17.2 mm L6 stripline [4] Z0 =5 0Ω (W × L) 2 mm× 25.4 mm L7 stripline [4] Z0 =2 5Ω (W × L) 5.6 mm× 17.4 mm L8 stripline [4] Z0 =1 0Ω (W × L) 16 mm× 10.2 mm L9 stripline [4] Z0 =1 0Ω (W × L) 16 mm× 10.2 mm L10 stripline [4] Z0 =2 5Ω (W × L) 5.6 mm× 17.4 mm L11 stripline [4] Z0 =5 0Ω (W × L) 2 mm× 25.4 mm L12 stripline [4] Z0 =5 0Ω (W × L) 2 mm× 17.2 mm R1 SMD resistor 8.2 Ω ; 0.1 W R2 SMD resistor 4.7 Ω ; 0.1 W R3 metal film resistor 10 Ω ; 0.6 W

9397 750 14549 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 — 10 January 2006 9 of 14 Philips Semiconductors BLF4G10-120; BLF4G10S-120 UHF power LDMOS transistor 9. Package outline Fig 11. Package outline SOT502A REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA SOT502A 99-12-28 03-01-10 0 5 10 mm scale Flanged LDMOST ceramic package; 2 mounting holes; 2 leads SOT502A p L A F b D U 2H Q c D 1 E A C q U 1 C B M Mw 2 UNIT A mm Db 12.83 12.57 0.15 0.08 20.02 19.61 9.53 9.25 19.94 18.92 9.91 9.65 4.72 3.43 c U 2 0.25 0.5127.94 qw 2w 1F 1.14 0.89 U 1 34.16 33.91 L 5.33 4.32 p 3.38 3.12 Q 1.70 1.45 EE 1 9.50 9.30 inches 0.505 0.495 0.006 0.003 0.788 0.772 D 1 19.96 19.66 0.786 0.774 0.375 0.364 0.785 0.745 0.390 0.380 0.186 0.035 1.345 1.335 0.210 0.170 0.133 0.123 0.067 0.057 0.374 0.366 H DIMENSIONS (millimetre dimensions are derived from the original inch dimensions) w 1 ABM M M

9397 750 14549 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 — 10 January 2006 10 of 14 Philips Semiconductors BLF4G10-120; BLF4G10S-120 UHF power LDMOS transistor Fig 12. Package outline SOT502B REFERENCESOUTLINE VERSION EUROPEAN PROJECTION ISSUE DATE IEC JEDEC JEITA SOT502B 99-12-28 03-01-10 0 5 10 mm scale Earless flanged LDMOST ceramic package; 2 leads SOT502B A F b D U 2 L H Q c D 1 E D U 1 D M Mw 2 UNIT A mm Db 12.83 12.57 0.15 0.08 20.02 19.61 9.53 9.25 19.94 18.92 9.91 9.65 4.72 3.43 c U 2 0.25 w 2F 1.14 0.89 U 1 20.70 20.45 L 5.33 4.32 Q 1.70 1.45 EE 1 9.50 9.30 inches 0.505 0.495 0.006 0.003 0.788 0.772 D 1 19.96 19.66 0.786 0.774 0.375 0.364 0.785 0.745 0.390 0.380 0.186 0.135 0.0100.045 0.035 0.815 0.805 0.210 0.170 0.067 0.057 0.374 0.366 H DIMENSIONS (millimetre dimensions are derived from the original inch dimensions)

9397 750 14549 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 — 10 January 2006 11 of 14 Philips Semiconductors BLF4G10-120; BLF4G10S-120 UHF power LDMOS transistor 10. Abbreviations Table 9: Abbreviations Acronym Description ACPR Adjacent Channel Power Ratio CDMA Code Division Multiple Access CW Continuous Wave EDGE Enhanced Data rates for GSM Evolution ESR Equivalent Series Resistance EVM Error Vector Magnitude GSM Global System for Mobile communications I Dq quiescent drain current LDMOS Laterally Diffused Metal Oxide Semiconductor PEP Peak Envelope Power RF Radio Frequency SMD Surface-Mount Device VSWR Voltage Standing-Wave Ratio

9397 750 14549 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 — 10 January 2006 12 of 14 Philips Semiconductors BLF4G10-120; BLF4G10S-120 UHF power LDMOS transistor 11. Revision history Table 10: Revision history Document ID Release date Data sheet status Change notice Doc. number Supersedes BLF4G10-120_ 4G10S-120_1

20060110 Product data sheet - 9397 750 14549 -

Philips Semiconductors BLF4G10-120; BLF4G10S-120 UHF power LDMOS transistor 9397 750 14549 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 — 10 January 2006 13 of 14 12. Data sheet status [1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. [3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. 13. Definitions Short-form specification —The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 14. Disclaimers Life support —These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes —Philips Semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. 15. Trademarks Notice —All referenced brands, product names, service names and trademarks are the property of their respective owners. 16. Contact information For additional information, please visit: http://www.semiconductors.philips.com For sales office addresses, send an email to: sales.addresses@www.semiconductors.philips.com Level Data sheet status[1] Product status[2][3] Definition I Objective data Development This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. II Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. III Product data Production This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN).

© Koninklijke Philips Electronics N.V. 2006 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 10 January 2006 Document number: 9397 750 14549 Published in The Netherlands Philips Semiconductors BLF4G10-120; BLF4G10S-120 UHF power LDMOS transistor 17. Contents