Power Management

BD9524MUV

Rohm

Main Power Supply IC for Note PC (Linear Regulator Integrated)

Manufacturer: Rohm

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Description BD9524MUV is a switching regulator controller with high output current which can achieve low output voltage (2.0V～5.5V) from a wide input voltage range (7V~25V). High efficiency for the switching regulator can be realized by utilizing an external N-MOSFET power transistor. A new technology called H 3RegTM is a Rohm proprietary control method to realize ultra high transient response against load change. SLLM (Simple Light Load Mode) technology is also integrated to improve efficiency in light load mode, providing high efficiency over a wide load range. For protection and ease of use, the soft start function, variable frequency function, short circuit protection function with timer latch, over voltage protection with timer latch, and Power good function are all built in. This switching regulator is specially designed for Main Power Supply.
Features 1) 2ch H 3RegTM Switching Regulator Controller 2) Adjustable Simple Light Load Mode (SLLM), Qu iet Light Load Mode (QLLM) and Forced continuous Mode 3) Thermal Shut Down (TSD), Under Voltage Lo ck Out (UVLO), Over Current Protection (OCP), Over Voltage Protection (OVP), Short circuit protection with timer-latch (SCP) 4) Soft start function to minimize rush current during startup 5) Switching Frequency Variable (f=200KHz ～500KHz) 6) Power good circuit 7) 2ch Linear regulator 8) VQFN032V5050 package
Applications Laptop PC, Desktop PC, LCD-TV, Digital Components
Maximum Absolute Ratings (Ta=25℃) *1 Do not however exceed Pd. *2 Instantaneous surge voltage, back electromotive force and voltage under less than 10% duty cycle. *3 Reduced by 3.0mW for each increase in Ta of 1℃ over 25 ℃ (when don’t mounted on a heat radiation board ) *4 Reduced by 7.0mW for increase in Ta of 1℃ over 25 ℃. (when mounted on a board 70.0mm×70mm×1.6mm Glass-epoxy PCB which has 1 layer. (Copper foil area : 0mm 2)) *5 Reduced by 16.5mW for increase in Ta of 1℃ over 25 ℃. (when mounted on a board 70.0mm×70mm×1.6mm Glass-epoxy PCB which has 4 layers. (1 st and 4th copper foil area : 20.2mm2, 2nd and 3rd copper foil area : 5505mm2)) *6 Reduced by 36.5mW for increase in Ta of 1℃ over 25 ℃. (when mounted on a board 70.0mm×70mm×1.6mm Glass-epoxy PCB which has 4 layers. (All copper foil area : 5505mm 2)) Parameter Symbol Limits Unit Terminal voltage VIN, CTL 30 *1*2 V EXTVCC, PGOOD1, PGOOD2FB1, FB2, Is+1, Is+2, MCTL 7 *1*2 V FS1, FS2, REF1, REF2, SS1, SS2, LG1, LG2 REG1+0.3 *1*2 V BOOT1, BOOT2 35*1*2 V BOOT1-SW1, BOOT2-SW2, HG1-SW1, HG2-SW2 7 *1*2 V HG1 BOOT1+0.3 *1*2 V HG2 BOOT2+0.3 *1*2 V EN1, EN2 6 *1*2 V DGND, PGND1, PGND2 AGND±0.3 *1*2 V Power dissipation 1 Pd1 0.38 *3 W Power dissipation 2 Pd2 0.88 *4 W Power dissipation 3 Pd3 2.06 *5 W Power dissipation 4 Pd4 4.56 *6 W Operating temperature range Topr -10 ~ +100 ℃ Storage temperature range Tstg -55 ~ +150 ℃ Junction Temperature Tjmax +150 ℃ No.10030ECT06

Operating Conditions (Ta=25℃) Parameter Symbol MIN. MAX. Unit Terminal voltage VIN 7 25 V EXTVCC 4.5 5.5 V CTL -0.3 25 V EN1, EN2 -0.3 5.5 V BOOT1, BOOT2 4.5 30 V BOOT1-SW1, BOOT2-SW2, HG1-SW1, HG2-SW2 -0.3 5.5 V PGOOD1, PGOOD2 -0.3 5.5 V FS1, FS2 0.09 1.25 V REF1, REF2 1 2.75 V Is+1, Is+ 2, FB1, FB2 1.9 5.6 V MCTL -0.3 REG1+0.3 V *This product should not be used in a radioactive environment.
Electrical characteristics (unless otherwise noted, Ta=25℃ VIN=12V, CTL=5V, EN1=EN2=5V, REF1=2.5V, REF2=1.65V, FS1=FS2=0.582V) Parameter Symbol Standard Value Unit Conditions MIN. TYP. MAX. VIN standby current ISTB 70 150 250 μA CTL=5V, EN1=EN2=0V VIN bias current IIN 0 45 130 μA EXTVCC=5V Shut down mode current ISHD -10 0 10 μA CTL=0V CTL Low voltage VCTLL -0.3 - 0.8 V CTL High voltage VCTLH 2.3 - 25 V CTL bias current ICTL - 1 3 μA VCTL=5V EN Low voltage VENL -0.3 - 0.8 V EN High voltage VENH 2.3 - 5.5 V EN bias current IEN - 1 3 μA VEN=3V [5V linear regulator] REG1 output voltage VREG1 4.90 5.00 5.10 V IREG1=1mA Maximum current IREG1 200 - - mA IREG2=0mA Line Regulation REG1I - 90 180 mV VIN=7.5 to 25V Load Regulation REG1L - 30 50 mV IREG1=0 to 30mA [3.3V linear regulator] REG2 output voltage VREG2 3.27 3.30 3.33 V IREG2=1mA Maximum current IREG2 100 - - mA Line regulation REG2I - - 20 mV VIN=7.5 to 25V Load regulation REG2L - - 30 mV IREG2=0 to 100mA [5V switch block] EXTVCC input threshold voltage VCC_UVLO 4.2 4.4 4.6 V EXTVCC: Sweep up EXTVCC input delay time TVCC 2 4 8 ms Switch Resistance RVCC 1.0 2.0 Ω [Under voltage lock out block for DC/DC] REG1 threshold voltage REG1_UVLO 4.0 4.2 4.4 V REG1: Sweep up REG2 threshold voltage REG2_UVLO 2.45 2.65 2.85 V REG2: Sweep up Hysteresis voltage dV_UVLO 50 100 200 mV REG1, REG2: Sweep down [Error amplifier block] Feedback voltage 1 VFB1 REF1×2 -25m REF1×2 REF1×2 +25m V FB1 bias current IFB1 20 45 90 μA FB1=5V Output discharge resistance 1 RDISOUT1 0.5 1 3 k Ω Feedback voltage 2 VFB2 REF2×2 -25m REF2×2 REF2×2 +25m V FB2 bias current IFB2 10 30 60 μA FB2=3.3V Output discharge resistance 2 RDISOUT2 0.5 1 3 k Ω REF1, REF2 bias current IREF1, IREF2 -10 - 10 μA

Electrical characteristics - Continued (unless otherwise noted, Ta=25℃ VIN=12V, CTL=5V, EN1=EN2=5V, REF1=2.5V, REF2=1.65V, FS1=FS2=0.582V) Parameter Symbol Standard Value Unit Conditions MIN. TYP. MAX. [H3RegTM block] On Time 1 TON1 0.810 0.960 1.110 μs REF=2.5V On Time 2 TON2 0.520 0.670 0.820 μs REF=1.65V Maximum On Time TONMAX 3.5 7 14 μs Minimum Off Time TOFFMIN - 0.2 0.4 μs FS1, FS2 bias current IFS -10 0 10 μA [FET driver block] HG higher side ON resistor HGHON - 3.0 6.0 Ω HG lower side ON resistor HGLON - 2.0 4.0 Ω LG higher side ON resistor LGHON - 2.0 4.0 Ω LG lower side ON resistor LGLON - 0.5 1.0 Ω [Over Voltage Protection block] Latch Type OVP Threshold voltage VLOVP REF×2 ×1.15 REF×2 ×1.175 REF×2 ×1.20 V Latch Type OVP delay time TLOVP 50 150 300 μs [Short circuit protection block] SCP Threshold voltage VSCP REF×2× 0.66 REF×2 ×0.7 REF×2 ×0.74 V Delay time TSCP 0.5 1 2 ms [Current limit protection block] Maximum offset voltage dVSMAX 50 65 80 mV Is+1 bias current IISP1 - 2.5 10 μA Is+2 bias current IISP2 - 2.5 10 μA [Power good block] Power good low threshold VPGTHL REF×2 ×0.87 REF×2 ×0.90 REF×2 ×0.93 V Power good high threshold VPGTHH REF×2 ×1.07 REF×2 ×1.10 REF×2 ×1.13 V Power good low voltage VPGL - 0.1 0.2 V IPGOOD=1mA Power good leakage current ILEAKPG -2 0 2 μA VPGOOD=5V [Soft Start block] Charge current ISS 1.8 2.5 3.2 μA Standby voltage VSS_STB - - 50 mV [SLLM mode control block] MCTL terminal voltage 1 VCONT -0.3 - 0.3 V Continuous mode MCTL terminal voltage 2 VQLLM 1.5 - 3.0 V QL2M mode (Maximum LG off time : 50μs) MCTL terminal voltage 3 VSLLM 4.5 - REG1+0.3 V SL2M mode (Maximum LG off time : ∞) MCTL float level VMCTL 1.5 - 3.0 V
Output condition table Input Output CTL EN1 EN2 REG1(5V) REG2(3.3V) DC/DC1 DC/DC2 Low Low Low OFF OFF OFF OFF Low Low High OFF OFF OFF OFF Low High Low OFF OFF OFF OFF Low High High OFF OFF OFF OFF High Low Low ON ON OFF OFF High Low High ON ON OFF ON High High Low ON ON ON OFF High High High ON ON ON ON

Block Diagram, Application circuit *Apply the supply voltage EXTVCC pin after REG1 pin is operated. REG1 Overlap Protection Circuit Overlap Protection Circuit SL2MTM Block SL2MTM Block H3RegTM Controller Block H3RegTM Controller Block Reg 3.3V Reg Reference Block Thermal Protection CL2 SCP2 CL1 SCP1 REG1 REG1 FS2 FS1 REG1 VIN Vo2 Adjustable REG1 VIN Vo1 Adjustable VIN REG2 REG2 REG2 REG2 Timer Timer SCP2 SCP1 Short Circuit Protect Short Circuit Protect Over Voltage Protect Over Voltage Protect EN2 EN1 TSD UVLO CL2 CL1 FB2 FB1 VIN BOOT2 HG2 SW2 LG2 PGND2 BOOT1 HG1 SW1 LG1 PGND1 AGND DGND FS1 FB1 REF1 PGOOD1 Is+1 EN1 EN2 Is+2 PGOOD2 REF2 FB2 12 3 VIN CTL EXTVCC REG1 REG2 VIN 25V REG1 3.3V 30 18 27 29 28 31 32 22 23 24 26 25 REF2 FB2 REF1 FB1 REG2 MCTL2 MCTL1 SS2 SS1 Power Good Block Power Good Block FS2 12MCTL MCTL2 MCTL1 SL2M Mode Control

6 SS2 SS2

Pin Configuration
Pin Function Table PIN No. PIN name PIN Function

1 SW2 Highside FET source pin 2

2 HG2 Highside FET gate drive pin 2

3 BOOT2 HG Driver power supply pin 2

4 EN2 Vo2 ON/OFF pin (High=ON, Low=OFF)

5 PGOOD2 Vo2 Power Good Open Drain Output pin

6 SS2 Vo2 soft start pin

7 DGND Ground

8 REF2 Vo2 output voltage setting pin

9 Is+2 Current sense pin +2

10 FB2 Vo2 output voltage sense pin, current sense pin -2

11 FS2 Input pin for setting Vo2 frequency

12 MCTL Mode shift pin (Low=continuous, Middle=QLLM, High=SLLM)

13 AGND Input pin Ground

14 FS1 Input pin for setting Vo1 frequency

15 FB1 Vo2 output voltage sense pin, current sense pin -1

16 Is+1 Current sense pin +1

17 REF1 Vo1 output voltage setting pin

18 CTL Linear regulator ON/OFF pin (High=ON, Low=OFF)

19 SS1 Vo1 soft start pin

20 PGOOD1 Vo1 Power Good Open Drain Output pin

21 EN1 Vo1 ON/OFF pin (High=ON, Low=OFF)

22 BOOT1 HG Driver power supply pin 1

23 HG1 Highside FET gate drive pin 1

24 SW1 Highside FET source pin 1

25 PGND1 Lowside FET source pin 1

26 LG1 Lowside FET gate drive pin 1

27 EXTVCC Outside power supply input pin

28 REG2 3.3V linear regulator output pin

29 REG1 5V linear regulator output pin

30 VIN Power supply input pin

31 LG2 Lowside FET gate drive pin 2

32 PGND2 Lowside FET source pin 2

Reverse FIN Exposed Pad, Connect to GND 31 2 4 5 6 7 8 24 23 22 21 20 19 18 17

25 PGND1

Reference data Fig.1 wake up (Vo=5.0V) Fig.2 wake up (Vo=3.3V) Fig.4 CONT Mode (Io=0A) Fig.5 CONT Mode (Io=0.4A) Fig.6 CONT Mode (Io=1.4A) Fig.3 wake up (REG1, REG2) EN 5V/div PGOOD 5V/div SS 1V/div Vo 2V/div EN 5V/div PGOOD 5V/div SS 1V/div Vo 2V/div Vo 20mV/div IL 2A/div SW 5V/div LG 5V/div Vo 20mV/div IL 2A/div SW 5V/div LG 5V/div Vo 20mV/div IL 2A/div SW 5V/div LG 5V/div Vo 20mV/div IL 2A/div SW 5V/div LG 5V/div Vo 20mV/div IL 2A/div SW 5V/div LG 5V/div Vo 20mV/div IL 2A/div SW 5V/div LG 5V/div Vo 20mV/div IL 2A/div SW 5V/div LG 5V/div Vo 20mV/div IL 2A/div SW 5V/div LG 5V/div Vo 20mV/div IL 2A/div SW 5V/div LG 5V/div CTL 10V/div REG1 2V/div REG2 2V/div

Reference data 0.0 0.5 1.0 1.5 FS[V] ON TIME[usec] Fig.13 FS-ON TIME Vo=5.0V Vo=3.3V 0.1 100 7 1 01 31 61 92 22 5 VIN [V] IVIN [mA] Fig.17 VIN-IVIN (Io=0A, Vo1=5.0V) CONT Mode SLLM QLLM 200 400 600 800 1000 1200 FS[V] Frequency[kHz] Fig.14 FS-frequency QLLM, SLLM (3.3V) QLLM, SLLM (3.3V) CONT Mode (3.3V) CONT Mode (5.0V) VIN=12V, Vo=5.0V 100 1 10 100 1000 10000 Io [mA] efficiency [%] Fig.16 Io-efficiency (VIN=12V, Vo1=5.0V) QLLM SLLM CONT Mode 100 150 200 250 300 350 400 450 500 0.001 0.01 0.1 1 10 Io [A] frequency [KHz] CONT Mode (VIN=7) CONT Mode (VIN=12) CONT Mode (VIN=19) (VIN=7, 12, 19V) QLLM SLLM QLLM,SLLM (VIN=7) QLLM,SLLM (VIN=12) Fig.15 Io-frequency (Vo1=5.0V) QLLM,SLLM (VIN=19)

Pin Descriptions ・VIN This is the main power supply pin. The input supply voltage range is 7V to 25V. The duty cycle of BD9524MUV is determined by input voltage and control output voltage. Therefore, when VIN voltage fluctuated, the output voltage also becomes unstable. Since VIN line is also the input voltage of switching regulator, stability depends on the impedance of the voltage supply. It is recommended to establish bypass capacitor and CR filter suitable for the actual application. ・CTL When CTL pin voltage is at least 2.3V the status of the linear regulator output becomes active (REG1=5V, REG2=3.3V). Conversely, the status switches off when CTL pin voltage goes lower than 0.8V. The switching regulator doesn’t become active when the status of CTL pin is low, if the status of EN pin is high. ・EN When EN pin voltage is at least 2.3V, the status of the switching regulator becomes active. Conversely, the status switches off when EN pin voltage goes lower than 0.8V. ・REG1 This is the output pin for 5V linear regulator and also active in power supply for driver and control circuit of the inside. The standby function for REG1 is determined by CTL pin. The voltage is 5V, with 100mA current ability. It is recommended that a 10uF capacitor (X5R or X7R) be established between REG1 and GND. ・REG2 This is the output pin for 3.3V linear regulator. The standby function for REG2 is determined by CTL. The voltage is 3.3V, with 100mA current ability. It is recommended that a 10uF capacitor (X5R or X7R) be established between REG2 and GND. It is available to set REF and SS by the resistance division value from REG2 in case REF are not set from an external power supply. ・EXTVCC This is the external input pin to REG1. When EXTVCC is beyond 4.4V, it supplies REG1 as EXTVCC is the power supply. ・REF This is the setting pin for output voltage of switching regulator. It is so convenient to be synchronized to outside power supply. This IC controls the voltage in the status of 2×REF≒FB. ・FB This is the feedback pin from the output of switching regulator. This IC controls the voltage in the status of 2×REF≒FB. ・SS This is the setting pin for soft start. The rising time is determined by the capacitor connected between SS and GND, and the fixed current inside IC after it is the status of low in standby mode. It controls the output voltage till SS voltage catch up the REF pin to become the double of the SS terminal voltage. ・FS This is the input pin for setting the frequency. It is available to set it in frequency range is 200KHz to 500kHz. ・Is+ This is the sense pin for output current. In case it is connected to side of the coil resistance for sense current and the voltage is set 65mV(typ) or more higher than FB pin voltage, the switching operation turns OFF. ・PGOOD This is the open drain pin for deciding the output of switching regulator. ・MCTL This is the switching shift pin for SLLM (Simple Light Load Mode). The efficiency in SLLM mode improves in setting MCTL pin to REG1+0.3V, LG maximum OFF time is to infinity. It is in continuous mode that MCTL pin voltage is set 0.3V or less. ・AGND,DGND This is the ground pin. ・BOOT This is the power supply pin for high side FET driver. The maximum voltage range to GND pin is to 35V, to SW pin is to 7V. In switching operations, the voltage swings from (VIN+REG1) to REG1 by BOOT pin operation. ・HG This is the highside FET gate drive pin. It is operated in switching between BOOT to SW. In case the output MOS is 3ohm /the status of Hi, 2ohm/the status of Low, it is operated hi-side FET gate in high speed. ・SW This is the ground pin for high side FET drive. The maximum voltage range to GND pin is to 30V. Switching operation swings from the status of BOOT to the status of GND. ・LG This is the lowside FET gate drive pin. It is operated in switching between REG1 to PGND. In case the output MOS is 2ohm /the status of Hi, 0.5ohm/the status of Low, it is operated low-side FET gate in high speed. ・PGND This is the ground pin for low side FET drive.

Explanation of Operation The BD9524MUV is a 2ch synchronous buck regulator controller incorporating ROHM’s proprietary H3RegTM CONTROLLA control system. When VOUT drops due to a rapid load change, the system quickly restores VOUT by extending the TON time interval. Thus, it serves to improve the regulator’s transient response. Activating the Light Load Mode will also exercise Simple Light Load Mode (SLLM) control when the load is light, to further increase efficiency. H3RegTM control (Normal operation) (VOUT drops due to a rapid load change) Light Load Control (SLLM) (QLLM) *Attention: H 3RegTM CONTROLLA monitors the supplying current from capacitor to load, using the ESR of output capacitor, and realize the rapid response. Bypass capacitor used at each load (Ex. Ceramic capacitor) exercise the effect with connecting to each load side. Do not put a ceramic capacitor on C OUT side of power supply. HG output is determined by the formula above. When VOUT falls to a reference voltage (2×REF), the drop is detected, activating the H3RegTM CONTROLLA system. When VOUT drops due to a rapid load change, and the voltage remains below reference voltage after the programmed tON time interval has elapsed, the system quickly restores VOUT by extending the tON time, improving the transient response. tON= 2×REF VIN × 1 f [sec]・・・(1) In SLLM (MCTL=”High voltage”), when the status of LG is OFF and the coil current is within 0A (it flows to SW from VOUT.), SLLM function is operated to prevent output next HG. The status of HG is ON, when VOUT falls belo w reference voltage again. In QLLM (MCTL=”Hiz or Middle voltage”), when the status of LG is OFF and the coil current is within 0A (it flows to SW from VOUT.), QLLM function is operated to prevent output next HG. Then, VOUT falls below the output programmed voltage within the programmed time (typ=40μs), the status of HG is ON. In case VOUT doesn’t fall in the programmed time, the status of LG is ON forcedly and VOUT falls. As a result, he status of next HG is ON. VOUT 2×REF HG LG VOUT HG Io LG tON+α VOUT 2×REF HG LG VOUT 2×REF HG LG LoadCOUT

Timing Chart
Soft Start Function Soft start is exercised with the EN pin set high. Current control takes effect at startup, enabling a moderate output voltage “ramping start.” Soft start timing and incoming current are calculated with formulas (2) and (3) below. Soft start time (Css: Soft start capacitor; Co: Output capacitor) ・Timer Latch Type Short Circuit Protection Short protection kicks in when output falls to or below REF × 1.4 (setting voltage × 0.7). When the programmed time period elapses, output is latched OFF to prevent destruction of the IC. Output voltage can be restored either by reconnecting the EN pin or disabling UVLO. ・Over Voltage Protection ・Over current protection circuit EN SS VOUT IIN TSS Tss= REF×Css 2μA(typ) [sec] Incoming current IIN= Co×VOUT Tss [A] ・・・(2) ・・・(3) VOUT SCP EN / UVLO REF×1.4 150μs(typ) or more 150μs(typ) or less 150μs(typ) Latch VOUT REF×2.35 OVP EN / UVLO When output rise to or above REF×2.35 (output setting voltage ×1.175), output over voltage protection is exercised, and low side FET goes up maximum for reducing output.（LG=High, HG=Low）. When output falls within the programmed time (typ=150μs), it returns to the standard mode. When the programmed time period elapses, output is latched OFF to prevent destruction of the IC. Output voltage can be restored eithe r by reconnecting the EN pin or disabling UVLO. During the normal operation, when VOUT becomes less than reference voltage, HG becomes High during the time tON . However, when inductor current exceeds ILIMIT threshold, HG becomes OFF. After 2.5μsec(typ), HG becomes ON again if the output voltage is lower than the specific voltage level and IL is lower than ILIMIT level. 2.5usec tON tON HG LG IL ILIMIT tON 2×REF increase Io Vo

External Component Selection 1. Inductor (L) selection ※Passing a current larger than the inductor’s rated current will cause magnetic saturation in the inductor and decrease system efficiency. In selecting the inductor, be sure to allow enough margin to assure that peak current does not exceed the inductor rated current value. ※To minimize possible inductor damage and maximize efficiency, choose a inductor with a low (DCR, ACR) resistance. 2.Output Capacitor (C O) Selection Please give due consideration to the conditions in formula (8) below for output capacity, bear in mind that output rise time must be established within the soft start time frame. Note: Improper capacitor may cause startup malfunctions. 3. Input Capacitor (Cin) Selection A low ESR capacitor is recommended to reduce ESR loss and maximize efficiency. The inductor value is a major influence on the output ripple current. As formula (4) below indicates, the greater the inductor o r the switching frequency, the lower the ripple current. ΔIL= (VIN-VOUT)×VOUT The proper output ripple current setting is about 30% of maximum output current. ΔIL=0.3×IOUTmax. [A]・・・(5) (VIN-VOUT)×VOUT (ΔIL: output ripple current; f: switch frequency) When determining the proper output capacitor, be sure to factor in the equivalent series resistance required to smooth out ripple volume and maintain a stable output voltage range. Output ripple voltage is determined as in formula (7) below. ΔV OUT=ΔIL×ESR [V]・・・(7) (ΔIL: Output ripple current; ESR: CO equivalent series resistance) ※ In selecting a capacitor, make sure the capacitor rating allows sufficient margin relative to output voltage. Note that a lower ESR can minimize output ripple voltage. Tss: Soft start time Limit: Over current detection 2A(Typ) Input Capacitor The input capacitor selected must have low enough ESR resistance to fully support large ripple output, in order to prevent extreme over current. The formula for ripple current IRMS is given in (9) below. IRMS=IOUT× VIN(VIN-VOUT) VIN [A]・・・(9) Where VIN=2×VOUT,I R M S = IOUT ΔIL VIN IL L Co VOUT Output ripple current Output Capacitor VIN L Co VOUT Cin VIN L Co VOUT ESR Load CEXT Co+CEXT≦ TSS×(Limit-IOUT) VOUT ・・・(8)

www.rohm.com 2010.03 - Rev.C © 2010 ROHM Co., Ltd. All rights reserved. 4. MOSFET Selection 5. Setting Detection Resistance (Detect ILIMIT at the peak current) (A) High accuracy current detective circuit (use the low resistance) (B) Low loss current detective circuit (use the DCR value of inductor) (C) Low loss current detective circuit (the DCR value of inductor : high) The over current protection func tion detects the output ripple current peak value. This parameter (setting value) is determined as in formula (13) below. 65mV(typ) R ILMIT= (R: Detection resistance) VIN L Co VOUT synchronous switch main switch Pmain=PRON+PGATE+PTRAN Psyn=PRON+PGATE VOUT VIN ×RON×IOUT2+Ciss×f×VDD+ VIN2×Crss×IOUT×f IDRIVE VIN-VOUT VIN ×RON×IOUT2+Ciss×f×VDD Loss on the main MOSFET (Ron: On-resistance of FET; Ciss: FET gate capacitance; f: Switching frequency Crss: FET inverse transfer function; IDRIVE: Gate peak current) Loss on the synchronous MOSFET = ・・・(10) = ・・・(11) [A]・・・(12) ILMIT=65mV(typ)× When the over current protection is detected by DCR of inductor L, this parameter (setting value) is determined as in formula (13) below. (Application circuit:P18) r×C L (RL: the DCR value of inductor) [A]・・・(13) L r×C (RL= ) VIN L Co VOUT Current limit IL R 65mV OCP VIN L Co VOUT Current limit IL RL r C 65mV OCP (RL: the DCR value of inductor) 65mV(typ) k×RL ILIMIT= [A]・・・(14) VIN L Co VOUT IL (1-k)RL C Current limit 65mV kRL RL L k= R1+R2 = kR1C ) ,

www.rohm.com 2010.03 - Rev.C © 2010 ROHM Co., Ltd. All rights reserved. 6. Setting standard voltage (REF) R E F = ×REG2 [V]・・・(15) 7. Setting output voltage This IC is operated that output voltage is REF×2≒FB. And it is operated that output voltage is feed back to FB pin. R E F FB It is available to set the reference voltage (REF) by the resistance division value from REG2 in case REF is not set from an external powe r supply. FB H3RegTM CONTROLLA S RQ VIN REG2(3.3V) REF It is available to set the reference voltage (REF) with outside supply voltage ×2 [V] by using outside power supply voltage. H3RegTM CONTROLLA S RQ VIN REF R1+R2 H3RegTM CONTROLLA S RQ SLLM Driver CircuitSLLM VIN Output voltage VIN FB Outside voltage

I/O Equivalent Circuit 1, 24pin (SW2, SW1) 2, 23pin (HG2, HG1) 3, 22pin (BOOT2, BOOT1) 4, 21pin (EN2, EN1) 5, 20pin (PGOOD2, PGOOD1) 6, 19pin (SS2, SS1) 8, 17pin (REF2, REF1) 9, 16pin (Is+2, Is+1) 10, 15pin (FB2, FB1) 11, 14pin (FS2, FS1) 12pin (MCTL) 18pin (CTL) BOOT BOOT SW REG1 HG SW REG1 HG BOOT

I/O Equivalent Circuit 26, 31pin (LG1, LG2) 27pin (EXTVCC) 28pin (REG2) 29pin (REG1) 30pin (VIN)
Evaluation Board Circuit (Vo1=5V f1=300kHz Vo2=3.3V f2=400kHz) REG1 REG1 REG1 VIN REG1 VIN CTL EN1 EN2 REG1 REG2 EXTVCC REF1 REF2 SS1 FS1 BOOT1 HG1 SW1 LG1 PGND1 Is+1 FB1 BOOT2 HG2 SW2 LG2 PGND2 Is+2 VIN 12V C1 CTL EN1 EN2 CTL EN1 EN2 VIN REG1 REG1 REG1 REG2 3.3V EXTVCC C4REG2 REG2 R7 C5 R9 C6 C8 C7FS1 R17 C18 R25 D4 C17 REG1 VIN VIN C15 C16 SW2 R39 R40 C24 C27 VIN VIN C25 C26 SW1 BD9524MUV Vo1 R16 REG2 VIN R58 REG2 VIN C19 R35 R32 R34 R30 R47 R49 R50 R46 L2 R33 R29 R28 VO2 C12 C11 C30 C29 C10 R31 C36 C13 R15 R26 R27 R18 C37 R22 L1 R48 R44 R43 R45 C34 C23 R10 R41 R42 R11 C35 R19 R56 R55 R57 TPQ6 VO1 C22 C21 C32 C33 C20 FS2 11 MCTL DGND AGND FB2 PGOOD1 PGOOD2 C14 R24 REG1 REG1 PGOOD2 PGOOD1 C28 C31 R14 MCTL R20 R36 R21 R37 R13 R12 FS2 C9 R63 R52 R54 SS2 TPQ5

www.rohm.com 2010.03 - Rev.C © 2010 ROHM Co., Ltd. All rights reserved. DESIGNATION RATING PART No. COMPANY DESIGNATION RATING PART No. COMPANY R1 0 Ω MCR03EZHJ000 ROHM R58 1M Ω MCR03PZHZF1004 ROHM R2 0 Ω MCR03EZHJ000 ROHM R63 - - - R3 0 Ω MCR03EZHJ000 ROHM C1 10uF(25V) CM32X7R106M25A KYOCERA R4 0 Ω MCR03EZHJ000 ROHM C2 10uF(6.3V) GRM21BB10J106KD MURATA R5 0 Ω MCR03EZHJ000 ROHM C3 10uF(6.3V) GRM21BB10J106KD MURATA R6 15k Ω MCR03PZHZF1502 ROHM C4 10uF(6.3V) GRM21BB10J106KD MURATA R7 47k Ω MCR03PZHZF4702 ROHM C5 0.01uF(50V) GRM188B11H103KD MURATA R8 30k Ω MCR03PZHZF3002 ROHM C6 0.01uF(50V) GRM188B11H103KD MURATA R9 30k Ω MCR03PZHZF3002 ROHM C7 1000pF(50 V) GRM188B11H102KD MURATA R10 * - - - C8 1000pF(50V) GRM188B11H102KD MURATA R13 1M Ω MCR03PZHZF1004 ROHM C11 220uF 6TPE220MI SANYO R14 51k Ω MCR03PZHZF5102 ROHM C12 - - - R16 - - - C14 0.47uF(10V) GRM188B11A474KD MURATA R17 36k Ω MCR03PZHZF3602 ROHM C15 10uF(25V) CM32XR7106M25A KYOCERA R18 * - - - C16 10uF(25V) CM32XR7106M25A KYOCERA R19 * - - - C17 10uF(6.3V) GRM21BB10J106KD MURATA R20 100k Ω MCR03PZHZF1003 ROHM C18 - - - R21 0 Ω MCR03EZHJ000 ROHM C19 - - - R24 0 Ω MCR03EZHJ000 ROHM C21 220uF 6TPE220MI SANYO R25 0 Ω MCR03EZHJ000 ROHM C22 - - - R27 * - - - C24 0.47uF(10V) GRM188B11A474KD MURATA R28 0 Ω MCR03EZHJ000 ROHM C25 10uF(25V) CM32XR7106M25A KYOCERA R29 0 Ω MCR03EZHJ000 ROHM C26 10uF(25V) CM32XR7106M25A KYOCERA R30 0 Ω MCR03EZHJ000 ROHM C27 10uF(6.3V) GRM21BB10J106KD MURATA R32 0 Ω MCR03EZHJ000 ROHM C29 - - - R33 5m Ω PMR100HZPFU5L00 ROHM C30 - - - R34 0 Ω MCR03EZHJ000 ROHM C31 - - - R35 0 Ω MCR03EZHJ000 ROHM C32 - - - R36 100k Ω MCR03PZHZF1003 ROHM C33 - - - R37 0 Ω MCR03EZHJ000 ROHM C34 * - - - R39 0 Ω MCR03EZHJ000 ROHM C35 * - - - R40 0 Ω MCR03EZHJ000 ROHM C36 * - - - R42 * - - - D1 Diode RSX501L-20 ROHM R43 0 Ω MCR03EZHJ000 ROHM D2 Diode RSX501L-20 ROHM R44 0 Ω MCR03EZHJ000 ROHM D3 Diode RB520S-30 ROHM R45 * - - - D4 Diode RB520S-30 ROHM R46 0 Ω MCR03EZHJ000 ROHM L1 2.5uH CDEP105NP-2R5MC-

32 Sumida

R47 0 Ω MCR03EZHJ000 ROHM L2 2.5uH CDEP105NP-2R5MC- R48 5m Ω PMR100HZPFU5L00 ROHM Q1 FET uPA2702 NEC R49 0 Ω MCR03EZHJ000 ROHM Q2 FET uPA2702 NEC R50 0 Ω MCR03EZHJ000 ROHM Q3 FET uPA2702 NEC R52 - - - Q4 FET uPA2702 NEC R54 - - - Q5 - - - R55 - - - Q6 - - - R56 - - - U1 - BD9524MUV ROHM R57 - - - * Patterns for over current detection used DCR.

Handling method of unused pin during using only 1ch DC/DC. If using only 1ch DC/DC and 2ch pin is set to be off at all times, please manage the unused pin as diagram below. PIN No, PIN Name Management

1 SW2 GND

2 HG2 OPEN

3 BOOT2 GND

4 EN2 GND

5 PGOOD2 GND

6 SS2 GND

8 REF2 GND

9 Is+2 GND

10 FB2 GND

11 FS2 GND

31 LG2 OPEN

3.3V EXTVCC C4REG2 R7 C5 FS1 R17 C18 R39 R40 C24 C27 VIN VIN C25 C26 SW1 BD9524MUV Vo1 R16 REG2 VIN R58 C19 R47 R49 R50 R46 L1 R48 R44 R43 R45 C34 C23 R10 R41 R42 R11 C35 R19 R56 R55 R57 TPQ6 VO1 C22 C21 C32 C33 C20 FS2 11 MCTL DGND AGND FB2 PGOOD1 PGOOD2 REG1 PGOOD1 C28 MCTL R20 R21 SS2 VO1 R51 R60

Notes for use 1. This integrated circuit is a monolithic IC, which (as shown in the figure below), has P isolation in the P substrate and between the various pins. A P-N junction is formed from this P layer and N layer of each pin, with the type of junction depending on the relation between each potential, as follows:  When GND> element A> element B, the P-N junction is a diode.  When element B>GND element A, the P-N junc tion operates as a parasitic transistor. Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual interference among circuits, as well as operating malfunctions and physical damage. Therefore, be careful to avoid methods by which parasitic diodes operate, such as applying a voltage lower than the GND (P substrate) voltage to an input pin. 2. In some modes of operation, power supply voltage and pin voltage are reversed, giving rise to possible internal circuit damage. For example, when the external capacitor is charged, the electric charge can cause a VCC short circuit to the GND. In order to avoid these problems, inserting a VCC series countercurrent prevention diode or bypass diode between the various pins and the VCC is recommended. 3. Absolute maximum rating Although the quality of this IC is rigorously controlled, the IC may be destroyed when applied voltage or operating temperature exceeds its absolute maximum rating. Because short mode or open mode cannot be specified when the IC is destroyed, it is important to take physical safety measures such as fusing if a special mode in excess of absolute rating limits is to be implemented. 4.GND potential Make sure the potential for the GND pin is always kept lower than the potentials of all other pins, regardless of the operating mode. 5. Thermal design In order to build sufficient margin into the thermal design, give proper consideration to the allowable loss (Power Dissipation) in actual operation. 6. Short-circuits between pins and incorrect mounting position When mounting the IC onto the circuit board, be extremely careful about the orientation and position of the IC. The IC may be destroyed if it is incorrectly positioned for mounting. Do not short-circuit between any output pin and supply pin or ground, or between the output pins themselves. Accidental attachment of small objects on these pins will cause shorts and may damage the IC. VCC Pin Countercurrent Bypass diode Resistor Transistor (NPN) N N N P+ P + P P substrate GND Parasitic element Pin A N N P+ P+ P P substrate GND Parasitic element Pin B C B E N GND Pin A Parasitic element Pin B Other adjacent elements E B C GND Parasitic element

www.rohm.com 2010.03 - Rev.C © 2010 ROHM Co., Ltd. All rights reserved. 7. Operation in strong electromagnetic fields Use in strong electromagnetic fields may cause malfunctions. Use extreme caution with electromagnetic fields. 8. Thermal shutdown circuit This IC is provided with a built-in thermal shutdown (TSD) circuit, which is activated when the operating temperature reaches 175℃ (standard value), and has a hysteresis range of 15 ℃ (standard). When the IC chip temperature rises to the threshold, all the inputs automatically turn OFF. Note that the TSD circuit is provided for the exclusive purpose shutting down the IC in the presence of extreme heat, and is not designed to protect the IC per se or guarantee performance when or after extreme heat conditions occur. Therefore, do not operate the IC with the expectation of continued use or subsequent operation once the TSD is activated. 9. Capacitor between output and GND When a larger capacitor is connected between the output and GND, Vcc or VIN shorted with the GND or 0V line – for any reason – may cause the charged capacitor current to flow to the output, possibly destroying the IC. Do not connect a capacitor larger than 1000uF between the output and GND. 10. Precautions for board inspection Connecting low-impedance capacitors to run inspections with the board may produce stress on the IC. Therefore, be certain to use proper discharge procedure before each process of the operation. To prevent electrostatic accumulation and discharge in the assembly process, thoroughly ground yourself and any equipment that could sustain ESD damage, and continue observing ESD-prevention procedures in all handling, transfer and storage operations. Before attempting to connect components to the test setup, make certain that the power supply is OFF. Likewise, be sure the power supply is OFF before removing any component connected to the test setup. 11. GND wiring pattern When both a small-signal GND and high current GND are present, single-point grounding (at the set standard point) is recommended, in order to separate the small-signal and high current patterns, and to be sure the voltage change stemming from the wiring resistance and high current does not cause any voltage change in the small-signal GND. In the same way, care must be taken to avoid wiring pattern fluctuations in any connected external component GND.

Power Dissipation Ambient Temperature [Ta] Power Dissipation [Pd] 150 125 100 75 50 25 0 200 400 600 800 1000 [℃] [mW] 880mW 380mW 70mm×70mm×1.6mm Glass-epoxy PCB θj-a=142.0℃/W With no heat sink θj-a=328.9℃/W

Ordering part number B D 9 5 2 4 M U V - E 2 Part No. Part No. Package MUV : VQFN032V5050 Packaging and forming specification E2: Embossed tape and reel (Unit : mm) VQFN032V5050 0.08 S S 1.0MAX (0.22) 0.02 +0.03 -0.02 932 1625 0.5 0.75 0.4±0.1 3.4±0.1 3.4±0.1 0.25 +0.05-0.04 C0.2 5.0±0.1 5.0±0.1 1PIN MARK ∗ Order quantity needs to be multiple of the minimum quantity. <Tape and Reel information> Embossed carrier tapeTape Quantity Direction of feed The direction is the 1pin of product is at the upper left when you hold reel on the left hand and you pull out the tape on the right hand 2500pcs Direction of feed Reel 1pin

R1010Awww.rohm.com © 2010 ROHM Co., Ltd. All rights reserved. Notice ROHM Customer Support System http://www.rohm.com/contact/ Thank you for your accessing to ROHM product informations. More detail product informations and catalogs are available, please contact us. Notes No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM upon request. Examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the Products. The peripheral conditions must be taken into account when designing circuits for mass production. Great care was taken in ensuring the accuracy of the information specified in this document. However, should you incur any damage arising from any inaccuracy or misprint of such information, ROHM shall bear no responsibility for such damage. The technical information specified herein is intended only to show the typical functions of and examples of application circuits for the Products. ROHM does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by ROHM and other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. The Products specified in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, office-automation equipment, commu- nication devices, electronic appliances and amusement devices). The Products specified in this document are not designed to be radiation tolerant. While ROHM always makes efforts to enhance the quality and reliability of its Products, a Product may fail or malfunction for a variety of reasons. Please be sure to implement in your equipment using the Products safety measures to guard against the possibility of physical injury, fire or any other damage caused in the event of the failure of any Product, such as derating, redunda ncy, fire control and fail-safe designs. ROHM shall bear no responsibility whatsoever for your use of any Product outside of the prescribed scope or not in accordance with the instruction manual. The Products are not designed or manufactured to be used with any equipment, device or system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospac e machinery, nuclear-reactor controller, fuel- controller or other safety device). ROHM shall bear no responsibility in any way for use of any of the Products for the above special purposes. If a Product is intended to be used for any such special purpose, please contact a ROHM sales representative before purchasing. If you intend to export or ship overseas any Product or technology specified herein that may be controlled under the Foreign Exchange and the Foreign Trade Law, you will be required to obtain a license or permit under the Law.

Product Information

BD9524MUV specifications and overview.

Summary

Main Power Supply IC for Note PC (Linear Regulator Integrated)

Description

Main Power Supply IC for Note PC (Linear Regulator Integrated)

Source title BD9524MUV Datasheet(PDF) - Rohm

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