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BD9130EFJ

Rohm

Output 2A or More High-efficiency Step-down Switching Regulator with Built-in Power MOSFET

Manufacturer: Rohm

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www.rohm.com 2009.05 - Rev.A © 2009 ROHM Co., Ltd. All rights reserved. Single-chip Type with Built-in FET Switching Regulator Series Output 2A or More High-efficiency Step-down Switching Regulator with Built-in Power MOSFET BD9130EFJ

Description ROHM’s high efficiency step-down switching regulator BD9130EFJ is a power supply designed to produce a low voltage including 1 volts from 5.5/3.3 volts power supply line. Offers high efficiency with our original pulse skip control technology and synchronous rectifier. Employs a current mode control sy stem to provide faster transient response to sudden change in load.
Features 1) Offers fast transient response with current mode PWM control system. 2) Offers highly efficiency for all load range with synchronous rectifier (Nch/Pch FET) and SLLM TM(Simple Light Load Mode) 3) Incorporates soft-start function. 4) Incorporates thermal protection and ULVO functions. 5) Incorporates short-current protec tion circuit with time delay function. 6) Incorporates shutdown function 7) Employs small surface mount package : HTSOP-J8
Use Power supply for LSI including DSP, Micro computer and ASIC
Absolute maximum ratings Parameter Symbol Rating Unit Power Supply Voltage VCC -0.3 ～+7 *1 V PVCC -0.3 ～+7 *1 V EN Voltage V EN -0.3 ～+7 V SW・ITH Voltage VSW, VITH -0.3 ～+7 V SW Output Current ISW 2.6 *1 A Power Dissipation 1 Pd1 0.5 *2 W Power Dissipation 2 Pd2 3.76 *3 W Operating Temperature Range Topr -25～+105 ℃ Storage Temperature Range Tstg -55～+150 ℃ Maximum Junction Temperature Tjmax +150 ℃ *1 Pd, ASO, and Tjmax=150 ℃ should not be exceeded. *2 Reduced by 4.0mW for increase in Ta of 1 ℃ above 25 ℃.
Operating Conditions (Ta=-25～+105℃) Parameter Symbol Limits Unit Min. Typ. Max. Power Supply Voltage VCC 2.7 3.3 5.5 V PVCC 2.7 3.3 5.5 V EN Voltage V EN 0 - V CC V Output Voltage range VOUT 1.0 - 2.5* 4 V SW Average Output Current ISW - - 2.0* 5 A ＊4 In case set output voltage 1.6V or more, VccMin. = Vout + 1.3V. ＊5 Pd and ASO should not be exceeded. No.09027EAT30

Electrical Characteristics ◎BD9130EFJ (Ta=25℃, VCC=PVCC=3.3V, EN=VCC, R1=10kΩ, R2=5kΩ, unless otherwise specified.) Parameter Symbol Min. Typ. Max. Unit Conditions Standby Current ISTB - 0 10 μA EN=GND Bias Current ICC - 250 450 μA EN Low Voltage VENL - GND 0.8 V Stand-by Mode EN High Voltage VENH 2.0 V CC - V Active Mode EN Input Current IEN - 1 10 μA V EN=3.3V Oscillation Frequency FOSC 0.8 1 1.2 MHz Pch FET ON Resistance*1 R ONP - 200 400 m Ω PV CC=3.3V Nch FET ON Resistance*1 R ONN - 160 350 m Ω PV CC=3.3V ADJ Reference Voltage VADJ 0.788 0.800 0.812 V ITH SINK Current I THSI 10 20 - μA V ADJ=1.0V ITH Source Current ITHSO 10 20 - μA V ADJ=0.6V UVLO Threshold Voltage VUVLO1 2.400 2.500 2.600 V Vcc=3.3V →0V UVLO Hysteriesis Voltage VUVLO2 2.425 2.550 2.700 V Vcc=0V →3.3V Soft Start Time TSS 0.5 1 2 ms Timer Latch Time TLATCH 1 2 3 ms Output Short circuit Threshold Voltage V SCP - V OUT×0.5 V OUT×0.7 V V OUT=1.2V→0V
Block Diagram, Application Circuit
Pin No. & function table Pin No. Pin name PIN function

1 ADJ Output voltage detect pin

2 V CC VCC power supply input pin

3 ITH GmAmp output pin/Connected phase compensation capacitor

4 GND Ground

5 PGND Nch FET source pin

6 SW Pch/Nch FET drain output pin

7 PV CC Pch FET source pin

8 EN Enable pin(Active High)

Fig.1 BD9130EFJ TOP View Fig.2 BD9130EFJ Block Diagram 8765 12 3 4 0.42 +0.05 -0.04 S (2.4) 4.9±0.1 6.0±0.2 3.9±0.1 0.08±0.05 0.85±0.05 1.0Max. 0.545 1.27 0.17 +0.05 -0.03 Max5.25(include.BURR) (3.2) 0.08 S 1.05±0.2 0.65±0.15 0.08 M 4 +6 Lot No. BD9130 Output PVCC PGND SW GND Gm Amp. 2.2μH VCC R S Q OSC UVLO TSD VCC VCC CLK SLOPE EN Current Comp 10μF Soft Start Current Sense/ Protect Driver Logic VREF ITHADJ RITH CITH R1 R2 SCP HTSOP-J8 (Unit:mm)

Characteristics data(Reference data) Fig.3 Vcc-Vout Fig.4 Ven-Vout Fig.5 Iout-Vout Fig. 6 Ta-V OUT Fig.7 Efficiency Fig.8 Ta-FOSC Fig.9 Ta-R ONN, RONP Fig.10 Ta-VEN Fig.11 Ta-ICC VCC=3.3V Io=0A 0.80 0.85 0.90 0.95 1.00 1.05 1.10 1.15 1.20 -25 0 25 50 75 100 TEMPERATURE:Ta[℃] FREQUENCY:FOSC[MHz] 100 1 10 100 1000 10000 OUTPUT CURRENT:I OUT[mA] EFFICIENCY:η[%] VCC=3.3V Ta=25℃ 【VOUT=1.8V】 VCC=5V Ta=25℃ 【VOUT=2.5V】 1.75 1.76 1.77 1.78 1.79 1.80 1.81 1.82 1.83 1.84 1.85 -25 0 25 50 75 100 TEMPERATURE:Ta[℃] OUTPUT VOLTAGE:VOUT[V] VCC=3.3V Io=0A 【VOUT=1.8V】 VCC=3.3V 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 -25 0 25 50 75 100 TEMPERATURE:Ta[℃] EN VOLTAGE:VEN[V] 0.00 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 -25 0 25 50 75 100 TEMPERATURE:Ta[℃] ON RESISTANCE:R ON[Ω] VCC=3.3V PMOS NMOS VCC=3.3V 120 150 180 210 240 270 300 -25 0 25 50 75 100 TEMPERATURE:Ta[℃] CIRCUIT CURRENT:ICC [μA] VCC=3.3V 【VOUT=1.8V】 VCC=3.3V Ta=25℃ 【VOUT=2.5V】 VCC=5V Ta=25℃ 0.0 0.5 1.0 1.5 2.0 012345 EN VOLTAGE:VEN[V] OUTPUT VOLTAGE:VOUT[V] 0.0 0.5 1.0 1.5 2.0 2.5 3.0 012345 INPUT VOLTAGE:V CC[V] OUTPUT VOLTAGE:VOUT[V] Ta=25℃ Io=2A 【VOUT=1.8V】 Ta=25℃ Io=0A 【VOUT=2.5V】 Ta=25℃ 【VOUT=1.8V】

www.rohm.com 2009.05 - Rev.A © 2009 ROHM Co., Ltd. All rights reserved. VOUT SW 0.8 0.9 1.1 1.2 INPUT VOLTAGE:V CC [V] FREQUENCY:FOSC[MHz] VCC=3.3V Ta=25℃ Io=0A VCC=3.3V Ta=25℃ 【SLLMTM c o n t r o l V O U T = 1 . 8 V】【VOUT=1.8V】 Ta=25℃ VOUT VCC=PVCC =EN

Characteristics data(Reference data) – Continued Fig.12 Vcc-Fosc Fig.13 Soft start waveform Fig.14 SW waveform Io=10mA Fig.15 SW waveform Io=200mA Fig. 16 Transient response Io=1A→2A(10μs) Fig.17 Transient response Io=2A→1A(10 μs) VOUT IOUT VOUT IOUT VCC=3.3V Ta=25℃ 【VOUT=1.8V】 VCC=3.3V Ta=25℃ 【VOUT=1.8V】【PWM control VOUT=1.8V】 VCC=3.3V Ta=25℃

Information on advantages Advantage 1：Offers fast transient response with current mode control system. Voltage drop due to sudden change in load was reduced by about 50%. Fig.18 Comparison of transient response Advantage 2： Offers high efficiency for all load range. ・For lighter load: Utilizes the current mode control mode called SLLMTM for lighter load, which reduces various dissipation such as switching dissipation (PSW), gate charge/discharge dissipation, ESR dissipation of output capacitor (PESR) and on-resistance dissipation (PRON) that may otherwise cause degradation in efficiency for lighter load. Achieves efficiency improvement for lighter load. ・For heavier load: Utilizes the synchronous rectifying mode and the low on-resistance MOS FETs incorporated as power transistor. ON resistance of P-channel MOS FET : 200mΩ( T y p . ) ON resistance of N-channel MOS FET : 160mΩ( T y p . ) Achieves efficiency improvement for heavier load. Offers high efficiency for all load rang e with the improvements mentioned above. Advantage 3 ：・Supplied in smaller package due to small-sized power MOS FET incorporated. Reduces a mounting area required. Fig.20 Example application Fig.19 Efficiency DC/DC Convertor Controller RITH L Co VOUT CITH VCC Cin 10mm 15mm RITH CITH CIN CO L VOUT IOUT VOUT IOUT 110mV Conventional product (Load response IO=0.1A→0.6A) BD9130EFJ (Load response IO=1A→2A) ・Output capacitor Co required for current mode control: 22µF ceramic capacitor ・Inductance L required for the operating frequency of 1 MHz: 2.2µH inductor (BD9130EFJ:Co=22µF, L=2.2µH) 0.001 0.01 0.1 1 100 PWM SLLMTM ①inprovement by SLLM system ②improvement by synchronous rectifier Efficiency η[%] Output current Io[A] 29mV

Operation BD9130EFJ is a synchronous rectifying step-down switching regulator that achieves faster transient response by employing current mode PWM control system. It utiliz es switching operation in PWM (Pulse Width Modulation) mode for heavier load, while it utilizes SLLMTM (Simple Light Load Mode) operation for lighter load to improve efficiency. ○Synchronous rectifier It does not require the power to be dissipated by a rectifier externally connected to a conventional DC/DC converter IC, and its P.N junction shoot-through protection circuit limits the shoot-through current during operation, by which the power dissipation of the set is reduced. ○Current mode PWM control Synthesizes a PWM control signal with a inductor current feedback loop added to the voltage feedback. ・PWM (Pulse Width Modulation) control The oscillation frequency for PWM is 1 MHz. SET si gnal form OSC turns ON a P-channel MOS FET (while a N-channel MOS FET is turned OFF), and an inductor current I L increases. The current comparator (Current Comp) receives two signals, a current feedback control signal (SENSE: Voltage converted from IL) and a voltage feedback control signal (FB), and issues a RESET signal if both input signals are identical to each other, and turns OFF the P-channel MOS FET (while a N-channel MOS FET is turned ON) for the rest of the fixed period. The PWM control repeat this operation. ・SLLM TM (Simple Light Load Mode) control When the control mode is shifted from PWM for heavier load to the one for lighter load or vise versa, the switching pulse is designed to turn OFF with the device held operated in normal PWM control loop, which allows linear operation without voltage drop or deterioration in transient response during the mode switching from light load to heavy load or vise versa. Although the PWM control loop continues to operate with a SET signal from OSC and a RESET signal from Current Comp, it is so designed that the RESET signal is held issued if shifted to the light load mode, with which the switching is tuned OFF and the switching pulses are thinned out under control. Activating the switching intermittently reduces the switching dissipation and improves the efficiency. Fig.21 Diagram of current mode PWM control Fig.22 PWM switching timing chart Fig.23 SLLM TM switching timing chart OSC Level Shift Driver Logic RQ S IL SW ITH Current Comp Gm Amp. SET RESET FB Load SENSE VOUT VOUT Current Comp SET RESET SW VOUT PVCC GND GND GND I L(AVE) VOUT(AVE) SENSE FB Current Comp SET RESET SW VOUT PVCC GND GND GND VOUT(AVE) SENSE FB IL Not switching IL

Description of operations ・Soft-start function EN terminal shifted to “High” activates a soft-starter to gradually establish the output voltage with the current limited during startup, by which it is possible to prevent an overshoot of output voltage and an inrush current. ・Shutdown function With EN terminal shifted to “Low”, the device turns to Standby Mode, and all the function blocks including reference voltage circuit, internal oscillator and drivers are turned to OFF. Circuit current during standby is 0 μF (Typ.). ・UVLO function Detects whether the input voltage sufficient to secure the output voltage of this IC is supplied. And the hysteresis width of 50mV (Typ.) is provided to prevent output chattering. Fig.24 Soft start, Shutdown, UVLO timing chart ・Short-current protection circuit with time delay function Turns OFF the output to protect the IC from breakdown when the incorporated current limiter is activated continuously for the fixed time(T LATCH) or more. The output thus held tuned OFF may be recovered by restarting EN or by re-unlocking UVLO. Fig.25 Short-current protection circuit with time delay timing chart t2=TLATCH Output OFF latch EN VOUT Output Short circuit Threshold Voltage IL Standby mode Operating mode Operating mode EN Timer latch EN Standby mode IL Limi t t1<TLATCH Hysteresis 50mV Tss Tss Tss Soft start Standby mode Operating mode Standby mode Operating mode Standby mode Operating mode Standby mode UVLOEN UVLOUVLO VCC EN VOUT

www.rohm.com 2009.05 - Rev.A © 2009 ROHM Co., Ltd. All rights reserved. ① IC only θ j-a=249.5℃/W ②1 layers（copper foil area:0mm×0mm） θ j-a=153.2℃/W ③2 layers（copper foil area:15mm×15mm） θ j-a=113.6℃/W ④2 layers（copper foil area:70mm×70mm） θ j-a=59.2℃/W ⑤4 layers（copper foil area:70mm×70mm） θ j-a=33.3℃/W (when mounted on a board 70mm×70mm×1.6mm Glass-epoxy PCB with termal Via)

Switching regulator efficiency Efficiency ŋ may be expressed by the equation shown below: Efficiency may be improved by reducing the switching regulator power dissipation factors P Dα as follows: Dissipation factors: 1) ON resistance dissipation of inductor and FET：PD(I2R) 2) Gate charge/discharge dissipation：PD(Gate) 3) Switching dissipation：PD(SW) 4) ESR dissipation of capacitor：PD(ESR) 5) Operating current dissipation of IC：PD(IC) 1)PD(I 2R)=IOUT2×(RCOIL+RON) (RCOIL[Ω]：DC resistance of inductor, RON[Ω]：ON resistance of FET, IOUT[A]：Output current.) 2)PD(Gate)=Cgs×f×V (Cgs[F]：Gate capacitance of FET 、f[H]：Switching frequency、V[V]：Gate driving voltage of FET) 4)PD(ESR)=I RMS2×ESR (I RMS[A]：Ripple current of capacitor、ESR[Ω]：Equivalent series resistance.) 5)PD(IC)=Vin×ICC ( I CC[A]：Circuit current.)
Consideration on permissible dissipation and heat generation As this IC functions with high efficiency without significant heat generation in most applications, no special consideration is needed on permissible dissipation or heat generation. In case of extreme conditions, however, including lower input voltage, higher output voltage, heavier load, and/or higher temperature, the permissible dissipation and/or heat generation must be carefully considered. For dissipation, only conduction losses due to DC resistance of inductor and ON resistance of FET are considered. Because the conduction losses are considered to play the leading role among other dissipation mentioned above including gate charge/discharge dissipation and switching dissipation. Fig.26 Thermal derating curve (HTSOP-J8) If VCC=3.3V, VOUT=1.8V, RONP=0.2Ω, RONN=0.16Ω IOUT=2A, for example, D=VOUT/VCC=1.8/3.3=0.545 =0.109+0.0728 =0.1818[Ω] As RONP is greater than RONN in this IC, the dissipation increases as the ON duty becomes greater. With the consideration on the dissipation as above, thermal design must be carried out with sufficient margin allowed. η= VOUT×IOUT Vin×Iin ×100[%]= POUT Pin ×100[%]= POUT POUT+PDα ×100[%] Vin2×CRSS×IOUT×f IDRIVE 3)PD(SW)= (CRSS[F]：Reverse transfer capacitance of FET、IDRIVE[A]：Peak current of gate.) P=IOUT2×RON RON=D×RONP+(1-D)RONN D：ON duty (=VOUT/VCC) RCOIL：DC resistance of coil RONP：ON resistance of P-channel MOS FET RONN：ON resistance of N-channel MOS FET IOUT：Output current Power dissipation:Pd [W] Ambient temperature:Ta [℃] 0 25 50 75 100 125 150 2.0 3.0 4.0 ①0.50W 105 1.0 ①0.50W ②0.82W ③1.10W ④2.11W ⑤3.76W

Selection of components externally connected 1. Selection of inductor (L) Fig.27 Output ripple current * Current exceeding the current rating of the inductor results in magnetic saturation of the inductor, which decreases efficiency. The inductor must be selected allowing sufficient margin with which the peak current may not exceed its current rating. If V CC=3.3V, VOUT=1.8V, f=1MHz, ΔIL=0.2×2A=0.4A, for example,(BD9130EFJ) * Select the inductor of low resistance component (such as DCR and ACR) to minimize dissipation in the inductor for better efficiency. 2. Selection of output capacitor (C 3. Selection of input capacitor (Cin) Fig.29 Input capacitor A low ESR 10µF/10V ceramic capacitor is recommended to reduce ESR dissipation of input capacitor for better efficiency. Fig.28 Output capacitor The inductance significantly depends on output ripple current. As seen in the equation (1), the ripple current decreases as the inductor and/or switching frequency increases. ΔIL= (VCC-VOUT)×VOUT Appropriate ripple current at output should be 20% more or less of the maximum output current. ΔIL=0.2×IOUTmax. [A]・・・(2) (VCC-VOUT)×VOUT (ΔIL: Output ripple current, and f: Switching frequency) Output capacitor should be selected with the consideration on the stability region and the equivalent series resistance required to smooth ripple voltage. Output ripple voltage is determined by the equation (4)： ΔVOUT=ΔIL×ESR [V]・・・(4) (ΔIL: Output ripple current, ESR: Equivalent series resistance of output capacitor) *Rating of the capacitor should be determined allowing sufficient margin against output voltage. A 22 μF to 100μF ceramic capacitor is recommended. Less ESR allows reduction in output ripple voltage. Input capacitor to select must be a low ESR capacitor of the capacitance sufficient to cope with high ripple current to prevent high transient voltage. The ripple current IRMS is given by the equation (5): IRMS=IOUT× VOUT(VCC-VOUT) VCC [A]・・・(5) When Vcc is twice the VOUT, IRMS= IOUT (3.3-1.8)×1.8 < Worst case > IRMS(max.) IRMS=2× 1.8(3.3-1.8) 3.3 =0.99[ARMS] ΔIL VCC IL L Co VOUT IL VCC L Co VOUT ESR VCC L Co VOUT Cin If VCC=3.3V, VOUT=1.8V, and IOUTmax.=2A, (BD9130EFJ)

www.rohm.com 2009.05 - Rev.A © 2009 ROHM Co., Ltd. All rights reserved. Gain [dB] Phase [deg] A -90 A -90 fz(Amp.) fp(Min.) fp(Max.) fz(ESR) IOUTMin. IOUTMax. Gain [dB] Phase [deg] 4. Determination of RITH, CITH that works as a phase compensator As the Current Mode Control is designed to limit a inductor current, a pole (phase lag) appears in the low frequency area due to a CR filter consisting of a output capacitor and a load resistance, while a zero (phase lead) appears in the high frequency area due to the output capacitor and its ESR. So, the phases are easily compensated by adding a zero to the power amplifier output with C and R as described below to cancel a pole at the power amplifier. Fig.30 Open loop gain characteristics Fi g.31 Error amp phase compensation characteristics Fig.32 Typical application Stable feedback loop may be achieved by canceling the pole fp (Min.) produced by the output capacitor and the load resistance with CR zero correction by the error amplifier. fp= 2π×R O×CO fz(ESR)= 2π×ESR×CO Pole at power amplifier When the output current decr eases, the load resistance Ro increases and the pole frequency lowers. fp(Min.)= 2π×ROMax.×CO 1 [Hz]←with lighter load fp(Max.)= 2π×ROMin.×CO 1 [Hz] ←with heavier load Zero at power amplifier fz(Amp.)= 2π×RITH×CITH GND,PGND SW VCC,PVCC EN VOUT ITH VCC VOUT Cin RITH CITH L ESR CO RO VOUT fz(Amp.)= fp(Min.) 2π×RITH×CITH 1 = 2π×ROMax.×CO Increasing capacitance of the output capacitor lowers the pole frequency while the zero frequency does not change. (This is because when the capacitance is doubled, the capacito r ESR reduces to half.)

www.rohm.com 2009.05 - Rev.A © 2009 ROHM Co., Ltd. All rights reserved. 5. Determination of output voltage The output voltage VOUT is determined by the equation (6): VOUT=(R2/R1+1)×VADJ・・・(6) V ADJ: Voltage at ADJ terminal (0.8V Typ.) With R1 and R2 adjusted, the output voltage may be determined as required. Adjustable output voltage range : 1.0V ～2.5V Fig.33 Determination of output voltage Use 1 kΩ～100 kΩ resistor for R1. If a resistor of the resistance higher than 100 kΩ is used, check the assembled set carefully for ripple voltage etc. The lower limit of input voltage depends on the output voltage. Basically, it is recommended to use in the condition : V CCmin = VOUT+1.3V. Fig.34. shows the necessary output current value at the lower limit of input voltage. (DCR of inductor : 0.1Ω) This data is the characteristic value, so it’ doesn’t guarantee the operation range, Fig.34 minimum input voltage in each output voltage

BD9130EFJ Cautions on PC Board layout Fig.35 Layout diagram ① For the sections drawn with heavy line, use thick conductor pattern as short as possible. ② Lay out the input ceramic capacitor CIN closer to the pins PVCC and PGND, and the output capacitor Co closer to the pin PGND. ③ Lay out CITH and RITH between the pins ITH and GND as neat as possible with least necessary wiring. ※ HTSOP-J8 (BD9130EFJ) has thermal FIN on the reverse of the package. The package thermal performance may be enhanced by bonding the FIN to GND plane which take a large area of PCB. ADJ VCC ITH GND EN PVCC SW PGND VCC RITH GND Co CIN VOUT EN L CITH SW ADJ L Co R2 Output Vo=2.5V Vo=2.0V Vo=1.8V 2.7 2.9 3.1 3.3 3.5 3.7 3.9 00 .511 .52 OUTPUT CURRENT : IOUT[A] INPUT VOLTAGE : VCC[V]

Recommended components Lists on above application Symbol Part Value Manufacturer Series L Coil 2.2µH TDK LTF5022-2R2N3R2 CIN Ceramic capacitor 22µF Kyocera CM32X5R226M10A CO Ceramic capacitor 22µF Kyocera CM316B226M06A CITH Ceramic capacitor VOUT=1.0V 680pF murata GRM18 Serise VOUT=1.2V 560pF murata GRM18 Serise VOUT=1.5V 470pF murata GRM18 Serise VOUT=1.8V 330pF murata GRM18 Serise VOUT=2.5V 330pF murata GRM18 Serise RITH Resistance VOUT=1.0V 10k Ω Rohm MCR03 Serise VOUT=1.2V 12k Ω Rohm MCR03 Serise VOUT=1.5V 15k Ω Rohm MCR03 Serise VOUT=1.8V 18k Ω Rohm MCR03 Serise VOUT=2.5V 18k Ω Rohm MCR03 Serise * The parts list presented above is an example of recommended parts. Although the parts are sound, actual circuit characteristics should be checked on your application carefully before use. Be sure to allow sufficient margins to accommodate variations between external devices and this IC when employing the depicted circuit with other circuit constants modified. Both static and transient characteristics should be considered in establishing these margins. When switching noise is substantial and may impact the system, a low pass filter should be inserted between the VCC and PVCC pins, and a schottky barrier diode established between the SW and PGND pins.
I/O equivalence circuit Fig.36 I/O equivalence circuit EN ・EN pin ・SW pin PVCC SW PVCC PVCC ITH ・ITH pin VCC ・ADJ pin ADJ

Notes for use 1. Absolute Maximum Ratings While utmost care is taken to quality control of this pr oduct, any application that may exceed some of the absolute maximum ratings including the voltage applied and the operatin g temperature range may result in breakage. If broken, short-mode or open-mode may not be identified. So if it is expected to encounter with special mode that may exceed the absolute maximum ratings, it is requested to take necessary safety measures physically including insertion of fuses. 2. Electrical potential at GND GND must be designed to have the lowest electrical potential In any operating conditions. 3. Short-circuiting between terminals, and mismounting When mounting to pc board, care must be taken to avoid mistak e in its orientation and alignment. Failure to do so may result in IC breakdown. Short-circuiting due to foreign matters entered between output te rminals, or between output and power supply or GND may also cause breakdown. 4.Operation in Strong electromagnetic field Be noted that using the IC in the strong electromagnetic radiation can cause operation failures. 5. Thermal shutdown protection circuit Thermal shutdown protection circuit is the circuit designed to isolate the IC from thermal runaway, and not intended to protect and guarantee the IC. So, the IC the thermal shutdown protection circuit of which is once activated should not be used thereafter for any operation originally intended. 6. Inspection with the IC set to a pc board If a capacitor must be connected to the pin of lower impedanc e during inspection with the IC set to a pc board, the capacitor must be discharged after each process to avoid stre ss to the IC. For electrostatic protection, provide proper grounding to assembling processes with special care taken in handling and storage. When connecting to jigs in the inspection process, be sure to turn OFF the power supply before it is connected and removed. 7. Input to IC terminals This is a monolithic IC with P + isolation between P-substrate and each element as illustrated below. This P-layer and the N-layer of each element form a P-N junction, and various parasitic element are formed. If a resistor is joined to a transistor terminal as shown in Fig 37. ○P-N junction works as a parasitic diode if the following rela tionship is satisfied; GND>Terminal A (at resistor side), or GND>Terminal B (at transistor side); and ○if GND>Terminal B (at NPN transistor side), a parasitic NPN transistor is activated by N-layer of other element adjacent to the above-mentioned parasitic diode. The structure of the IC inevitably forms parasitic elements, the activation of which may cause interference among circuits, and/or malfunctions contributing to breakdown. It is therefore requested to take care not to use the device in such manner that the voltage lower than GND (at P-substrate) may be applied to the input terminal, which may result in activation of parasitic elements. Fig.37 Simplified structure of monorisic IC 8. Ground wiring pattern If small-signal GND and large-current GND are provided, It will be recommended to separate the large-current GND pattern from the small-signal GND pattern and establish a si ngle ground at the reference poi nt of the set PCB so that resistance to the wiring pattern and voltage fluctuations due to a large current will cause no fluctuations in voltages of the small-signal GND. Pay attention not to cause fluctuations in the GND wiring pattern of external parts as well. 9 . Selection of inductor It is recommended to use an inductor with a series resistance element (DCR) 0.1 Ω or less. Especially, in case output voltage is set 1.6V or more, note that use of a high DCR inductor will cause an inductor loss, resulting in decreased output voltage. Should this condition continue for a specified period (soft start time + timer latch time), output short circuit protection will be activated and output will be latched OFF. When using an inductor over 0.1 Ω, be careful to ensure adequate margins for variation between external devices and this IC, including transient as well as static characteristics. Furthermore, in any case, it is recommended to start up the output with EN after supply voltage is within operation range. Resistor Transistor (NPN) N N N P+ P + P P substrate GND Parasitic element Pin A N N P+ P+ P P substrate GND Parasitic element Pin B C B E N GND Pin A Parasitic element Pin B Other adjacent elements E B C GND Parasitic element

Ordering part number B D 9 1 3 0 E F J - E 2 Part No. Part No. 9130 Package EFJ: HTSOP-J8 Packaging and forming specification E2: Embossed tape and reel ( H T S O P - J 8 ) (Unit : mm) HTSOP-J8 0.08 S 0.08 M S 1.0MAX 0.85±0.05 1.27 0.08±0.08 0.42 +0.05 -0.04 1.05±0.2 0.65±0.15 4°+6° −4° 0.17 +0.05 -0.03 234 5 6 8 (MAX 5.25 include BURR) 0.545 (3.2) 4.9±0.1 6.0±0.2 (2.4) 3.9±0.1 1PIN MARK ∗ Order quantity needs to be multiple of the minimum quantity. <Tape and Reel information> Embossed carrier tapeTape Quantity Direction of feed The direction is the 1pin of product is at the upper left when you hold reel on the left hand and you pull out the tape on the right hand 2500pcs Direction of feed Reel 1pin

R0039Awww.rohm.com © 2009 ROHM Co., Ltd. All rights reserved. Notice ROHM Customer Support System http://www.rohm.com/contact/ Thank you for your accessing to ROHM product informations. More detail product informations and catalogs are available, please contact us. Notes N o c o p y i n g o r r e p r o d u c t i o n o f t h i s d o c u m e n t , i n p a rt o r i n w h o l e , i s p e r m i t t e d w i t h o u t t h e consent of ROHM Co.,Ltd. The content specified herein is subject to change for improvement without notice. The content specified herein is for the purpose of introducing ROHM's products (hereinafter "Products"). If you wish to use any such Product, please be sure to refer to the specifications, which can be obtained from ROHM upon request. Examples of application circuits, circuit constants and any other information contained herein illustrate the standard usage and operations of the Products. The peripheral conditions must be taken into account when designing circuits for mass production. Great care was taken in ensuring the accuracy of the information specified in this document. However, should you incur any damage arising from any inaccuracy or misprint of such information, ROHM shall bear no responsibility for such damage. The technical information specified herein is intended only to show the typical functions of and examples of application circuits for the Products. ROHM does not grant you, explicitly or implicitly, any license to use or exercise intellectual property or other rights held by ROHM and other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the use of such technical information. The Products specified in this document are intended to be used with general-use electronic equipment or devices (such as audio visual equipment, office-automation equipment, commu- nication devices, electronic appliances and amusement devices). The Products specified in this document are not designed to be radiation tolerant. While ROHM always makes efforts to enhance the quality and reliability of its Products, a Product may fail or malfunction for a variety of reasons. Please be sure to implement in your equipment using the Products safety measures to guard against the possibility of physical injury, fire or any other damage caused in the event of the failure of any Product, such as derating, redundancy, fire control and fail-safe designs. ROHM shall bear no responsibility whatsoever for your use of any Product outside of the prescribed scope or not in accordance with the instruction manual. T h e P r o d u c t s a r e n o t d e s i g n e d o r m a n u f a c t u r e d t o b e u s e d w i t h a n y e q u i p m e n t , d e v i c e o r system which requires an extremely high level of reliability the failure or malfunction of which may result in a direct threat to human life or create a risk of human injury (such as a medical instrument, transportation equipment, aerospace machinery, nuclear-reactor controller, fuel-controller or other safety device). ROHM shall bear no responsibility in any way for use of any of the Products for the above special purposes. If a Product is intended to be used for any such special purpose, please contact a ROHM sales representative before purchasing. If you intend to export or ship overseas any Product or technology specified herein that may be controlled under the Foreign Exchange and the Foreign Trade Law, you will be required to obtain a license or permit under the Law.

Product Information

BD9130EFJ specifications and overview.

Summary

Output 2A or More High-efficiency Step-down Switching Regulator with Built-in Power MOSFET

Description

Output 2A or More High-efficiency Step-down Switching Regulator with Built-in Power MOSFET

Source title BD9130EFJ Datasheet(PDF) - Rohm

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