STB70NF3LL_06 STMICROELECTRONICS | Alldatasheet

Document overview

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  • PDF pages: 13

Technical content

Datasheet sections

  • 1 Electrical ratings
  • 2 Electrical characteristics
  • 2.1 Electrical characteristics (curves)
  • 3 Test circuit
  • 4 Package mechanical data
  • 5 Packing mechanical data
  • 6 Revision history

N-channel 30V - 0.0075Ω - 70A - D2PAK Low gate charge STripFET™ II Power MOSFET General features ■ Optimal RDS(on) x Qg trade-off @ 4.5V ■ Conduction losses reduced ■ Switching losses reduced

Description

This application specific Power MOSFET is the third genaration of STMicroelectronis unique "Single Feature Size™" strip-based process. The resulting transistor shows the best trade-off between on-resistance and gate charge. When used as high and low side in buck regulators, it gives the best performance in terms of both conduction and switching losses. This is extremely important for motherboards where fast switching and high efficiency are of paramount importance.

Applications

■ Switching application Internal schematic diagram Type V DSS RDS(on) ID STB70NF3LL 30V < 0.0095 Ω 70A D²PAK Order codes Part number Marking Package Packaging STB70NF3LLT4 B70NF3LL@ D 2PAK Tape & reel

1 Electrical ratings

Table 1. Absolute maximum ratings

  1. Current limited by the package
  2. Pulse width limited by safe operating area
  3. I SD ≤70A, di/dt ≤350A/µs, VDD ≤ V(BR)DSS, TJ ≤ TJMAX

Table 2. Thermal data

2 Electrical characteristics

Table 3. On/off states Table 4. Dynamic

Table 5. Switching times Table 6. Source drain diode

  1. Pulse width limited by safe operating area.
  2. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.

2.1 Electrical characterist ics (curves)

Figure 1. Safe operating area Figure 2. Thermal impedance Figure 3. Output characterisics Figure 4. Transfer characteristics Figure 5. Source-drain diode forward Figure 6. Static drain-source on resistance

3 Test circuit

Figure 12. Switching times test circuit for Figure 13. Gate charge test circuit Figure 14. Test circuit for inductive load Figure 15. Unclamped Inductive load test Figure 16. Unclamped inductive waveform

4 Package mechanical data

In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com

DIM. mm. inch A 4.4 4.6 0.173 0.181 A1 2.49 2.69 0.098 0.106 A2 0.03 0.23 0.001 0.009 B 0.7 0.93 0.027 0.036 B2 1.14 1.7 0.044 0.067 C 0.45 0.6 0.017 0.023 C2 1.23 1.36 0.048 0.053 D 8.95 9.35 0.352 0.368 D1 8 0.315 E 10 10.4 0.393 E1 8.5 0.334 G 4.88 5.28 0.192 0.208 L 15 15.85 0.590 0.625 L2 1.27 1.4 0.050 0.055 L3 1.4 1.75 0.055 0.068 M 2.4 3.2 0.094 0.126 R0 . 4 0 . 0 1 5 V2 0º 4º D2PAK MECHANICAL DATA

STB70NF3LL Packing mechanical data

5 Packing mechanical data

  • on sales type DIM. mm inch MIN. MAX. MIN. MAX. A 330 12.992 B 1.5 0.059 C 12.8 13.2 0.504 0.520 D 20.2 0795 G 24.4 26.4 0.960 1.039 N 100 3.937 T 30.4 1.197 BASE QTY BULK QTY 1000 1000 REEL MECHANICAL DATA DIM. mm inch MIN. MAX. MIN. MAX. A0 10.5 10.7 0.413 0.421 B0 15.7 15.9 0.618 0.626 D 1.5 1.6 0.059 0.063 D1 1.59 1.61 0.062 0.063 E 1.65 1.85 0.065 0.073 F 11.4 11.6 0.449 0.456 K0 4.8 5.0 0.189 0.197 P0 3.9 4.1 0.153 0.161 P1 11.9 12.1 0.468 0.476 P2 1.9 2.1 0.075 0.082 R 50 1.574 T 0.25 0.35 0.0098 0.0137 W 23.7 24.3 0.933 0.956 TAPE MECHANICAL DATA

6 Revision history

Table 7. Revision history