B45196H1336K209

ADS5282EVM TI | Alldatasheet

Document overview

• Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
• PDF pages: 29

Technical content

Datasheet sections

User's Guide User's Guide January 2008 SLAU205

(Sheet of EVM Schematics (Sheet of EVM Schematics (Sheet of EVM Schematics (Sheet of EVM Schematics (Sheet of List of Tables Three-Pin Jumper List EVM Power-Supply Options ADS528X Frequently Used Registers Bill of Materials List of Figures SLAU205 January 2008 Submit Documentation Feedback

1.1 Purpose User's Guide SLAU205 January 2008 This preliminary user's guide gives a general overview of the ADS5281/82/87 (ADS528X) QFN evaluation module (EVM) and provides a general

description

features

module. The EVM is pictured in Figure The EVM provides a platform for evaluating the eight-channel ADS528X analog-to-digital converter (ADC) under various signal, reference, and supply conditions. This document should be used in combination with the EVM schematic diagram supplied. The ADS5281 and ADS5282 are 12-bit ADCs, whereas the ADS5287 is a 10-bit ADC. Windows is a trademark of Microsoft Corporation. On Semiconductor is a trademark of Semiconductor Components Industries, L.L.C. Xilinx is a trademark of Xilinx, Inc. SLAU205 January 2008 Submit Documentation Feedback

www.ti.com 1.2 EVM Basic Functions Overview Figure ADS5281 EVM Eight analog inputs to the ADC are provided via external SMA connectors. The EVM provides an external SMA connector for input of the ADC clock. The ADC can be clocked using either a single-ended or differential clock. Provisions are made on the EVM to allow users to evaluate the ADC using a single-ended PECL clock and a differential transformer-coupled clock. Digital output from the EVM is via a high-speed, high-density Samtec output header. The digital output connector mates directly to the TSW1200 Rev B or through an adapter to the TI ADSDeSer-50EVM, both of which deserialize the serial data stream into parallel CMOS data. Power connections to the EVM are via banana jack sockets. Separate sockets are provided for the ADC analog and ADC digital supplies and for the auxiliary circuits. SLAU205 January 2008 Submit Documentation Feedback

www.ti.com 1.3 ADS528x EVM Quick Start Procedure Overview The ADS528x EVM provides a flexible means of evaluating the ADS528x in a number of modes of operation. A basic setup procedure that can be used as a board confidence check is as follows: Verify all jumper settings against the schematic jumper list in Table Table Three-Pin Jumper List JUMPER FUNCTION LOCATION: PINS LOCATION: PINS DEFAULT JP2 ADC internal or external reference ADC internal reference ADC external reference selection JP3 (SMT) EVM clock input selection Transformer coupled Single-ended PECL JP4 (SMT) ADC CLKP Transformer Single-ended PECL JP5 (SMT) ADC CLKM Transformer GND JP8 Selects power management ADC powered by LDO (3.3 ADC powered by (3.3 configuration JP9 Selects power management ADC powered by LDO (1.8 ADC powered by (1.8 configuration Connect a 5-V supply to and its return to J2. Switch power supplies on. Using a function generator with 50- Ω output, generate a 0-V offset, 1.5-Vpp sine-wave clock into J26. The frequency of the clock must be within the specification for the device speed grade. Use a frequency generator with a 50- Ω output to provide a 5-MHz, 0-V offset, 1-dBFS-amplitude sine-wave signal into J9. This provides a transformer-coupled differential input signal to the ADC. Connect the USB cable, open the PC software and provide a reset command. For first-time use, see Section 3.1 for installation instructions. Connect to the ADS5281DeSerAdapter+ADSDeser-50EVM or TSW1200 deserializer card to evaluate the ADC digital data using a logic analyzer. Note: Software Operation Users must use the accompanying software to issue a reset command before taking measurements. In addition to providing the ADS528X with the initialization register writes detailed in the data sheet, the accompanying software also sets the state of ADC pins ADCRESET and PD. Failure to do so can cause improper operation. SLAU205 January 2008 Submit Documentation Feedback

www.ti.com Circuit 2.1 Schematic Diagram 2.2 Circuit Function 2.2.1 Power 2.2.2 Clock Input 2.2.3 External References Circuit 6.3 The following sections describe the function of individual circuits. Refer to the relevant data sheet for device operating characteristics. Power is supplied to the EVM via banana jack sockets. By default, the EVM is configured to use a power management solution to supply the ADC and analog and digital power supplies, allowing users to power the board with a single 5-V power supply. The ADC power management solution is based on TI's TPS77533 and TPS73218, which supply 3.3 V and 1.8 respectively. In addition, the EVM offers the capability to supply to the ADC independent 3.3-V analog and 1.8-V digital supplies. The circuit board uses only one ground plane, and the heat slug is tied to ground with multiple vias to provide for thermal dissipation. Table offers a snapshot of the power-supply options. Table EVM Power-Supply Options EVM Banana Jack supply: PECL driver and USB circuitry Single ground plane ADS528x 3.3-V analog supply (only active when JP8 ADS528x 1.8-V digital supply (only active when JP9 A single-ended square or sinusoidal clock input should be applied to J26. The clock frequency should not exceed the maximum speed rating found in the data sheet. Several different clocking options exist to allow flexible evaluation of the ADC. In the default case, a single-ended clock is converted to a differential clock using a Mini-Circuits TC1-1T transformer. When using this option, the ADC should be configured in differential clock mode by writing 0x8001 to ADC register address 0x42. By default, after a software reset this option is asserted to coincide with the EVM default. A second EVM option allows the ADC to be configured in single-ended mode. This is provided to the ADC using an On Semiconductor MC100EPT21 amplifier, which provides for sine-wave to square-wave conversion. This configuration can be used for both ADS528X and ADS527X devices. To use this mode, use the surface-mount jumpers JP3, JP4, and JP5, and configure each one of them to have positions shorted. The EVM offers the ability to force external references to the ADC. By default, the ADC is configured to use the references generated internal to the ADC. To force the ADC to use external references, users must short JP2 pads which in turn grounds the INT/EXT pin of the ADC. Users can then use pin to force a REFB and pin to force a REFT voltage. GND should be connected to pin SLAU205 January 2008 Submit Documentation Feedback

www.ti.com 2.2.4 Analog Inputs 2.2.5 Digital Outputs Circuit inputs, using an SMA connector for each of the eight channels of the ADC. SMA channel inputs are J9, J10, J13, J14, J17, J18, J21, and J22. By default, the ADC accepts a single-ended input and translates it to a differential signal using a Mini Circuits TC1-1T transformer. The ADC inputs are dc-biased by feeding the ADC VCM voltage to the transformer center tap on the secondary windings. Provisions have also been made on the EVM to allow for differential inputs using two SMAs per input channel. The serial LVDS digital outputs can be accessed through the output connector. The EVM is designed to be interfaced to the TI TSW1200 Rev B deserializer card, which plugs into J8. In addition, the EVM can be interfaced to the ADSDeSer-50EVM using a translation card, the ADS5281DeSerAdapter. Both the TSW1200 Rev B and the ADSDeSer-50EVM contain the required parallel 100- Ω termination resistor that must be placed at the receiver to terminate each LVDS data pair properly. Note: TSW1200 Rev Users wishing to use the TSW1200 for deserialization should note that the minimium ADC sampling frequency this can be operated at is MHz. The TSW1200 uses a digital clock manager (DCM) with a minimium operational frequency of MHz. Full documentation on the TI ADSDeSer-50EVM deserializer is found in the ADSDeSer-50EVM Evaluation Module User's Guide SBAU091 and Connecting Xilinx FPGAs to Texas Instruments ADS527x Series ADCs Xilinx application report XAPP774 The VHDL deserializer source code can be found on the Xilinx Web site. SLAU205 January 2008 Submit Documentation Feedback

www.ti.com TI ADC SPI Control Interface 3.1 Installing the ADC SPI Control Software 3.2 Using the TI ADC SPI Interface Software TI ADC SPI Control Interface This section describes the software designed to communicate with the ADC three-wire SPI interface. The information is to be used in conjunction with the device data sheet, which explains the valid registers of the device. The ADC SPI control software can be installed on a personal computer by running the setup.exe file located on the CD. This file installs the graphical user interface (GUI) along with the USB drivers needed to communicate to the USB port that resides on the EVM. After the software is installed and the USB cable has been plugged in for the first time, the user is prompted to complete the installation of the USB drivers. When prompted, users should allow the Windows operating system to search for device drivers, and it should automatically find the TI ADC SPI interface drivers. See Figure Note: First-time operation For proper installation of the necessary USB drivers, users should install the accompanying software before connecting the USB cable to the EVM for the first time. Not doing so could cause problems in communicating to the EVM. Figure TI ADC SPC Interface Screen Once the software is installed and the USB cable is connected, three primary modes of operating the software are available: SPI register write, SPI register write using a script file, and ADS528X frequently used registers. SLAU205 January 2008 Submit Documentation Feedback

www.ti.com 3.2.1 SPI Register Write 3.2.2 SPI Register Write Using a Script File 3.2.2.1 ADS528X Frequently Used Registers TI ADC SPI Control Interface The most basic mode of operation allows full control of writing to individual register addresses. In the top left corner of the interface screen Figure select the ADS528X ADC from the ADC SPI Protocol drop-down list. Next, type the hexadecimal (hex) Address Bytes(s) in and Data Byte(s), which can be found in the device data sheet. When you are ready to send this command to the ADC, press Enter on your keyboard or click the Send Data button. The graph indicator is updated with the patterns sent to the ADC. The default inputs to both the Address Byte(s) and Data Byte(s) fields are hex inputs as designated by the small x in the control. Users can change the default input style by clicking on the x to binary, decimal, octal, or hex. Multiple register writes can be written simply by changing the

contents

Byte(s) and Data Byte(s) fields and pressing "Enter" or "Send Data" again. For situations where the same multiple registers must be written on a frequent basis, users can easily save a script file representing all of the register writes they have performed after a Reset has been issued by simply clicking on the Save Script button. This can easily be loaded at a later time by using the Load Script button. When ready to write the ADC, users can press the Load Script button and be prompted for the file location of their script file. The commands are sent to the ADC when the user acknowledges the selection of the file. Please note that the graph indicator and the frequently used register buttons are not updated when a script file is used. Conversely, users can by using a text editor easily create a script file containing all ADC register writes. An example script file is located in the \\Install Directory \\ADC SPI Control \\Script Files \\ADS5281_Init.reg_ADS528X. Users who wish to take advantage of writing their own script files should start by using the ADS5281_Init.reg_ADS528X as a template file. When editing script files manually, make sure there is no carriage return following the last register write. For ease of use, several buttons have been added that allow one-click register writes of commonly used a subset of the available ADS528X. The buttons are found in the ADS528X tab, as these commands are specific to the ADS528X ADC only. The software writes to the ADC both the clicked. When the ADS528X Reset button is pressed, it issues a software reset to the ADC, and it resets the button values to match the ADC. The graph indicator plots the SPI commands written to the ADC when a button has been pressed. SLAU205 January 2008 Submit Documentation Feedback

www.ti.com TI ADC SPI Control Interface Table ADS528X Frequently Used Registers Default Value Alternate Value a software reset and also sends the initialization routine outlined in the data sheet. Furthermore, the clock is set to differential, which matches the default EVM configuration. A Reset should take place before any evaluation is done. Standby: Off Standby: On Toggles the ADC standby. Powerdown: Off Powerdown: On Toggles the ADC power down. PD: Powerdown PD: Standby Assigns the ADS528X PD pin either a power-down or standby function. Clock: Standby Clock: Differential Sets the ADC to accept either a single-ended or a differential clock. By defualt the ADS528X EVM is configured for a differential clock. LSB first MSB first Toggles the ADC output format. Testmode: None Output Ramp, Output Deskew, Sets the ADC to ignore the analog input and to apply a test Output Synch pattern on the digital output. Duty Cycle Correction: Off Duty Cycle Correction: On Toggles the duty-cycle correction feature. Termination: Off Termination: On Enables the ability to provide a series source termination on the output signals. ADCLK: None ADCLK: 260, 150, 94, 125, 80, 66, Changes the value of the source termination on ADCLK. Ω Note that Termination must be On for values to take effect. LCLK: None LCLK: 260, 150, 94, 125, 80, 66, Changes the value of the source termination on LCLK. Ω Note that Termination must be On for values to take effect. OUT: None OUT: 260, 150, 94, 125, 80, 66, Changes the value of the source termination on the outputs Ω Note that Termination must be On for values to take effect. ADCLK: 3.5 mA ADCLK: 0.5 7.5 mA Changes the output source current on ADCLK. LCLK: 3.5 mA LCLK: 0.5 7.5 mA Changes the output source current on LCLK. OUT: 3.5 mA OUT: 0.5 7.5 mA Changes the output source current on OUT. Power Down: Off (per channel Power Down: On (per channel On an individual-channel basis, allows the user to toggle control) control) power down. Swap Inputs: Off (per channel Swap Inputs: On (per channel On an individual-channel basis, allows the user to toggle control) control) power down. Low-Frequency Noise Low-Frequency Noise Suppression: On an individual-channel basis, allows the user to toggle Suppression: Off (per channel On (per channel control) the low-frequency noise-suppression mode. control) Gain db dB (per Gain db dB (per channel On an individual-channel basis, allows the user to apply channel control) control) gain. SLAU205 January 2008 Submit Documentation Feedback

www.ti.com ADC Evaluation 4.1 Hardware Selection 4.1.1 Analog Input Signal Generator 4.1.2 Clock Signal Generator ADC Evaluation This section describes how to set up a typical ADC evaluation system that is similar to what TI uses to perform testing for data-sheet generation. Consequently, the information in this section is generic in nature and is applicable to all high-speed, high-resolution ADC evaluations. This section covers signal tone analysis, which yields ADC data-sheet figures of merit such as signal-to-noise ratio (SNR) and spurious free dynamic range (SFDR). To reveal the true performance of the ADC under evaluation, great care should be taken in selecting both the ADC signal source and ADC clocking source. When choosing the quality of the ADC analog input source, consider both harmonic distortion performance of the signal generator and the noise performance of the source. In many cases, the harmonic distortion performance of the signal generator is inferior to that of the ADC, and additional filtering is needed if users expect to reproduce the ADC SFDR numbers found in the data sheet. Users can easily evaluate the harmonic distortion of their signal generator by hooking it directly to a spectrum analyzer and measuring the power of the output signal and comparing that to the power of the integer multiples of the output-signal frequency. If the harmonic distortion is worse than the ADC under evaluation, the ADC digitizes the performance of the signal generator and the true ADC SFDR is masked. To alleviate this, it is recommended that users provide additional LC filtering after the signal generator output. Another important metric when deciding on a signal generator is its noise performance. As with the distortion performance, if the noise performance is worse than that of the ADC under evaluation, the ADC digitizes the performance of the source. Noise can be broken into two components, broadband noise and close-in phase noise. Broadband noise can be improved by the LC filter added to improve distortion performance; however, the close-in phase noise typically cannot be improved by additional filtering. Therefore, when selecting an analog signal source, it is important to review the manufacturer's phase-noise plots and take care to choose a signal generator with the best phase-noise performance. Equally important in the high-performance ADC evaluation setup is the selection of the clocking source. Most modern ADCs, the ADS61xx included, accept either a sinusoidal or a square-wave clock input. The key metric in selecting a clocking source is selecting a source with the lowest jitter. This becomes increasingly important as the ADC input frequency in increases, because the ADC SNR evaluation setups can become jitter-limited j as shown by the following equation. SNR (dBc) log π f in t j (rms)) In theory, a square-wave source with femtosecond jitter would be ideal for an ADC evaluation setup. However, in practical terms, most commercially available square-wave generators offer jitter measured in picoseconds, which is too great for high-resolution ADC evaluation setups. Therefore, most evaluation setups rely on the ADC internal clock buffer to convert a sinusoidal input signal into an ultralow-jitter square wave. When selecting a sinusoidal clocking source, it has been shown that phase noise has a direct impact on jitter performance. Consequently, great scrutiny should be applied to the phase-noise performance of the clocking signal generator. TI has found that high-Q monolithic crystal filters can improve the phase noise of the signal generator, and these filters become essential elements of the evaluation setup when high ADC input frequencies are being evaluated. SLAU205 January 2008 Submit Documentation Feedback

www.ti.com 4.2 Coherent Input Frequency Selection ADC Evaluation Typical ADC analysis requires users to collect the resulting time-domain data and perform a Fourier transform to analyze the data in the frequency domain. A stipulation of the Fourier transform is that the signal must be continuous-time; however, this is impractical when looking at a finite set of ADC samples, usually collected from a logic analyzer. Consequently, users typically apply a window function to minimize the time-domain discontinuities that arise when analyzing a finite set of samples. For ADC analysis, window functions have their own frequency signatures or lobes that distort both SNR and SFDR measurements of the ADC. TI uses the concept of coherent sampling to work around the use of a window function. The central premise of coherent sampling entails that the input signal into the ADC is carefully chosen such that when a continuous-time signal is reconstructed from a finite sample set, no time-domain discontinuities exist. To achieve this, the input frequency must be an integer multiple of the ratio of the ADC sample rate s and the number of samples collected from the logic analyzer s The ratio of f s to N s is typically referred to as the fundamental frequency f Determining the ADC input frequency is a two-step process. First, the users select the frequency of interest for evaluating the ADC; then, they divide this by the fundamental frequency. This typically yields a non-integer value, which should be rounded to the nearest odd, preferably prime, integer. Once that integer, or frequency bin bin has been determined, users multiply this with the fundamental frequency to obtain a coherent frequency to program into their ADC input signal generator. The procedure is summarized as follows. f f f s s f bin Odd_round(f desired f Coherent frequency f f f bin SLAU205 January 2008 Submit Documentation Feedback

www.ti.com Errata 5.1 Silkscreen Errata Errata This section describes the known issues with Rev B of the EVM. The JP2 silkscreen incorrectly identifies the internal (INT) and external (EXT) reference selection. The ADC internal reference is selected by shorting pins on JP2, which corresponds to the silkscreen designators of HI or EXT This will be amended in Rev. C of the EVM. SLAU205 January 2008 Submit Documentation Feedback

www.ti.com Physical 6.1 PCB Layout K001 Physical EVM. The EVM is constructed on a 4-layer, 0.062-inch (1.58-mm) thick PCB using FR-4 material. The individual layers are shown in Figure through Figure The layout a common ground plane; however, similar performance can be had with careful layout using a split ground plane. Figure Top Silkscreen SLAU205 January 2008 Submit Documentation Feedback

www.ti.com K002 Physical

www.ti.com K003 Physical

www.ti.com K004 Physical

www.ti.com 6.2 Bill of Materials Physical C1, C3, C23, µ F TANT_B B45196H1336K2 Kemet 10% C25 C2, C4, C24, µ F 603 ECJ-1VB0J105K Panasonic 10% C34 C7, C11 µ F TANT_A B45196H1226K1 Kemet 10% C8, C9, C10, 0.1 µ F 603 ECJ- Panasonic 10% C12, C13, C14, 1VB1C104K C18, C20, C26, C27, C28, C30, C36, C37, C41, C43, C47, C49, C53, C55, C59, C60, C61, C72 C15, C16, C17, 0.01 µ F 603 06035C103KAT2 AVX 10% C22 A C29 µ F 1206 ECJ- Panasonic 10% 3YB1C106K C33 2.2 µ F 603 ECJ-1VB0J225K Panasonic 10% C35, C38, C42, pF 603 ECJ- Panasonic 0.5 pF C44, C48, C50, 1VC1H100D C54, C56 C40, C39, C45 0.1 µ F 402 ECJ-0EB1A104K Panasonic 10% C46, C51, C74, 0.1 µ F SMD_0603 GRM188R71H10 Murata 10% C75 4KA93D C52 0.01 µ F SMD_0603 C0603C103K1R Kemet 10% ACTU C57, C58 pF SMD_0603 GRM1885C2A27 Murata 0JA01D C73 µ F TANT_A TAJA106K016R AVX 10% JP2, JP8, JP9 HEADER 3POS Short pins CTR with shunt connectors DigiKey S9000-ND CONN JUMPER S9000-ND DigiKey SHORTING JP3, JP4, JP5 NO PART SMD_BRIDGE_ Short pins 0603 using Ω resistors J1, J4, RED ST-351A ALLIED ELECTRONICS BLK ST-351B ALLIED ELECTRONICS HEADER JUMPER4 QTH-060-02-F- QTH-040-01-F- Samtec D-A D-DP-A J9, J10, J13, SMA 142-0701-201 Johmson J14, J17, J18, Components J21, J22, J26 J11, J12, J15, NOT SMA 142-0701-201 Johmson J16, J19, J20, INSTALLED Components J23, J24 J25 CONN USB TYP 897-43-004-90- Milmax B FEM 000000 SLAU205 January 2008 Submit Documentation Feedback

www.ti.com Physical (continued) Reference Not Installed Part Footprint Part Number Manufacturer Tolerance L1, L2, L3, Ω at 100 MHz 603 MI0603J680R-10 Steward k Ω at 100 MHZ SMD_0805 BLM21AG102SN Murata R1, Ω 603 ERJ- Panasonic 3GEYJ2R0V Ω 603 ERJ- Panasonic 3GEY0R00V 56.2 k Ω 603 ERJ-3EKF5622V Panasonic R5, R6, R7, R8, 49.9 Ω 603 ERJ- Panasonic R10, R12, R13, 3EKF49R9V R14, R15, R16, R17, R18, R20, R22, R23, R24, R25, R26, R27, R28, R30, R32, R33, R34, R35, R36, R37, R38, R40, R42, R43, R44, R49 R9, R11, R19, Ω 603 ERJ- Panasonic R21, R29, R31, 3GEY0R00V R39, R41 R45, R48 NOT 121 Ω 603 ERJ-3EKF1210V Panasonic INSTALLED R46 Ω 603 ERJ- Panasonic 3EKF10R0V R47, R52 49.9 Ω 402 ERJ- Panasonic 2RKF49R9X R53, R56 k Ω 603 ERJ-3EKF1002V Panasonic R57 4.7 k Ω 603 ERJ- Panasonic 3GEYJ472V R59 1.5 k Ω SMD_0603 ERJ-3EKF1501V Panasonic R60 2.21 k Ω SMD_0603 ERJ-3EKF2211V Panasonic R61 k Ω SMD_0603 ERJ- Panasonic 3GEYJ103V R62, R67 499 Ω 402 ERJ-2RKF4990X Panasonic R63 NOT Ω SMD_0603 ERJ- Panasonic INSTALLED 3GEY0R00V R64, R65 26.7 Ω SMD_0603 ERJ- Panasonic 3EKF26R7V R68 NOT k Ω 603 ERJ-3EKF1002V Panasonic INSTALLED R77 k Ω 603 RC0603FR- Yageo 0728KL R78 56.2 k Ω 603 RC0603FR- Yageo 0756K2L TP1, TP3, TP4, T POINT R TESTPOINT 5002 Keystone TP5 TP2 T POINT R TESTPOINT 5001 Keystone T1, T2, T3, T4, TC1-1T XFMR_TC4-1W TC1-1T Mini Circuits T5, T6, T7, T8, ADS528X_ QFN64 ADS528X TI QFN64 MC100EPT21 MC100EPT21DT On G Semiconductor SLAU205 January 2008 Submit Documentation Feedback

www.ti.com Physical (continued) Reference Not Installed Part Footprint Part Number Manufacturer Tolerance 93C66B TSSOP8 93C66B-I/ST Microchip FT245BM PQFN32 FT245BM Future Technology Devices U10 TPS73201- DBV5 TPS73218DBVT TI SOT23 U11 TPS77533D SOIC8 TPS77533D TI 6.0000 MHz ECS-60-32- ECS 5PDN-TR MP2 Screw, machine, PMS 440 0038 Building PCB legs ph 4-40 PH Fasteners MP3 Stand-off, hex, 1902C Keystone .5/4-40THR Electronic SLAU205 January 2008 Submit Documentation Feedback

www.ti.com 6.3 PCB Schematics 5V_IN 3.3V_SMA 3.3V 1.8V_SMA 1.8V 3.3V_IN 1.8V_IN GND GND +1.8V_LVDD GND GND +3.3V_AUX +3.3V_AVDD GND J5 RED1.8VJ5 RED1.8V C2333UF6.3V C2333UF6.3V 1 2 C2910uF16VC2910uF16V U10 TPS73201-SOT23 U10 TPS73201-SOT23 EN IN GND OUT NC/FB C24 1uF6.3VC24 1uF6.3V12 68□@□100MHz 68□@□100MHz1 68□@□100MHz 68□@□100MHz C341uF6.3VC341uF6.3V R7856.2KR7856.2KR7728KR7728K C333UF6.3V C333UF6.3V 1 2 + C133UF6.3V + C133UF6.3V 1 2 C4 1uF6.3VC4 1uF6.3V12 C30.1uF16VC30.1uF16V U11 TPS77533D U11 TPS77533DGND EN IN IN1 OUT OUT1 NC RESET C27.1uF16VC27.1uF16V JP8JP8 C26.1uF16VC26.1uF16V C28.1uF16VC28.1uF16V 68□@□100MHz 68□@□100MHz1 JP9JP9 J2 BLKGNDJ2 BLKGND J4RED +3.3VJ4RED +3.3V 68□@□100MHz 68□@□100MHz1 J1 RED+5V_INJ1 RED+5V_IN C2533UF6.3V C2533UF6.3V 1 2 C21uF6.3V C21uF6.3V1 2 S001 Physical (Sheet of SLAU205 January 2008 Submit Documentation Feedback

www.ti.com REFTREFB REF_B REF_T VCM +3.3V_AVDD +3.3V_AVDD +3.3V_AVDD +3.3V_AVDD +3.3V_AVDD +3.3V_AVDD +1.8V_LVDD IN1NIN1P IN2NIN2P IN3NIN3P IN4NIN4P OUT1NOUT1P OUT2P OUT2N OUT3P OUT3N OUT4P OUT4N OUT5P OUT5N OUT6P OUT6N OUT7P OUT7N OUT8POUT8N ADCLKN ADCLKP LCLKP LCLKN IN8NIN8PIN7NIN7PIN6NIN6PIN5NIN5P SCLK SDATA CS REFT REFB CLKP CLKN REFB REFT ADCRESET PD VCM ADCLKPADCLKN LCLKNLCLKPOUT5POUT5N OUT4POUT4NOUT6POUT6NOUT7POUT7NOUT8POUT8N OUT3POUT3N OUT2POUT2N OUT1POUT1N DEF AULT:□SHORT 1□&□2 56.2K 56.2K TP2TP2 C332.2uFC332.2uF C18 .1uF C18 .1uF 2□ohm 2□ohm 2□ohm 2□ohm R46 10□ohmR46 10□ohm C9.1uFC9.1uF C22 .001uF C22 .001uF C722uF C722uF C20 .1uF C20 .1uF JP2JP2 1 3 C15 .001uF C15 .001uF R5310KR5310K R30□OHMR30□OHM 1 2 TP1TP1 C10 .1uF C10 .1uF C16 .001uF C16 .001uF 22uF+ 22uF C12 .1uF C12 .1uF C17 .001uF C17 .001uF C13.1uFC13.1uF J8A QTH-060-02-F-D-A J8A QTH-060-02-F-D-A GND 122 GND 121 GND 124 GND 123 C14 .1uF C14 .1uF ADS528X_QFN64 ADS528X_QFN64 IN1P IN1N AVSS IN2P IN2N AVSS IN3P IN3N AVSS IN4P IN4N LVSS PD LVSS OUT1P OUT1N OUT2P17 OUT2N18 OUT3P19 OUT3N20 OUT4P21 OUT4N22 ADCLKP23 ADCLKN24 LCLKP25 LCLKN26 OUT5P27 OUT5N28 OUT6P29 OUT6N30 OUT7P31 OUT7N32 OUT8N OUT8P LVDD LVSS AVSS AVSS AVSS AVSS IN8N IN8P IN7N IN7P IN6N IN6P IN5N IN5P AVDD49 AVDD50 ISET51 TP52 VCM53 REFB54 REFT55 INT/EXT56 AVDD57 CLKP58 CLKN59 AVDD60 CS61 SDATA62 SCLK63 RESET64 GND J6J6 1 2 43 C8.1uFC8.1uF J8B QTH-060-02-F-D-A J8B QTH-060-02-F-D-AGND 126 GND 125 GND 128 GND 127 100 100 101 101 102 102 103 103 104 104 105 105 106 106 107 107 108 108 109 109 110 110 111 112 112 113 113 114 114 115 115 116 116 117 117 118 118 119 119 120 120 R5610KR5610K S002 Physical (Sheet of SLAU205 January 2008 Submit Documentation Feedback

www.ti.com IN1_N IN1-N IN2_N IN2-N IN3_N IN3-N IN4_N IN4-N IN8_N IN5-N IN7_N IN6-N IN6_N IN7-N IN5_N IN8-N IN1_P IN1-P IN2_P IN2-P IN4-P IN4_PIN3_P IN3-P IN5-P IN8_P IN6-P IN7_P IN7-P IN6_P IN8-P IN5_P VCM VCM VCM VCM VCM VCM VCM VCM IN6P IN6NIN5P IN5N IN7NIN7P IN8NIN8P IN1NIN1P IN2NIN2P IN3NIN3P IN4P IN4N R6 49.9R6 49.9 C41 .1uFC41 .1uF R19 0□ohm R19 0□ohm MS A D E NJ19 SMA MS A D E NJ19 SMA 5234 R17 49.9R17 49.9 TC1-1T TC1-1T 3 2 1 654 R30 49.9R30 49.9 R2449.9R2449.9 C4210pFC4210pF MS A D EN J17 SMA MS A D EN J17 SMA 5234 R35 49.9R35 49.9 C3510pFC3510pF TC1-1T TC1-1T 3 2 1 654 R20 49.9R20 49.9 MS A D E NJ15 SMA MS A D E NJ15 SMA 5234 0□ohm 0□ohm MS A D E N J13 SMA MS A D E N J13 SMA 5234 R1449.9R1449.9 R25 49.9R25 49.9 R1349.9R1349.9 R38 49.9R38 49.9 R4349.9R4349.9 C55 .1uFC55 .1uF R41 0□ohm R41 0□ohm R10 49.9R10 49.9 C5610pFC5610pF MS A D E N SMA MS A D E N SMA 5234 TC1-1T TC1-1T 3 2 1 654 R15 49.9R15 49.9 R28 49.9R28 49.9 MS A D E NJ24 SMA MS A D E NJ24 SMA 5234 C49 .1uFC49 .1uF R31 0□ohm R31 0□ohm R3349.9R3349.9 TC1-1T TC1-1T 3 2 1 654 R42 49.9R42 49.9 C5010pFC5010pF MS A D E N J22 SMA MS A D E N J22 SMA 5234 MS A D E NJ20 SMA MS A D E NJ20 SMA 5234 R2349.9R2349.9 R18 49.9R18 49.9 C43 .1uFC43 .1uF R21 0□ohm R21 0□ohm TC1-1T TC1-1T 3 2 1 654 R32 49.9R32 49.9 C4410pFC4410pF MS A D EN J18 SMA MS A D EN J18 SMA 5234 C36 .1uFC36 .1uF R8 49.9R8 49.9 TC1-1T TC1-1T 3 2 1 654 R22 49.9R22 49.9 R36 49.9R36 49.9 C37 .1uFC37 .1uF R11 0□ohm R11 0□ohm MS A D E NJ16 SMA MS A D E NJ16 SMA 5234 MS A D E N J14 SMA MS A D E N J14 SMA 5234 R5 49.9R5 49.9 C3810pFC3810pF R37 49.9R37 49.9 MS A D E NJ12 SMA MS A D E NJ12 SMA 5234 R26 49.9R26 49.9 C53 .1uFC53 .1uF R39 0□ohm R39 0□ohm TC1-1T TC1-1T 3 2 1 654 R12 49.9R12 49.9 MS A D E N J10 SMA MS A D E N J10 SMA 5234 C5410pFC5410pF R4449.9R4449.9 MS A D E NJ23 SMA MS A D E NJ23 SMA 5234 R27 49.9R27 49.9 R16 49.9R16 49.9 C47 .1uFC47 .1uF R29 0□ohm R29 0□ohm TC1-1T TC1-1T 3 2 1 654 R40 49.9R40 49.9 C4810pFC4810pF R7 49.9R7 49.9 MS A D E N J21 SMA MS A D E N J21 SMA 5234 MS A D E NJ11 SMA MS A D E NJ11 SMA 5234 R3449.9R3449.9 S003 Physical (Sheet of SLAU205 January 2008 Submit Documentation Feedback

www.ti.com CLK- CLK+ GND GND GND GND +3.3V_AUX CLKP CLKN C40 0.1uf C40 0.1uf1 R481211/10WDo□Not□Install1%R481211/10WDo□Not□Install1%R451211/10WDo□Not□Install1%R451211/10WDo□Not□Install1% M SA D EN J26 SMAM SA D EN J26 SMA 5234 JP4JP4 1 3 R67499 1%.1WR67499 1%.1W C61 .1uF 16V C61 .1uF 16V C39.1UF16V 10%C39.1UF16V 10% C72.1uF16VC72.1uF16V C60.1uF16VC60.1uF16V JP3JP3 1 3 JP5JP5 1 3 TC1-1T TC1-1T 321 6 5 4 R5249.9 1%.1WR5249.9 1%.1W C45 .1UF16V 10% C45 .1UF16V 10%1 C59 .1uF 16V C59 .1uF 16V MC100EPT21 MC100EPT21NC1 D D VBB VCC Q NC2 VEE R4949.91/10W1%R4949.91/10W1% R62499 1%.1WR62499 1%.1W R47 49.9 0.1W R47 49.9 0.1W S004 Physical

1. EVM Schematics (Sheet of SLAU205 January 2008 Submit Documentation Feedback

www.ti.com SDATA CS ADCRESET PDSCLK +3.3V_AUX SCLKSDATACS ADCRESETPD Do□Not□Install Do□Not□Install Do□Not□Install 1K□□@□100MHZ 1K□□@□100MHZ1 TP4TP4 R68 10KR68 10K R574.7KR574.7K 1 2 J25 CONN□USB TYP B□FEM J25 CONN□USB TYP B□FEM 1 2 93C66B 93C66B CS CLK DI DOUT VSS NC ORG VCC FT245BM FT245BM EESK EEDAT A VCC RESET RST OUT 3V3OUT USBDP USBDM RD 16WR 15TXE 14VCCIO13RXF 12SI/WU11PWREN10GND9 GND D025 VCC26 XTIN27 XTOUT28 AGND29 AVCC30 TEST31 EECS32 R60 2.21K R60 2.21K 1 2 TP3TP3 C57 27pF C57 27pF 1 2 C46.1uFC46.1uF 1 2 R65 26.7 R65 26.7 C74.1uFC74.1uF 1 2 C51 .1uF C51 .1uF1 R64 26.7 R64 26.7 C5827pFC5827pF 1 2 C7310uF C7310uF 1 2 C75.1uFC75.1uF 1 2 R6110KR6110K 1 2 C52.01uFC52.01uF R59 1.5K R59 1.5K TP5TP5 6.0000MHz 6.0000MHz R630□OHMR630□OHM S005 Physical

1. EVM Schematics (Sheet of SLAU205 January 2008 Submit Documentation Feedback

(TI) provides the enclosed product(s) under the following conditions: This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use. Persons handling the product(s) must have electronics training and observe good engineering practice standards. As such, the goods being provided are not intended to be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including product safety and environmental measures typically found in end products that incorporate such semiconductor components or circuit boards. This evaluation board/kit does not fall within the scope of the European Union directives regarding electromagnetic compatibility, restricted substances (RoHS), recycling (WEEE), FCC, CE or UL, and therefore may not meet the technical requirements of these directives or other related directives. Should this evaluation board/kit not meet the specifications indicated in the User s Guide, the board/kit may be returned within days from the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE. The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user indemnifies TI from all claims arising from the handling or use of the goods. Due to the open construction of the product, it is the user s responsibility to take any and all appropriate precautions with regard to electrostatic discharge. EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES. TI currently deals with a variety of customers for products, and therefore our arrangement with the user is not exclusive. TI assumes no liability for

applications

assistance, customer product design, software performance, or infringement of patents or services described herein. Please read the User s Guide and, specifically, the Warnings and Restrictions notice in the User s Guide prior to handling the product. This notice contains important safety information about temperatures and voltages. For additional information on TI s environmental and/or safety programs, please contact the TI application engineer or visit www.ti.com/esh No license is granted under any patent right or other intellectual property right of TI covering or relating to any machine, process, or combination in which such TI products or services might be or are used. FCC Warning This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use. It generates, uses, and can radiate radio frequency energy and has not been tested for compliance with the limits of computing devices pursuant to part of FCC rules, which are designed to provide reasonable protection against radio frequency interference. Operation of this equipment in other environments may cause interference with radio communications, in which case the user at his own expense will be required to take whatever measures may be required to correct this interference. EVM WARNINGS AND RESTRICTIONS It is important to operate this EVM within the input voltage range of V to 3.8 V and the output voltage range of V to 3.8 Exceeding the specified input range may cause unexpected operation and/or irreversible damage to the EVM. If there are questions concerning the input range, please contact a TI field representative prior to connecting the input power. Applying loads outside of the specified output range may result in unintended operation and/or possible permanent damage to the EVM. Please consult the EVM User's Guide prior to connecting any load to the EVM output. If there is uncertainty as to the load specification, please contact a TI field representative. During normal operation, some circuit components may have case temperatures greater than The EVM is designed to operate properly with certain components above C as long as the input and output ranges are maintained. These components include but are not limited to linear regulators, switching transistors, pass transistors, and current sense resistors. These types of devices can be identified using the EVM schematic located in the EVM User's Guide. When placing measurement probes near these devices during operation, please be aware that these devices may be very warm to the touch. Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright 2008, Texas Instruments Incorporated

Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using TI components. To minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI. Reproduction of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for such altered documentation. Information of third parties may be subject to additional restrictions. Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. TI products are not authorized for use in safety-critical applications (such as life support) where a failure of the TI product would reasonably be expected to cause severe personal injury or death, unless officers of the parties have executed an agreement specifically governing such use. Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications, and acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and any use of TI products in such safety-critical applications, notwithstanding any applications-related information or support that may be provided by TI. Further, Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products in such safety-critical applications. TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are specifically designated by TI as military-grade or "enhanced plastic." Only products designated by TI as military-grade meet military specifications. Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is solely at the Buyer's risk, and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use. TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are designated by TI as compliant with ISO/TS 16949 requirements. Buyers acknowledge and agree that, if they use any non-designated products in automotive applications, TI will not be responsible for any failure to meet such requirements. Following are URLs where you can obtain information on other Texas Instruments products and application solutions: Products Applications Amplifiers amplifier.ti.com Audio www.ti.com/audio Data Converters dataconverter.ti.com Automotive www.ti.com/automotive DSP dsp.ti.com Broadband www.ti.com/broadband Clocks and Timers www.ti.com/clocks Digital Control www.ti.com/digitalcontrol Interface interface.ti.com Medical www.ti.com/medical Logic logic.ti.com Military www.ti.com/military Power Mgmt power.ti.com Optical Networking www.ti.com/opticalnetwork Microcontrollers microcontroller.ti.com Security www.ti.com/security RFID www.ti-rfid.com Telephony www.ti.com/telephony RF/IF and ZigBee® Solutions www.ti.com/lprf Video & Imaging www.ti.com/video Wireless www.ti.com/wireless Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright 2008, Texas Instruments Incorporated