B180N55

STB180N55 STMICROELECTRONICS | Alldatasheet

Document overview

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Technical content

This is a preliminary information on a new product foreseen to be developed. Details are subject to change without notice STB180N55 STP180N55 N-CHANNEL 55V - 2.9mΩ - 120A - D²PAK - TO-220 MDmesh™ Low Voltage Power MOSFET General features ULTRA LOW ON-RESISTANCE 100% AVALANCHE TESTED

Description

This N-Channel enhancement mode MOSFET is the latest refinement of STMicroelectronic unique “Single Feature Size™“ strip-based process with less critical aligment steps and therefore a remarkable manufacturing reproducibility. The resulting transistor shows extremely high packing density for low on-resistance, rugged avalanche characteristics and low gate charge.

Applications

HIGH CURRENT SWITCHING APPLICATION Order codes Internal schematic diagram Type VDSS RDS(on) ID STB180N55 55V 3.5mΩ 120A (Note 1) STP180N55 55V 3.8mΩ 120A (Note 1) D²PAK TO-220 Sales Type Marking Package Packaging STB180N55 B180N55 D²PAK TAPE & REEL STP180N55 P180N55 TO-220 TUBE

1 Electrical ratings

Table 1. Absolute maximum ratings Table 2. Thermal data Symbol Parameter Value Unit VDS Drain-source Voltage (VGS=0) V VGS Gate-Source Voltage ± 20 V ID Note 1 Drain Current (continuous) at TC = 25°C 120 A ID Note 1 Drain Current (continuous) at TC = 100°C 120 A IDM Note 2 Drain Current (pulsed) 480 A PTOT Total Dissipation at TC = 25°C 315 W Derating Factor 2.1 W/°C dv/dt Peak Diode Recovery voltage slope TBD V/ns EAS Note 4 Single Pulse Avalanche Energy TBD mJ Tj Tstg Operating Junction Temperature Storage Temperature -55 to 175 TO-220 D²PAK Unit Rthj-case Thermal Resistance Junction-case 0.48 °C/W Rthj-a Thermal Resistance Junction-ambient Max 62.5 °C/W Rthj-pcb Note 5 Thermal Resistance Junction-ambient Max °C/W Tl Maximum Lead Temperature For Soldering Purpose 300

2 Electrical characteristics

Electrical characteristics

(TCASE = 25 °C unless otherwise specified) Table 3. On/off states Table 4. Dynamic Symbol Parameter Test Conditions Min. Typ. Max. Unit V(BR)DSS Drain-Source Breakdown Voltage ID = 250µA, VGS= 0 V IDSS Zero Gate Voltage Drain Current (VGS = 0) VDS = Max Rating, VDS = Max Rating,Tc = 125°C 100 µA µA IGSS Gate Body Leakage Current (VDS = 0) VGS = ±20V ±200 nA VGS(th) Gate Threshold Voltage VDS= VGS, ID = 250µA V RDS(on) Static Drain-Source On Resistance VGS= 10V, ID= 60A D²PAK TO-220 3.5 3.8 mΩ mΩ Symbol Parameter Test Conditions Min. Typ. Max. Unit gfs Note 3 Forward Transconductance VDS =15V, ID = 60A TBD S Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance VDS =25V, f=1 MHz, VGS=0 6200 1800 100 pF pF pF Qg Qgs Qgd Total Gate Charge Gate-Source Charge Gate-Drain Charge VDD=44V, ID = 120A VGS =10V (see Figure 2) 110 TBD TBD TBD nC nC nC

Table 5. Switching times Table 6. Source drain diode (1) Current limited by package (2) Pulse width limited by safe operating area (3) Pulsed: pulse duration = 300µs, duty cycle 1.5% (4) Starting Tj=25°C, Id=60A, Vdd=40V (5) When mounted o inch² FR4 2oz Cu Symbol Parameter Test Conditions Min. Typ. Max. Unit td(on) tr Turn-on Delay Time Rise Time VDD=27V, ID= 60A, RG=4.7Ω, VGS=10V (see Figure 3) TBD TBD ns ns td(off) tf Off voltage Rise Time FallTime VDD=27V, ID= 60A, RG=4.7Ω, VGS=10V (see Figure 3) TBD TBD ns ns Symbol Parameter Test Conditions Min. Typ. Max. Unit ISD ISDM Note 2 Source-drain Current Source-drain Current (pulsed) 120 480 A A VSDNote 3 Forward on Voltage ISD=120A, VGS=0 1.5 V trr Qrr IRRM Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD=120A, di/dt = 100A/µs, VDD=30V, Tj=150°C TBD TBD TBD ns nC A

3 Test circuits

Figure 1. Switching Times Test Circuit For Resistive Load Figure 2. Gate Charge Test Circuit Figure 3. Test Circuit For Indictive Load Switching and Diode Recovery Times Figure 4. Unclamped Inductive Waveform Figure 5. Unclamped Inductive Load Test Circuit Figure 6. Switching Time Waveform

4 Package mechanical data

In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com

DIM. mm. inch MIN. TYP MAX. MIN. TYP. MAX. A 4.40 4.60 0.173 0.181 b 0.61 0.88 0.024 0.034 1.15 1.70 0.045 0.066 c 0.49 0.70 0.019 0.027 D 15.25 15.75 0.60 0.620 E 10.40 0.393 0.409 e 2.40 2.70 0.094 0.106 4.95 5.15 0.194 0.202 F 1.23 1.32 0.048 0.052 6.20 6.60 0.244 0.256 2.40 2.72 0.094 0.107 L 0.511 0.551 3.50 3.93 0.137 0.154 L20 16.40 0.645 L30 28.90 1.137 øP 3.75 3.85 0.147 0.151 Q 2.65 2.95 0.104 0.116 TO-220 MECHANICAL DATA

DIM. mm. inch MIN. TYP MAX. MIN. TYP. MAX. A 4.4 4.6 0.173 0.181 2.49 2.69 0.098 0.106 0.03 0.23 0.001 0.009 B 0.7 0.93 0.027 0.036 1.14 1.7 0.044 0.067 C 0.45 0.6 0.017 0.023 1.23 1.36 0.048 0.053 D 8.95 9.35 0.352 0.368 0.315 E 10.4 0.393 8.5 0.334 G 4.88 5.28 0.192 0.208 L 15.85 0.590 0.625 1.27 1.4 0.050 0.055 1.4 1.75 0.055 0.068 M 2.4 3.2 0.094 0.126 R 0.4 0.015 D2PAK MECHANICAL DATA

5 Packing mechanical data

• on sales type DIM. mm inch MIN. MAX. MIN. MAX. A 330 12.992 B 1.5 0.059 C 12.8 13.2 0.504 0.520 D 20.2 0795 G 24.4 26.4 0.960 1.039 N 100 3.937 T 30.4 1.197 BASE QTY BULK QTY 1000 1000 REEL MECHANICAL DATA DIM. mm inch MIN. MAX. MIN. MAX. 10.5 10.7 0.413 0.421 15.7 15.9 0.618 0.626 D 1.5 1.6 0.059 0.063 1.59 1.61 0.062 0.063 E 1.65 1.85 0.065 0.073 F 11.4 11.6 0.449 0.456 4.8 5.0 0.189 0.197 3.9 4.1 0.153 0.161 11.9 12.1 0.468 0.476 1.9 2.1 0.075 0.082 R 1.574 T 0.25 0.35 0.0098 0.0137 W 23.7 24.3 0.933 0.956 TAPE MECHANICAL DATA

6 Revision History

Revision History

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners © 2006 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America