AV9170

AV9170 IDT | Alldatasheet

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Technical content

Systems, Inc. General Description Features AV9170 0237I—12/02/08 AV9170-05 is only available through America II distributor Block Diagram Clock Synchronizer and Multiplier  On-chip Phase-Locked Loop for clocks synchronization  Synchronizes frequencies up to 107 MHz (output) @ 5.0V  ±1ns skew (max) between input & output clocks @ 5.0V  Can recover poor duty cycle clocks  CLK1 to CLK2 skew controlled to within ±1ns @ 5.0V  3.0 - 5.5V supply range  Low power CMOS technology  Small 8-pin DIP or SOIC package  On chip loop filter  AV9170-01, -04 for output clocks 20-107 MHz @ 5.0V, 20 - 66.7 MHz @ 3.3V  AV9170-02, -05 for output clocks 5-26.75 MHz @ 5.0V, 5 - 16.7 MHz @ 3.3V The AV9170 generates an output clock which is synchronized to a given continuous input clock with zero delay (±1ns at 5V V DD). Using ICS’s proprietary phase- locked loop (PLL) ana-log CMOS technology, the AV9170 is useful for regenerating clocks in high speed systems where skew is a major concern. By the use of the two select pins, multiples or divisions of the input clock can be generated with zero delay (see Tables 2 and 3). The standard versions produce two outputs, where CLK2 is always a divide by two version of CLK1. The AV9170 is also useful to recover poor duty cycle clocks. A 50 MHz signal with a 20/80% duty cycle, for example, can be regenerated to the 48/52% typical of the part. The AV9170 allows the user to control the PLL feedback, making it possible, with an additional 74F240 octal buffer (or other such device that offers controlled skew outputs), to synchronize up to 8 output clocks with zero delay compared to the input (see Figure 1). Application notes for the AV9170 are available. Please consult ICS.

0237I—12/02/08 AV9170-05 is only available through America II distributor Pin Descriptions Pin Configuration 8-Pin DIP or SOIC NIP REBMUN EMANNIPE PYTN OITPIRCSED 1N IBFt upnIT UPNIKCABDEEF 2N It upnIk colcecnereferrofTUPNI 3D NG— D NUORG

40 SFt upnI0 TCELESYCNEUQERF

51 SFt upnI1 TCELESYCNEUQERF

61 KLCt uptuO) seulavrof5,4,3,2,1selbaTeeS(1tuptuoKCOLC

7 DDV —y lppuSrewoP

8K LC tuptuO )seulavrof5,4,3,2,1selbaTeeS(2tuptuoKCOLC

0237I—12/02/08 AV9170-05 is only available through America II distributor The AV9170 has the following characteristics: 1. Rising edges at IN and FBIN are lined up. Falling edges are not synchronized. 2. The relationship between the frequencies at FBIN and IN with CLK1 feedback is shown in Table 1 below. 3. The frequency of CLK2 is half the CLK1 frequency. 4. The CLK1 frequency ranges are: The AV9170 will only operate correctly within these frequency ranges. Using the AV9170 Eliminate High Speed Clock Routing Problems The AV9170 makes it possible to route lower speed clocks over long distances on the PC board and to place an AV9170 next to the device requiring a higher speed clock. The multiplied output can then be used to produce a phase locked, higher speed output clock. Compensate for Propagation Delays Including an AV9170 in a timing loop allows the use of PALs, gate arrays, etc., with loose timing specifications. The AV9170 compensates for the delay through the PAL and synchronizes the output to the input reference clock. Operating Frequency Range The AV9170 is offered in versions optimized for operation in two frequency ranges. The -01 and -04 cover high frequencies, 20 to 100 MHz.* The -02 and -05 operate from 5 to 25 MHz.* The AV9170 can be supplied with custom multiplication factors and operating ranges. Consult ICS for details. 3.3V VDD Operation The AV9170 does operate at both 5.0V and 3.3V system conditions. Please note the Electrical Characteristic specifica-tions at 3.3V include a limited output frequency (66.6 MHz max.) and a wider skew of FBIN to CLK1. For 3.3V±10% (3.0V min.), the skew is widened to -8 ns to 0 ns and should be accounted for in system design. *At 3.3V, the maximum CLK1 frequency is 66.7 MHz for - 01, -04 and 16.7 MHz for -02, -05. Figure 1: Application of AV9170 for Multiple Outputs VDD =5V V DD =3.3V AV9170-01, -04 20 < f CLK1 < 107 MHz* < 66.7 AV9170-02, -05 5 < f CLK1 < 26.75 MHz* < 16.7 1SF0 SFf N IBF) 20-,10-(f N IBF) 50-,40-( 2f NI 4f NI fNI 8fNI 3f NI 5f NI 6f NI 01 f NI Functionality (Table 1:)

0237I—12/02/08 AV9170-05 is only available through America II distributor Absolute Maximum Ratings Voltage on I/O pins referenced to GND . GND – 0.5 V to VDD + 0.5 V Stresses above those listed under Absolute Maximum Ratings above may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those listed in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability. *Parameter guaranteed by design and characterization. Not 100% tested in production. Notes: 1. It may be possible to operate the AV9170 outside of these ranges. Consult ICS for your specific application. 2. All AC Specifications are measured with a 50Ω transmission line, load terminated with 50Ω to 1.4V . 3. Duty cycle measured at 1.4V. 4. Skew measured at 1.4V on rising edges. Positive sign indicates the first signal precedes the second signal. VDD = +5V ±5%, TA = 0°C to 70°C, unless otherwise stated Electrical Characteristics at 5V SCITSIRETCARAHC/CD RETEMARAPL OBMYSS NOITIDNOCTSETN IMP YTX AMS TINU egatloVwoLtupnIV L IV D DV 5=— — 8 .0V egatloVhgiHtupnIV H IV D DV 5=0 .2— — V tnerruCwoLtupnII L IV N IV 0=5 .1–5 –—A µ tnerruChgiHtupnII H IV N IV =D D— — 5 A µ egatloVwoLtuptuO* V L OI L OA m8=— — 4 .0V egatloVhgiHtuptuO* V 1 HO IHO, Am1-= VDDV 0.5= VDDV 4.-—— V egatloVhgiHtuptuO* V 2 HO IHO, Am4-= VDDV 0.5= VDDV 8.-—— V egatloVhgiHtuptuO* V 3 HO IHO, Am8-= 4.2— — V tnerruCylppuSI 1 DD ZHM001,dedaolnU tnerruCylppuSI 2 DD ZHM52,dedaolnU

0237I—12/02/08 AV9170-05 is only available through America II distributor VDD = +5V ±5%, TA = 0°C to 70°C, unless otherwise stated Electrical Characteristics at 5V *Parameter guaranteed by design and characterization. Not 100% tested in production. Notes: 1. It may be possible to operate the AV9170 outside of these ranges. Consult ICS for your specific application. 2. All AC Specifications are measured with a 50Ω transmission line, load terminated with 50Ω to 1.4V . 3. Duty cycle measured at 1.4V. 4. Skew measured at 1.4V on rising edges. Positive sign indicates the first signal precedes the second signal. SCITSIRETCARAHCC/A RETEMARAPL OBMYSS NOITIDNOCTSETN IMP YTX AMS TINU emiTesiRkcolCtupnI* rKLCI— — 0 1s n emiTllaFkcolCtupnI* fKLCI— — 0 1s n V0.2ot8.0,emitesiRtuptuOt r * 1. daolFp51— 6 .02s n %08ot%02,emitesiRV D Dt r * 2. daolFp51— 2 .13s n V8.0ot0.2,emitllaFtuptuOt f * 1. daolFp51— 4 .02s n %02ot%08,emitllaFV D Dt f * 2. daolFp51— 9 .02s n 10-0719VA,elcyCytuDtuptuOd t * 13 ,2etoN.daolFp510 42 5/840 6% 20-0719VA,elcyCytuDtuptuOd t * 23 ,2etoN.daolFp515 41 5/945 5% amgis1,rettiJT s 1* — 5 210 03s p etulosba,rettiJT 1 sba* zHM01>1KLCroF )40-,10-( 005–— 0 05s pzHM5.2>1KLCroF )50-,20-( etulosba,rettiJT 2 sba* zHM01<1KLCroF )40-,10-( —— 2 %zHM5.2<1KLCroF )50-,20-( ycneuqerFtupnI fi1 4 0-,10-0719VA,1etoN8 — 7 01z HM ycneuqerFtupnI fi2 5 0-,20-0719VA2 — 5 7.62z HM 1KLCycneuqerFtuptuO fo1 4 0-,10-0719VA0 2— 7 01z HM 1KLCycneuqerFtuptuO fo2 50-,20-0719VA5 — 5 7.62z HM weksNIotNIBFT 1 weks* daolFp51;4,2etoN sn5<emitesirtupnI 1–3 .0–1 s n weksNIotNIBFT 2 weks* daolFp51;4,2etoN sn01<emitesirtupnI 2–3 .0–2 s n weks2KLCot1KLCT 3 weks* 4 ,2etoN1 –4 .01 s n

0237I—12/02/08 AV9170-05 is only available through America II distributor *Parameter guaranteed by design and characterization. Not 100% tested in production. Notes: 1. It may be possible to operate the AV9170 outside of these ranges. Consult ICS for your specific application. 2. All AC Specifications are measured with a 50Ω transmission line, load terminated with 50Ω to 1.4V. 3. Duty cycle measured at 1.4V. 4. Skew measured at 1.4V on rising edges. Positive sign indicates the first signal precedes the second signal. VDD = +3.3V ±5%, TA = 0°C to 70°C, unless otherwise stated Electrical Characteristics at 3.3V SCITSIRETCARAHC/CD RETEMARAPL OBMYSS NOITIDNOCTSETN IMP YTX AMS TINU egatloVwoLtupnIV L IV D DV 3.3=— — 2 .0V D DV egatloVhgiHtupnIV H IV D DV 3.3=7 .0V D D— — V tnerruCwoLtupnII L IV N IV 0=7 –4 –—A µ tnerruChgiHtupnII H IV N IV =D D— — 5 A µ egatloVwoLtuptuO* V L OI L OA m6=— — 4 .0V egatloVhgiHtuptuO* V 1 HO IHO, Am1-= VDDV 3.3= VDDV 4.-—— V egatloVhgiHtuptuO* V 2 HO IHO, Am3-= VDDV 3.3= VDDV 8.-—— V egatloVhgiHtuptuO* V 3 HO IHO, Am6-= 4.2— — V tnerruCylppuSI 1 DD ZHM7.66,dedaolnU tnerruCylppuSI 2 DD ZHM7.61,dedaolnU

0237I—12/02/08 AV9170-05 is only available through America II distributor *Parameter guaranteed by design and characterization. Not 100% tested in production. Notes: 1. It may be possible to operate the AV9170 outside of these ranges. Consult ICS for your specific application. 2. All AC Specifications are measured with a 50Ω transmission line, load terminated with 50Ω to 1.4V . 3. Duty cycle measured at 1.4V. 4. Skew measured at 1.4V on rising edges. Positive sign indicates the first signal precedes the second signal. VDD = +3.3V ±5%, TA = 0°C to 70°C, unless otherwise stated Electrical Characteristics at 3.3V SCITSIRETCARAHCC/A RETEMARAPL OBMYSS NOITIDNOCTSETN IMP YTX AMS TINU emiTesiRkcolCtupnI* rKLCI— — 0 1s n emiTllaFkcolCtupnI* fKLCI— — 0 1s n V0.2ot8.0,emitesiRtuptuOt r * 1. daolFp51— 1 .12 s n %08ot%02,emitesiRV D Dt r * 2. daolFp51— 8 .14 s n V8.0ot0.2,emitllaFtuptuOt f * 1. daolFp51— 8 .02 s n %02ot%08,emitllaFV D Dt f * 2. daolFp51— 2 .13 s n 40-,10-0719VA,elcyCytuDtuptuOd t * 13 ,2etoN.daolFp510 42 50 6% 50-,20-0719VA,elcyCytuDtuptuOd t * 23 ,2etoN.daolFp515 41 55 5% amgis1,rettiJT s 1* — 0 510 03s p etulosba,rettiJT 1 sba* zHM01>1KLCroF )40-,10-( 005–— 0 05s pzHM5.2>1KLCroF )50-,20-( etulosba,rettiJT 2 sba* zHM01<1KLCroF )40-,10-( 2–— 2 %zHM5.2<1KLCroF )50-,20-( ycneuqerFtupnI fi1 4 0-,10-0719VA7 — 7 .66z HM ycneuqerFtupnI fi2 5 0-,20-0719VA2 — 7 .61z HM 1KLCycneuqerFtuptuO fo1 4 0-,10-0719VA0 2— 7 .66z HM 1KLCycneuqerFtuptuO fo2 50-,20-0719VA5 — 7 .61z HM weksNIotNIBFT 1 weks* daolFp51;4,2etoN weksNIotNIBFT 2 weks* daolFp51;4,2etoN weks2KLCot1KLCT 3 weks* d aolFp51;4,2etoN0 .2–9 .0–0 s n

0237I—12/02/08 AV9170-05 is only available through America II distributor General Layout Precautions: 1) Use a ground plane on the top layer of the PCB in all areas not used by traces. 2) Make all power traces and vias as wide as possible to lower inductance. Notes: 1) All clock outputs should have series terminating resistor. Not shown in all places to improve readibility of diagram. Connections to VDD:

0237I—12/02/08 AV9170-05 is only available through America II distributor

Ordering Information

9170-xxCN08LF (8 Lead Plastic DIP [300 mils]) 9170-xxCS08LF (8 Lead SOIC [150 mils]) 8-Pin DIP PACKAGE 8-Pin SOIC PACKAGE For the SOIC package, the AV9170-01 is marked AV70-1 and the AV9170-02 is marked AV70-2. XXXX - PPP M X#W LF Lead Free, RoHS Compliant (Optional) Lead Count & Package Width Lead Count = 1, 2 or 3 digits W = 0.3" SOIC or 0.6" DIP; None = Standard Width Package Type N = DIP (Plastic) S = SOIC Pattern Number (2 or 3 digit number for parts with ROM code patterns) Device Type (consists of 3 to 7 digit numbers) Example:

0237I—12/02/08 AV9170-05 is only available through America II distributor

Revision History

Rev. Issue Date Description Page # H 11/29/2008 Added LF to ordering information 11 I 12/2/2008 removed ICS prefix from ordering information 11