74ALVT16374 PHILIPS | Alldatasheet

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Technical content

/C0080 /C0115 /C0111/C0110/C0111 /C0115 74ALVT16374 2.5V/3.3V 16-bit edge-triggered D-type flip-flop (3-State) Product specification Supersedes data of 1998 Feb 13 IC23 Data Handbook

1999 Oct 18

Philips Semiconductors Product specification 74ALVT163742.5V/3.3V 16-bit edge-triggered D-type flip-flop (3-State)

21999 Oct 18 853-1844 22537

FEATURES

  • 16-bit edge-triggered flip-flop
  • 5V I/O compatibile
  • 3-State buffers
  • Output capability: +64mA/-32mA
  • TTL input and output switching levels
  • Input and output interface capability to systems at 5V supply
  • Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused inputs
  • Live insertion/extraction permitted
  • Power-up reset
  • Power-up 3-State
  • No bus current loading when output is tied to 5V bus
  • Latch-up protection exceeds 500mA per JEDEC Std 17
  • ESD protection exceeds 2000V per MIL STD 883 Method 3015 and 200V per Machine Model

DESCRIPTION

The 74ALVT16374 is a high-performance BiCMOS product designed for VCC operation at 2.5V or 3.3V with I/O compatibility up to 5V. This device is a 16-bit edge-triggered D-type flip-flop featuring non-inverting 3-State outputs. The device can be used as two 8-bit flip-flops or one 16-bit flip-flop. On the positive transition of the clock (CP), the Q outputs of the flip-flop take on the logic levels set up at the D inputs. QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS TYPICAL UNITSYMBOL PARAMETER Tamb = 25°C 2.5V 3.3V UNIT tPLH tPHL Propagation delay nCP to nQx C L = 50pF 2.6 2.8 2.1 2.3 ns C IN Input capacitance DIR, OE VI = 0V or VCC 3 3 pF C Out Output capacitance Outputs disabled; VO = 0V or VCC 9 9 pF ICCZ Total supply current Outputs disabled 40 40 µA

ORDERING INFORMATION

PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER 48-Pin Plastic SSOP Type III –40°C to +85°C 74ALVT16374 DL AV16374 DL SOT370-1 48-Pin Plastic TSSOP Type II –40°C to +85°C 74ALVT16374 DGG AV16374 DGG SOT362-1

Philips Semiconductors Product specification 74ALVT163742.5V/3.3V 16-bit edge-triggered D-type flip-flop (3-State)

1999 Oct 18 3

LOGIC SYMBOL (IEEE/IEC) 1EN 1 ∇ 2EN 2 ∇ SW00016 1OE 1CP 2OE 2CP 1D1 1D2 1D3 1D4 1D5 1D6 1D7 2D1 2D2 2D3 2D4 2D5 2D6 2D7 2D8 1Q1 1Q2 1Q3 1Q4 1Q5 1Q6 1Q7 1Q8 2Q1 2Q2 2Q3 2Q4 2Q5 2Q8 1D8 2Q6 2Q7 PIN CONFIGURATION 1OE 1Q0 !Q1 GND 1Q2 1Q3 1Q4 1Q5 GND 1Q6 1Q7 2Q0 2Q1 GND 2Q3 V CC 2Q4 VCC 2Q2 2Q5 GND 2Q7 2OE 2Q6 1CP 1D0 1D1 GND 1D2 1D3 1D4 1D5 GND 1D6 1D7 2D0 2D1 GND 2D3 V CC 2D4 VCC 2D2 2D5 GND 2D7 2CP 2D6 SW00017 PIN DESCRIPTION PIN NUMBER SYMBOL FUNCTION 38, 37 36, 35, 33, 32, 30, 29, 27, 26 1D0 - 1D7 2D0 - 2D7 Data inputs 22, 23 1Q0 - 1Q7 2Q0 - 2Q7 Data outputs 1, 24 1OE , 2OE Output enable inputs (active-Low) 48, 25 1CP, 2CP Clock pulse inputs (active rising edge) 39, 45 GND Ground (0V) 7, 18, 31, 42 VCC Positive supply voltage

Philips Semiconductors Product specification 74ALVT163742.5V/3.3V 16-bit edge-triggered D-type flip-flop (3-State)

1999 Oct 18 4

nOE nCP nDx REGISTER nQ0 - nQ7 OPERATING MODE L L l h L H L H Load and read register L ↑ X NC NC Hold H H X nDx NC nDx Z Z Disable outputs H = High voltage level h = High voltage level one set-up time prior to the High-to-Low E transition L = Low voltage level l = Low voltage level one set-up time prior to the High-to-Low E transition NC= No change X = Don’t care Z = High impedance “off” state ↑ = Low-to-High clock transition = Not a Low-to-High clock transition LOGIC DIAGRAM CP Q D nD0 nQ0 CP Q D nD1 CP Q D nD2 CP Q D nD3 CP Q D nD4 CP Q D nD5 CP Q D nD6 CP Q D nD7 nQ1 nQ2 nQ3 nQ4 nQ5 nQ6 nQ7 nCP nOE SW00019

Philips Semiconductors Product specification 74ALVT163742.5V/3.3V 16-bit edge-triggered D-type flip-flop (3-State)

1999 Oct 18 5

ABSOLUTE MAXIMUM RATINGS 1,2 SYMBOL PARAMETER CONDITIONS RATING UNIT VCC DC supply voltage -0.5 to +4.6 V IIK DC input diode current VI < 0 -50 mA VI DC input voltage3 -0.5 to +7.0 V IOK DC output diode current VO < 0 -50 mA VOUT DC output voltage3 Output in Off or High state -0.5 to +7.0 V IOUT DC output current Output in Low state 128 mAIOUT DC out ut current Output in High state -64 mA Tstg Storage temperature range -65 to +150 °C NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C. 3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed. RECOMMENDED OPERATING CONDITIONS SYMBOL PARAMETER 2.5V RANGE LIMITS 3.3V RANGE LIMITS UNITSYMBOL PARAMETER MIN MAX MIN MAX UNIT VCC DC supply voltage 2.3 2.7 3.0 3.6 V VI Input voltage 0 5.5 0 5.5 V VIH High-level input voltage 1.7 2.0 V VIL Input voltage 0.7 0.8 V IOH High-level output current –8 –32 mA IOL Low-level output current 8 32 mAIOL Low-level output current; current duty cycle ≤ 50%; f ≥ 1kHz 24 64 mA Δt/Δv Input transition rise or fall rate; Outputs enabled 10 10 ns/V Tamb Operating free-air temperature range –40 +85 –40 +85 °C

Philips Semiconductors Product specification 74ALVT163742.5V/3.3V 16-bit edge-triggered D-type flip-flop (3-State)

1999 Oct 18 6

DC ELECTRICAL CHARACTERISTICS (3.3V /C00340.3V RANGE) LIMITS SYMBOL PARAMETER TEST CONDITIONS Temp = -40°C to +85°C UNIT MIN TYP 1 MAX VIK Input clamp voltage VCC = 3.0V; IIK = –18mA –0.85 /C00321.2 V VCC = 3.0V; IOL = 100µA 0.07 0.2 VCC = 3.0V; IOL = 64mA 0.4 0.55 VRST Power-up output low voltage6 VCC = 3.6V; IO = 1mA; VI = VCC or GND 0.55 V VCC = 3.6V; VI = VCC or GND Control pins 0.1 ±1 VCC = 3.6V; VI = 0V Data ins4 0.1 -5 IOFF Off current VCC = 0V; VI or VO = 0 to 4.5V 0.1 ±100 µA Bus Hold current VCC = 3V; VI = 0.8V 75 130 IHOLD Bus Hold current Data inputs7 VCC = 3V; VI = 2.0V –75 –140 µA Data inputs7 VCC = 0V to 3.6V; VCC = 3.6V ±500 IEX Current into an output in the High state when VO > VCC VO = 5.5V; VCC = 3.0V 10 125 µA IPU/PD Power up/down 3-State output current3 VCC ≤ 1.2V; VO = 0.5V to VCC ; VI = GND or VCC OE/OE = Don’t care 1 ±100 µA IOZH 3-State output High currentVCC = 3.6V; VO = 3.0V; VI = VIL or VIH 0.5 5 µA IOZL 3-State output Low current VCC = 3.6V; VO = 0.5V; VI = VIL or VIH 0.5 5 µA ICCH VCC = 3.6V; Outputs High, VI = GND or VCC, IO = 0 0.04 0.1 ICCL Quiescent supply current VCC = 3.6V; Outputs Low, VI = GND or VCC, IO = 0 3.7 6 mA ICCZ VCC = 3.6V; Outputs Disabled; VI = GND or VCC, IO = 05 0.04 0.1 ΔICC Additional supply current per input pin2 VCC = 3V to 3.6V; One input at VCC –0.6V, Other inputs at VCC or GND 0.04 0.4 mA NOTES: 1. All typical values are at VCC = 3.3V and Tamb = 25°C. 2. This is the increase in supply current for each input at the specified voltage level other than VCC or GND transition time of 100µsec is permitted. This parameter is valid for Tamb = 25°C only. 4. Unused pins at VCC or GND. 5. ICCZ is measured with outputs pulled up to VCC or pulled down to ground. 6. For valid test results, data must not be loaded into the flip-flops (or latches) after applying power. 7. This is the bus hold overdrive current required to force the input to the opposite logic state. AC CHARACTERISTICS (3.3V /C00340.3V RANGE) GND = 0V; tR = tF = 2.5ns; CL = 50pF; RL = 500Ω ; Tamb = –40°C to +85°C. LIMITS SYMBOL PARAMETER WAVEFORM VCC = 3.3V /C00340.3V UNIT MIN TYP 1 MAX fmax Maximum clock frequency 1 250 MHz tPLH tPHL Propagation delay nCp to nQx 1 1.0 1.0 2.1 2.3 3.2 3.2 ns tPZH tPZL Output enable time to High and Low level 1.0 1.0 2.3 2.0 3.8 3.2 ns tPHZ tPLZ Output disable time from High and Low Level 1.0 1.0 2.7 2.3 4.2 3.4 ns NOTE: 1. All typical values are at VCC = 3.3V and Tamb = 25°C.

Philips Semiconductors Product specification 74ALVT163742.5V/3.3V 16-bit edge-triggered D-type flip-flop (3-State)

1999 Oct 18 7

DC ELECTRICAL CHARACTERISTICS (2.5V /C00340.2V RANGE) LIMITS SYMBOL PARAMETER TEST CONDITIONS Temp = -40°C to +85°C UNIT MIN TYP 1 MAX VIK Input clamp voltage VCC = 2.3V; IIK = –18mA –0.85 –1.2 V VRST Power-up output low voltage7 VCC = 2.7V; IO = 1mA; VI = VCC or GND 0.55 V VCC = 2.7V; VI = VCC or GND Control pins 0.1 ±1 VCC = 2.7V; VI = 0 Data ins4 0.1 -5 IOFF Off current VCC = 0V; VI or VO = 0 to 4.5V 0.1 /C0034100 µA IH O LD Bus Hold current VCC = 2.3V; VI = 0.7V 90 µAHOLD Data inputs6 VCC = 2.3V; VI = 1.7V –10 µA IEX Current into an output in the High state when VO > VCC VO = 5.5V; VCC = 2.3V 10 125 µA IPU/PD Power up/down 3-State output current3 VCC ≤ 1.2V; VO = 0.5V to VCC ; VI = GND or VCC ; OE/OE = Don’t care 1 100 µA IOZH 3-State output High currentVCC = 2.7V; VO = 2.3V; VI = VIL or VIH 0.5 5 µA IOZL 3-State output Low current VCC = 2.7V; VO = 0.5V; VI = VIL or VIH 0.5 –5 µA ICCH VCC = 2.7V; Outputs High, VI = GND or VCC, IO = 0 0.04 0.1 ICCL Quiescent supply current VCC = 2.7V; Outputs Low, VI = GND or VCC, IO = 0 2.7 4.5 mA ICCZ VCC = 2.7V; Outputs Disabled; VI = GND or VCC, IO = 05 0.04 0.1 ΔICC Additional supply current per input pin2 VCC = 2.3V to 2.7V; One input at VCC –0.6V, Other inputs at VCC or GND 0.04 0.4 mA NOTES: 1. All typical values are at VCC = 2.5V and Tamb = 25°C. 2. This is the increase in supply current for each input at the specified voltage level other than VCC or GND transition time of 100µsec is permitted. This parameter is valid for Tamb = 25°C only. 4. Unused pins at VCC or GND. 5. ICCZ is measured with outputs pulled up to VCC or pulled down to ground. 6. Not guaranteed. 7. For valid test results, data must not be loaded into the flip-flops (or latches) after applying power. AC CHARACTERISTICS (2.5V /C00340.2V RANGE) GND = 0V; tR = tF = 2.5ns; CL = 50pF; RL = 500Ω ; Tamb = –40°C to +85°C. LIMITS SYMBOL PARAMETER WAVEFORM VCC = 2.5V /C00340.2V UNIT MIN TYP 1 MAX fmax Maximum clock frequency 1 150 MHz tPLH tPHL Propagation delay nCp to nQx 1 1.5 1.5 2.6 2.8 4.2 4.5 ns tPZH tPZL Output enable time to High and Low level 1.0 1.0 3.4 2.6 5.6 4.7 ns tPHZ tPLZ Output disable time from High and Low Level 2.0 1.0 2.7 2.0 4.4 3.3 ns NOTE: 1. All typical values are at VCC = 2.5V and Tamb = 25°C.

Philips Semiconductors Product specification 74ALVT163742.5V/3.3V 16-bit edge-triggered D-type flip-flop (3-State)

1999 Oct 18 8

GND = 0V; tR = tF = 2.5ns; CL = 50pF; RL = 500Ω ; Tamb = –40°C to +85°C. LIMITS LIMITS SYMBOL PARAMETER WAVEFORM VCC = 2.5V ±0.2V VCC = 3.3V ±0.3V UNIT MIN TYP MIN TYP tS(H) tS(L) Setup time nDx to nCP 2 1.0 1.5 0.4 1.0 1.5 ns th(H) th(L) Hold time nDx to nCP 2 0.5 0.5 0.5 0.5 ns tW (H) tw (L) nCP pulse width High or Low 1 1.5 1.5 1.5 1.5 ns AC WAVEFORMS VM = 1.5V for VCC /C0119 3.0V; VM = VCC /2 for VCC /C0118 2.7V VX = VOL + 0.3V for VCC /C0119 3.0V; VX = VOL + 0.15V for VCC /C0118 2.7V VY = VOH – 0.3V for VCC /C0119 3.0V; VY = VOH – 0.15V for VCC /C0118 2.7V VM VM VM VM VM tw (H) tPHL tPLH nCP nQx SW00168 VOH VOL 1/fMAX tW (L) 3.0V or VCC whichever is less Waveform 1. Propagation Delay, Clock Input to Output, Clock Pulse Width, and Maximum Clock Frequency NOTE: The shaded areas indicate when the input is per- mitted to change for predictable output performance. ÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉ ÉÉÉ ÉÉÉ ÉÉÉ VM nDx VM VM VM VM nCP ts(H) th(H) ts(L) th(L) SW00169 VM 3.0V or VCC whichever is less 3.0V or VCC whichever is less Waveform 2. Data Setup and Hold Times nOE VM tPZH tPHZ nQx VM VM SW00170 VY VOH 3.0V or VCC whichever is less Waveform 3. 3-State Output Enable Time to High Level and Output Disable Time from High Level nOE tPZL tPLZ nQx VM VM VM SW00171 VOL VX 3.0V or VCC whichever is less 3.0V or VCC Waveform 4. 3-State Output Enable Time to Low Level and Output Disable Time from Low Level

Philips Semiconductors Product specification 74ALVT163742.5V/3.3V 16-bit edge-triggered D-type flip-flop (3-State)

1999 Oct 18 9

TEST CIRCUIT AND WAVEFORMS PULSE GENERATOR R T VIN D.U.T. VOUT C L R L VCC R L OPEN VM VM tW AMP (V) NEGATIVE PULSE 10% 10% 90% 90% VM VM tW AMP (V) POSITIVE PULSE 90% 90% 10% 10% tTHL (tF) tTLH (tR )t THL (tF) tTLH (tR ) VM = 1.5V or VCC / 2, whichever is less Input Pulse Definition INPUT PULSE REQUIREMENTS FAMILY Amplitude Rep. Rate t W tR tF 74ALVT16 GND 6V or VCC x 2 SW00162 Test Circuit for 3-State Outputs SWITCH POSITION TEST SWITCH tPHZ /tPZH GND tPLZ /tPZL 6V or VCC x 2 tPLH /tPHL open DEFINITIONS 3.0V or VCC whichever is less ≤10MHz 500ns ≤2.5ns ≤2.5ns R L = Load resistor; see AC CHARACTERISTICS for value. C L = Load capacitance includes jig and probe capacitance; see AC CHARACTERISTICS for value. R T = Termination resistance should be equal to ZOUT of pulse generators.

Philips Semiconductors Product specification 74ALVT163742.5V/3.3V ALVT 16-bit edge-triggered D-type flip-flop (3-State)

1999 Oct 18 10

SSOP48: plastic shrink small outline package; 48 leads; body width 7.5 mm SOT370-1

Philips Semiconductors Product specification 74ALVT163742.5V/3.3V ALVT 16-bit edge-triggered D-type flip-flop (3-State)

1999 Oct 18 11

TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6.1mm SOT362-1

Philips Semiconductors Product specification 74ALVT163742.5V/3.3V ALVT 16-bit edge-triggered D-type flip-flop (3-State)

1999 Oct 18 12

Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Philips Semiconductors

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P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381  Copyright Philips Electronics North America Corporation 1999 All rights reserved. Printed in U.S.A. print code Date of release: 10-99 Document order number: 9397-750-06513 /C0080 /C0115 /C0111/C0110/C0111 /C0115 Data sheet status Objective specification Preliminary specification Product specification Product status Development Qualification Production Definition [1] This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. Data sheet status [1] Please consult the most recently issued datasheet before initiating or completing a design.