DEMO-ATF-5X1P8 BOARDCOM | Alldatasheet

Document overview

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Technical content

Features

  • Single voltage operation
  • High linearity and P1dB
  • Low noise figure
  • Excellent uniformity in product specifications
  • Small package size: 2.0 x 2.0 x 0.75 mm3
  • Point MTTF > 300 years[2]
  • MSL‑1 and lead‑free
  • Tape‑and‑reel packaging option available Specifications
  • 2 GHz; 4.5V, 200 mA (Typ.)
  • 42 dBm output IP3
  • 26.5 dBm output power at 1 dB gain compression
  • 1.5 dB noise figure
  • 17 dB Gain
  • 12.5 dB LFOM[4]

Applications

  • Front‑end LNA Q2 and Q3, driver or pre‑driver amplifier for Cellular/PCS and WCDMA wireless infrastructure
  • Driver amplifier for WLAN, WLL/RLL and MMDS applica‑ tions
  • General purpose discrete E‑pHEMT for other high linear‑ ity applications Note: Package marking provides orientation and identification “2P” = Device Code “x” = Month code indicates the month of manufacture. Note: 1. Enhancement mode technology employs a single positive Vgs, eliminating the need of negative gate voltage associated with conventional depletion mode devices. 2. Refer to reliability datasheet for detailed MTTF data 3. Conform to JEDEC reference outline MO229 for DRP‑N 4. Linearity Figure of Merit (LFOM) is essentially OIP3 divided by DC bias power. Pin 1 (Source) Pin 2 (Gate) Pin 3 Pin 4 (Source) Pin 8 Pin 7 (Drain) Pin 6 Pin 5 2Px Top View Pin 8 Source (Thermal/RF Gnd) Pin 7 (Drain) Pin 6 Pin 5 Pin 1 (Source) Pin 2 (Gate) Pin 3 Pin 4 (Source) Bottom View Attention: Observe precautions for handling electrostatic sensitive devices. ESD Machine Model (Class A) ESD Human Body Model (Class 1C) Refer to Avago Technologies Application Note A004R: Electrostatic Discharge Damage and Control.

TA = 25°C, DC bias for RF parameters is Vds = 4.5V and Ids = 200 mA unless otherwise specified. Symbol Parameter and Test Condition Units Min. Typ. Max.

  1. Measurements obtained using production test board described in Figure 6.

50 Ohm

Figure 6. Block diagram of the 2 GHz production test board used for NF , Gain, OIP3 , P1dB and PAE and ACLR measurements. This circuit achieves a trade- off between optimal OIP3, P1dB and VSWR. Circuit losses have been de-embedded from actual measurements.

Figure 7. Simplified schematic of production test board. Primary purpose is to show 15 Ohm series resistor placement in gate supply. Transmission line tapers, tee intersections, bias lines and parasitic values are not shown.

110 Ohm

15 Ohm

  1. Fmin values at 2 GHz and higher are based on measurements while the Fmins below 2 GHz have been extrapolated. The Fmin values are based on

calculated. Refer to the noise parameter application section for more information.

  1. S and noise parameters are measured on a microstrip line made on 0.025 inch thick alumina carrier. The input reference plane is at the end of

the gate lead. The output reference plane is at the end of the drain lead. Figure 40. MSG/MAG and |S21|2 vs.

  1. Fmin values at 2 GHz and higher are based on measurements while the Fmins below 2 GHz have been extrapolated. The Fmin values are based on

calculated. Refer to the noise parameter application section for more information.

  1. S and noise parameters are measured on a microstrip line made on 0.025 inch thick alumina carrier. The input reference plane is at the end of

the gate lead. The output reference plane is at the end of the drain lead. Figure 41. MSG/MAG and |S21|2 vs.

Figure 42. MSG/MAG and |S21|2 vs.

  1. Fmin values at 2 GHz and higher are based on measurements while the Fmins below 2 GHz have been extrapolated. The Fmin values are based on

calculated. Refer to the noise parameter application section for more information.

  1. S and noise parameters are measured on a microstrip line made on 0.025 inch thick alumina carrier. The input reference plane is at the end of

the gate lead. The output reference plane is at the end of the drain lead.

Figure 43. MSG/MAG and |S21|2 vs.

  1. Fmin values at 2 GHz and higher are based on measurements while the Fmins below 2 GHz have been extrapolated. The Fmin values are based on

calculated. Refer to the noise parameter application section for more information.

  1. S and noise parameters are measured on a microstrip line made on 0.025 inch thick alumina carrier. The input reference plane is at the end of

the gate lead. The output reference plane is at the end of the drain lead.

Figure 44. MSG/MAG and |S21|2 vs.

  1. Fmin values at 2 GHz and higher are based on measurements while the Fmins below 2 GHz have been extrapolated. The Fmin values are based on

calculated. Refer to the noise parameter application section for more information.

  1. S and noise parameters are measured on a microstrip line made on 0.025 inch thick alumina carrier. The input reference plane is at the end of

the gate lead. The output reference plane is at the end of the drain lead.

Figure 13. ATF-521P8 Matching. values used are listed in column 3. Table 1. Resistors for Active Bias. between the two bypass capacitors. Figure 14. 2140 MHz Schematic.

2 x 2 LPCC (JEDEC DFP-N) Package Dimensions

Ordering Information

Part Number No. of Devices Container ATF‑521P8‑TR1 3000 7” Reel ATF‑521P8‑TR2 10000 13”Reel ATF‑521P8‑BLK 100 antistatic bag Device Models Refer to Avago Technologies' Web Site: www.avagotech.com Thus, for reliable operation of ATF‑521P8 and extended MTBF, it is recommended to use some form of thermal heatsinking. This may include any or all of the following suggestions:

  • Maximize vias underneath and around package;
  • Maximize exposed surface metal;
  • Use 1 oz or greater copper clad;
  • Minimize board thickness;
  • Metal heat sinks or extrusions;
  • Fans or forced air;
  • Mount PCB to Chassis. Summary A high linearity Tx driver amplifier for WCDMA has been presented and designed using Agilent’s ATF‑521P8. This includes RF, DC and good thermal dissipation practices for reliable lifetime operation. A summary of the typical performance for ATF‑521P8 demoboard at 2140 MHz is as follows: Demo Board Results at 2140 MHz Gain 16.5 dB OIP3 41.2 dBm ACLR ‑58 dBc P1dB 24.8 dBm NF 1.55 dB References [1] Ward, A. (2001) Avago Technologies ATF-54143 Low Noise Enhancement Mode Pseudomorphic HEMT in a Surface Mount Plastic Package, 2001 [Internet], Available from: <http://www.avagotech.com> [2] Biasing Circuits and Considerations for GaAs MESFET Power Amplifiers , 2001 [Internet], Available from: <http://www.rf ‑solutions.com/pdf/AN‑0002_ajp.pdf> [Accessed 22 August, 2002] D E A P e pin1 R L b DIMENSIONS ARE IN MILLIMETERS DIMENSIONS MIN. 0.70 0.225 1.9 0.65 1.9 1.45 NOM. 0.75 0.02

0.203 REF

0.25 2.0 0.80 2.0 1.6

0.50 BSC

MAX. 0.80 0.05 0.275 2.1 0.95 2.1 1.75 SYMBOL A b D E e pin1 2PX Top View End ViewEnd View Bottom View A A1 0.2 0.25 0.3P 0.35 0.4 0.45L

PCB Land Pattern and Stencil Design 2.80 (110.24) 0.70 (27.56) 0.25 (9.84) 0.25 (9.84) 0.50 (19.68) 0.28 (10.83) 0.60 (23.62) φ0.20 (7.87) PIN 1 Soldermask RF transmission line 0.80 (31.50) 0.15 (5.91) 0.55 (21.65) 1.60 (62.99) 2.72 (107.09) 0.63 (24.80) 0.22 (8.86) 0.32 (12.79) 0.50 (19.68) 0.25 (9.74) 0.63 (24.80) Stencil Layout (top view)PCB Land Pattern (top view) 0.72 (28.35) PIN 1 1.54 (60.61) USER FEED DIRECTION COVER TAPE CARRIER TAPE REEL 8 mm 4 mm 2PX2PX2PX2PX

F W E 10° Max DESCRIPTION SYMBOL SIZE (mm) SIZE (inches) LENGTH WIDTH DEPTH PITCH BOTTOM HOLE DIAMETER P 2.30 ± 0.05 2.30 ± 0.05 1.00 ± 0.05 4.00 ± 0.10 1.00 + 0.25 0.091 ± 0.004 0.091 ± 0.004 0.039 ± 0.002 0.157 ± 0.004 0.039 + 0.002 CAVITY DIAMETER PITCH POSITION D E 1.50 ± 0.10 4.00 ± 0.10 1.75 ± 0.10 0.060 ± 0.004 0.157 ± 0.004 0.069 ± 0.004 PERFORATION WIDTH THICKNESS W 8.00 + 0.30 0.254 ± 0.02 0.315 ± 0.012 8.00 – 0.10 0.315 ± 0.004 0.010 ± 0.0008 CARRIER TAPE CAVITY TO PERFORATION (WIDTH DIRECTION) CAVITY TO PERFORATION (LENGTH DIRECTION) F 3.50 ± 0.05 2.00 ± 0.05 0.138 ± 0.002 0.079 ± 0.002 DISTANCE WIDTH TAPE THICKNESS C Tt 5.4 ± 0.10 0.062 ± 0.001 0.205 ± 0.004 0.0025 ± 0.0004 COVER TAPE D + + Tt 10° Max For product information and a complete list of distributors, please go to our web site: www.avagotech.com Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries. Data subject to change. Copyright © 2005-2009 Avago Technologies. All rights reserved. Obsoletes 5988-9974EN AV02-0846EN - July 7, 2009