ATECC608A-TNGLORAU-C

ATECC608A_V01 MICROCHIP | Alldatasheet

Document overview

• Manufacturer or author: Provided By alldatasheet.com(free datasheet download site)
• PDF pages: 81

Technical content

Features

• Fully Specified Configuration Zone
• I 2C Interface with One-Time Changeable I2C Address
• Compatible with LoRaWAN 1.1 and 1.0 Specifications
• Diversified Network and Application Parent Keys Used to Generate LoRa Session Keys
• IEEE - Extended Unique Identifier (EUI-64) for LoRaWAN Networks is supported
• LoRaWAN Over The Air Activation (OTAA) Support
• Support for TTI Join Servers
• Support for Actility ThingPark ™ Wireless Platform
• Key Slots for Derived Session Keys Based on Diversified Parent Keys Including: – Application/Network session keys – Network/Server integrity keys – Network/Server encryption keys
• Repersonalization Key for Reassigning LoRaWAN Device Network Association
• Elliptic-Curve Cryptography (ECC secp256r1) Private Key for Elliptic-Curve Diffie-Hellman (ECDH) and External Signs
• Storage Slot for ECC Public Key and Compressed Certificates
• I/O Protection Key for Encrypting Data Transfers
• Available in 8-Pad UDFN and 8-Pin SOIC Packages in 2k or 100 Unit Production Quantities and 10 unit prototype sample quantities.

Applications

• Secure Communication with LoRa Sensor and IoT Nodes
• Security Support for Smart Homes/Cities that are Implemented using LoRaWAN © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 1

© 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 2

© 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 3

© 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 4

1. Pin Configuration and Pinouts Table 1-1. Pin Configuration Pin Function NC No Connect GND Ground SDA I2C Serial Data SCL I2C Serial Clock Input VCC Power Supply Figure 1-1. UDFN and SOIC Pinout NC NC NC GND V CC NC SCL SDA 8-lead SOIC (Top View) V CC NC SCL SDA NC NC NC GND 8-pad UDFN (Top View) Note: The UDFN backside paddle is recommended to be connected to GND. ATECC608A-TNGLoRaWAN Pin Configuration and Pinouts © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 5

1. EEPROM Memory and Data Zone Access Policies The EEPROM memory contains a total of 1,400 bytes and is divided into the following zones: Table 2-1. ATECC608A-TNGLoRaWAN EEPROM Zones Zone Description Nomenclature Configuration Zone of 128 bytes (1,024 bits) EEPROM that contains:

• Device Configuration
• Slot Access Policy Information
• Counter Values
• Device Serial Number
• Lock Information The LockConfig byte has already been set. Nothing can be directly written to this zone. The zone can always be read. Config[a:b] = A range of bytes within a field of the Configuration zone. Data Zone of 1,208 bytes (9.7 Kb) split into 16 general purpose read-only or read/ write memory slots. The slots are divided in the following way:
• Slots 0-7 Contain 36 Bytes
• Slot 8 Contains 416 Bytes
• Slots 9-15 Contain 72 Bytes The Access Policy information defined by the Configuration zone bytes determines how each slot can be accessed. The Access Policy for each data slot in the ATECC608A-TNGLoRaWAN device has already been set and the slot Access Policies defined by the Configuration zone are in full effect. Some slots can be read from or written to while others cannot, depending upon that slot's Access Policy. Slot[YY] = The entire contents stored in Slot YY of the Data zone. One-Time Programmable (OTP) Zone of 64 bytes (512 bits) arranged into two blocks of 32 bytes each. For the ATECC608A-TNGLoRaWAN, the zone has been preloaded with a predefined value. This zone cannot be modified but can be read at any time. See Section

2.3 ATECC608A-TNGLoRaWAN EEPROM One-Time Programmable (OTP)

Zone for more information. OTP[bb] = A byte within the OTP zone, while OTP[aa:bb] indicates a range of bytes. Table 2-2. Document Terms Terms discussed within this document will have the following meanings: Term Meaning Block A single 256-bit (32-byte) area of a particular memory zone. The industry standard SHA-256 documentation also uses the term “block” to indicate a 512-bit section of the message input. Within this document, this convention is used only when describing hash input messages. KeyID KeyID is equivalent to the slot number for those slots designated to hold key values. Key 1 (sometimes referred to as key[1]) is stored in Slot[1] and so on. While all 16 slots can potentially hold keys, those slots, which are configured to permit clear-text reads, would not normally be used as private or secret keys by the crypto commands. mode[b] Indicates bit b of the parameter mode. SRAM Contains input and output buffers as well as internal state storage locations. This memory is not directly accessible by the user. See Section 3. Static RAM (SRAM) Memory. Word A single four-byte word of data read from or written to a block. The word is the smallest unit of data access. ATECC608A-TNGLoRaWAN EEPROM Memory and Data Zone Access Policies © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 6

2.1 ATECC608A-TNGLoRaWAN Configuration Zone

The ATECC608A-TNGLoRaWAN is largely fixed and cannot be modified by the customer. When using the Microchip Trust Platform Suite, all configuration information is taken into account by the tools. Relevant Information about how the device is configured is shown below or in the slot information. Device Configuration Information

• The serial number for each device is unique and stored in configuration zone bytes [0:3,8:12]. Serial number bytes [0:1] are 0x01 0x23. Serial number byte[8] is dependent on the vendor. Note that the serial number stored in the configuration zone is split and configuration zone byte[12] maps to the vendor specific serial number byte[8]. – For TTN byte[8] = 27 – For Actility byte[8] = 10 All other serial number bytes are unique.
• The default 7-bit I 2C address is 0x59. The I2C address can be overwritten using the UpdateExtra command. Important: The default I2C address of the ATECC608A-TNGLoRaWAN is not the same as that of the generic non-configured ATECC608A device.
• The I/O levels are set to a fixed reference level and, therefore, the micro can operate at a lower voltage than the ATECC608A-TNGLoRaWAN.
• The watchdog timer is set to a max timeout of 1.3s.
• The use of an I/O Protection key is enabled and stored in Slot 14.
• Slot locking is possible for some of the slots of the ATECC608A-TNGLoRaWAN. For the ATECC608A- TNGLoRaWAN, the following individual slots may be locked: Slots 8, 10 and 14.
• Monotonic counters are available for use by the system and are not attached to any keys.
• The Health Test Failure bit is cleared after any time that a command fails as a result of a health test failure. If the failure symptom was transient, the command may pass when run a second time.
• AES Operations are enabled.
• The KDF AES mode is enabled and the output of the KDF command is encrypted by the I/O Protection Key stored in Slot 14.
• Output of the ECDH command is encrypted by the I/O Protection Key stored in Slot 14..

2.1.1 Modifiable Configuration Zone Bytes

No bytes within the Configuration zone can be directly written since the Config zone has already been locked. Several bytes can still be modified through the use of other commands. SlotLocked Bits For the ATECC608A-TNGLoRaWAN, the following individual slots may be locked: Slots 8, 10 and 14. These can be locked through the SlotLock mode of the Lock command. Each slot where this feature is enabled can be individually locked just once. Once a slot has been locked, it can never be modified or unlocked but can still be used based on the Access Policies defined for that slot. Bytes 88 and 89 store the SlotLocked bytes. Initially, all bits in these bytes are set to a value of one. For those slots that have been locked, the value of the respective bit will be set to a value of zero. I2C Address Redefinition This device configuration has been created such that the I2C address can be redefined one time. The UpdateExtra command can be used to rewrite byte 85 of the Configuration zone to a new I2C address. When this byte is set to a non-zero value, the device configuration uses byte 85 as its I2C address instead of the default address. Once this byte has been rewritten, the device must be powered-down or put into Sleep mode before this change takes effect. ATECC608A-TNGLoRaWAN EEPROM Memory and Data Zone Access Policies © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 7

Important: If there is no need to change the I2C address, this location must be written with the default I2C address. User Extra Byte The UserExtra byte can be used for any desired purpose. This byte can be updated just once with the UpdateExtra command. The UserExtra byte is located at byte 84 of the Configuration zone. Counter[0,1] While the counters are not used by this device, they are not disabled. If so desired, the monotonic counters may be used by the system. Note that the counters are initialized to zero and can count to the maximum value of 2,097,151. The counter value can be incremented or read through the use of the Counter command. How this counter is used is strictly up to the system and independent of anything else on the device. Counter values can be read or updated using the Counter command.

2.2 Data Zone and Access Policies

The following sections describe the detailed access policy information associated with each slot. The actual access policy information is stored within the Slot and Key configuration sections in the EEPROM Configuration zone. Each Data zone slot has two Slot Configuration Bytes and two Key Configuration Bytes associated with it. Together, these four bytes create the “Access Policies” for each slot. The actual type of data stored within the slot is determined by the Access Policies for that slot.

2.2.1 Data Zone Data Types

The following section provides more details on the various types of data capable of being stored in the ATECC608A- TNGLoRaWAN data slots.

2.2.1.1 AES Key Storage

LoRa Security is built around 128-bit AES symmetric keys. A wide variety of AES keys have been implemented to support the LoRaWAN specification in the ATECC608A-TNGLoRaWAN device. These include:

• Network and Application parent keys
• Application sessions keys
• Various types of Network and Server encryption keys
• Network and Server integrity keys The KDF command in AES mode should be used to generate the necessary LoRaWAN session keys based on the AES parent keys stored in Slot 0. Optionally, these keys can be written as clear text. These keys are still considered secret and therefore can only be read via an encrypted read.

2.2.1.2 IEEE EUI-64 Identifier

The IEEE Extended Unique Identifier (EUI) is an 8-byte binary or hexadecimal value, which in this case, is used as a Device EUI to uniquely identify a LoRaWAN node. This globally unique Device EUI (DevEUI) is assigned and written into Slot 10 of the ATECC608A-TNGLoRaWAN. The DevEUI would be part of the reconstructed X.509 Certificate. For the ATECC608A-TNGLoRaWAN the IEEE EUI will be assigned by Microchip. For the ATECC608A-TNGLoRaWAN, the 8-byte DevEUI is actually stored as a 16-byte ASCII-Hex value. Every digit of the hex EUI byte is represented by an ASCII character equivalent to its hexadecimal numerical value. EUI-64 Identifier Example 1. The EUI-64 value is specified as an 8-byte hexadecimal value. 2. The individual hex digits are interpreted as ASCII characters ATECC608A-TNGLoRaWAN EEPROM Memory and Data Zone Access Policies © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 8

1. Each of these characters are then translated to their actual ASCII hexadecimal code. So an 8-byte hexadecimal value will convert to a 16-byte ASCII-Hex value. Note the conversion between the ASCII character and the ASCII code in both decimal and hexadecimal are shown in Table 2-3. Table 2-3. Hex to ASCII Conversion Hex / ASCII Char ASCII Code Hex / ASCII Char ASCII Code DEC HEX DEC HEX “0” 48 0x30 “8” 56 0x38 “1” 49 0x31 “9” 57 0x39 “2” 50 0x32 “A” 65 0x41 “3” 51 0x33 “B” 66 0x42 “4” 52 0x34 “C” 67 0x43 “5” 53 0x35 “D” 68 0x44 “6” 54 0x36 “E” 69 0x45 “7” 55 0x37 “F” 70 0x46 Table 2-4. DevEUI Conversion Example Byte 0 Byte 1 Byte 2 Byte 3 Byte 4 Byte 5 Byte 6 Byte 7 ASCII Char C B 6 F D 5 4 B 4 2 3 1 6 6 C D ASCII Code(DEC)(1) 67 66 54 70 68 53 52 66 52 50 51 49 54 54 67 68 ASCII Code(HEX)(1) 43 42 36 46 44 35 34 42 34 32 33 31 36 36 43 44 Note: (1) This is the actual 16-byte value stored in the data slot that represents the IEEE EUI-64 Identifier.

2.2.1.3 Repersonalization Key

Any given LoRaWAN device can be associated with only one network infrastructure provider. For example, a device that uses the TTI network infrastructure can only communicate to a Cloud Server that uses the TTI controlled LoRaWAN Join server. The same applies to a device that uses Actility as its resource provider. The repersonalization key has been defined to allow a given LoRaWAN node to be securely re-keyed to another network infrastructure provider. The repersonalization key is a diversified key that is used to derive a new set of network and application parent (NwkKey/AppKey) keys stored in Slot 0. If you want to transfer your LoRaWAN node off of the service provider's network, contact the service provider to obtain the necessary information.

2.2.1.4 Nonce Values

Specific nonce values are used with the LoRaWAN protocol. Nonce stands for the number used once and improves security by helping to randomize transactions. For the ATECC608A-TNGLoRaWAN device, a DevNonce is stored in Slot 9. Nonce data are stored as other data and are updated or incremented for each transaction.

2.2.1.5 Private Keys

ECC private keys are the fundamental building blocks of ECC security. These keys are private and unique to each device and can never be read. ECC private keys are randomly generated by the secure element's TRNG at provision-time and are securely held in slots configured as ECC private keys. ECC private keys are not a critical part of the LoRaWAN security specifications. This slot has been provided to allow for ECC security to be added to a customer’s LoRaWAN application. ATECC608A-TNGLoRaWAN EEPROM Memory and Data Zone Access Policies © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 9

This is the primary authentication key. It is permanent and cannot be changed. Each device has its own unique private key. This key is enabled for two primary elliptic curve functions:

• ECDSA Sign for authentication
• ECDH for key agreement. If encryption of the ECDH output is required, then the I/O protection key needs to be This private key is the foundation for the generation of the corresponding public key and the X.509 Certificates.

2.2.1.6 ECC Public Keys

ECC public keys are not required as part of the LoRaWAN security specification. These keys can however be used for additional security use cases. Public keys are always associated with ECC private keys. Every ECC private key will have its own unique public key. For the ATECC608A-TNGLoRaWAN, three possible public keys can be used or generated:

• Slot 1 contains a primary ECC private key that can be used for ECDSA signs. The public key for this slot can always be generated and used for a verify operation.
• Slot 8 contains an ECC public key as part of the X.509 Certificate information. Certificates are not used as part of the LoRa authentication requirements.

2.2.1.7 Certificates Dynamic Storage

X.509 Certificates X.509 Certificates are not a required part of the LoRaWAN security specification. If so desired, a given application may add additional security through use of X.509 Certificates. The ATECC608A-TNGLoRaWAN device has a dedicated Slot 8 for X.509 Certificates. Certificates are saved in a compressed format. This technique may be better called a partial certificate as it stores dynamic certificate information on the device and imposes some limitations. Dynamic information is certificate content that can be expected to change from device to device (e.g., public key, validity dates, etc.). Firmware is expected to have a certificate definition (atcacert_def_t from CryptoAuthLib) with a template of the full X.509 Certificate containing static information (data that are the same for all certificates) and instructions on how to rebuild the full certificate from the dynamic information in the compressed certificate. The following application note documents the compressed certificate format: ATECC Compressed Certificate Definition. The CryptoAuthLib library also contains the atcacert module for working with compressed certificates. Signer Public Key The signer public key is the public key needed to verify the signer and the information that is associated with the signer compressed certificate. For the ATECC608A-TNGLoRaWAN, this is stored in Slot 8 in the first 72 bytes. Device Certificate The Device certificate consists of information associated with the actual end unit for the ATECC608A-TNGLoRaWAN. Signer Certificate The Signer certificate consists of the information associated with the signer used to sign the Device certificate. For the ATECC608A-TNGLoRaWAN. The following table shows the storage locations for the various elements of the ATECC608A-TNGLoRaWAN X.509 Certificate. Table 2-5. Slot 8 Storage Item Slot # Bytes Signer Public Key 8 [0:71] Device Certificate 8 [72:143] ATECC608A-TNGLoRaWAN EEPROM Memory and Data Zone Access Policies © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 10

Item Slot # Bytes Signer Certificate 8 [144:215] Additional Data Storage 8 [216-415]

2.2.1.8 I/O Protection Key

The Verify, ECDH, , and KDF commands can optionally use the I/O protection feature to encrypt some parameters and validate (via MAC) some responses. This is to help protect against man-in-the-middle attacks on the physical I2C bus. However, before this feature can be used, the MCU and ATECC608A-TNGLoRaWAN need to generate and save a unique I/O protection key, essentially pairing the MCU and ATECC608A-TNGLoRaWAN devices to each other. The pairing process must happen on first boot. I/O Protection Key Generation: 1. MCU uses random command to generate a random 32-byte I/O protection key. 2. MCU saves the I/O protection key in its internal Flash. 3. MCU writes I/O protection key to the I/O protection key slot. 4. MCU slot locks that slot to make the I/O protection key permanent. As a pairing check, the MCU could use the MAC command to issue a challenge to the I/O protection key and verify the I/O protection key stored in Flash matches the one in the ATECC608A-TNGLoRaWAN.

2.2.1.9 General Data Storage

No slots have been specifically setup for General Data Storage. Extra data bytes not used within some of the AES keys may potentially be used for additional data storage if required. Discuss this option with Microchip prior to implementing this in any of the slots.

2.2.2 Slot Configuration Terminology

The following section provides a set of terms used to discuss configuration options. The terms are arranged alphabetically. Term Description AES Key Slot can be used as a key source for AES commands. The AES key is 128 bits in width for the ATECC608A-TNGLoRaWAN. Always Write Slot can be written in the clear with the Write command. Clear Read Slot is considered public (non-secret) and its contents can be read in the clear with the Read command. ECDH Elliptic Curve Diffie Hellman. Private key can be used with the ECDH command. Encrypted Write Slot can only be written using an encrypted write based on the write key specified. Ext Sign Private key can be used to sign external (arbitrary) messages. Int Sign Private key can be used to sign internal messages generated by the GenKey or GenDig commands. Used to attest the device's internal keys and configuration. Lockable Slot can be locked at some point in the future. Once locked, the slot contents cannot be changed (read/use only). No Read Slot is considered secret and its contents cannot be read with the Read command. Private keys and symmetric secrets should always be configured as No Read. No Write Slot cannot be changed with the Write command. Permanent Private key is permanent/unchangeable. It is internally generated during factory provisioning. Updatable Private key can be overwritten later with a new, random, internally-generated private key. Its initial value is internally generated during factory provisioning. ATECC608A-TNGLoRaWAN EEPROM Memory and Data Zone Access Policies © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 11

2.2.3 ATECC608A-TNGLoRaWAN Slot Configuration Summary

The ATECC608A-TNGLoRaWAN has 16 slots that can be configured for different use cases. Below is a summary of those slots with their configuration and proposed uses for the ATECC608A-TNGLoRaWAN: Slot Use Case Description Primary Configuration

0 NwkKey/AppKey Derived parent keys - used for

deriving all session keys. These keys are derived with the individual device serial number and master parent key; the derived keys are said to be diversified. Never readable/writable. Derive key can be run with the repersonsalization key as the parent. Must supply DeriveKeyMAC. AES key. 1 Device private key RFU - optional ECC private key. Device private key, public key can be generated from the private key. ECC Private Key. Public Key can be generated, ECDH, external signs, permanent. 2 AppSKey Application session key. Derived from AppKey and other information. AES key. Always writable, encrypted reads with the IO protection key as read key. PubInfo set to allow KDF to write this slot. 3 NwkSEncKey Network session encryption key. Derived from NwkKey and other information. AES key. Always writable, encrypted reads with the IO protection key as read key. PubInfo set to allow KDF to write this slot.

4 SNwkSIntKey Serving network session integrity

key. Derived from NwkKey and other information. AES key. Always writable, encrypted reads with the IO protection key as read key. PubInfo set to allow KDF to write this slot.

5 FNwkSIntKey Forwarding network session integrity

key. Derived from NwkKey and other information. AES key. Always writable, encrypted reads with the IO protection key as read key. PubInfo set to allow KDF to write this slot. 6 JSIntKey Join server integrity key. Derived from NwkKey and other information. AES key. Always writable, encrypted reads with the IO protection key as read key. PubInfo set to allow KDF to write this slot. 7 JSEncKey Join server encryption key. Derived from NwkKey and other information. AES key. Always writable, encrypted reads with the IO Protection Key as read key. PubInfo set to allow KDF to write this slot.

8 Certificate data RFU - signer and device compressed

certificate data. Always readable/writable. ECC public key. Lockable.

9 JoinEUI/DevNonce JoinEUI and DevNonce, stored

together in the same slot. Used in derive key calculation. Always readable/writable.

10 DevEUI Slot to hold a manually assigned

IEEE EUI. Used to derive the session keys Always readable/writable. Lockable. 11 McAppSKey Multicast application session key. AES key. Always writable, encrypted reads with the IO protection key as read key. PubInfo set to allow KDF to write this slot. 12 McNwkSKey Muticast network session key. AES key. Always writable, encrypted reads with the IO protection key as read key. PubInfo set to allow KDF to write this slot. ATECC608A-TNGLoRaWAN EEPROM Memory and Data Zone Access Policies © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 12

Slot Use Case Description Primary Configuration

13 Repersonalization

Diversified key that is used to derive a new set of NwkKey/AppKey parent keys (Slot 0). It can also be used as the encrypted write key for itself (Slot 13). Never read, encrypted write. Repersonalization key is the write key.

14 IO protection key Used to encrypt the output of the

KDF command to encrypt newly derived keys back to the host. It can also be used as the encrypted read key for all session keys. Never readable, always writable, lockable. ReqRand is set.

15 Reserved

2.2.4 ATECC608A-TNGLoRaWAN Detailed Slot Access Policies

The following tables provide a more detailed description of each slot key and slot configuration information along with what commands and command modes can be run using this slot. Table 2-6. Slot 0 Configuration Information Slot Configuration Value Description of Enabled Features

0 Key: NwkKey/AppKey(1,2)

• 128-bit AES diversified network parent key
• 128-bit AES diversified application parent key
• Writes by KDF command are not permitted Slot: • Derive key allowed with authorizing MAC
• Key stored in Slot 13 used for key derivation
• Contents of the slot are secret and cannot be read. Valid commands • DeriveKey command
• KDF AES command source key for generating other derived keys Table 2-7. Slot 1 Configuration Information Slot Configuration Value Description of Enabled Features

1 Key: Device Private Key

• Slot contains the P256 NIST ECC private key
• A public version the of key can always be generated Slot: • Key generation is never permitted
• Contents of this slot are secret
• ECDH operations are permitted
• External signature of arbitrary messages is enabled Valid commands • GenKey - Public Key Generation
• GenKey - PublicKey Digest Generation
• Sign - External Message ATECC608A-TNGLoRaWAN EEPROM Memory and Data Zone Access Policies © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 13

Table 2-8. Slot 2 Configuration Information Slot Configuration Value Description of Enabled Features

2 Key: Application Session Key

• 128-bit AES session key
• Writes by KDF command are permitted Slot: • Writes are always permitted
• Contents of this slot are secret
• Reads from this slot are encrypted using the key stored in Slot 14 Valid commands • Clear Text Write
• KDF Write
• Encrypted Read Table 2-9. Slot 3 Configuration Information Slot Configuration Value Description of Enabled Features

3 Key: Network Session Encryption Key

• 128-bit AES session key
• Writes by KDF command are permitted Slot: • Writes are always permitted
• Contents of this slot are secret
• Reads from this slot are encrypted using the key stored in Slot 14 Valid commands • Clear Text Write
• KDF Write
• Encrypted Read Table 2-10. Slot 4 Configuration Information Slot Configuration Value Description of Enabled Features

4 Key: Serving Network Session Integrity Key

• 128-bit AES session key
• Writes by KDF command are permitted Slot: • Writes are always permitted
• Contents of this slot are secret
• Reads from this slot are encrypted using the key stored in Slot 14 Valid commands • Clear Text Write
• KDF Write
• Encrypted Read ATECC608A-TNGLoRaWAN EEPROM Memory and Data Zone Access Policies © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 14

Table 2-11. Slot 5 Configuration Information Slot Configuration Value Description of Enabled Features

5 Key: Forwarding Network Session Integrity Key

• 128-bit AES session key
• Writes by KDF command are permitted Slot: • Writes are always permitted
• Contents of this slot are secret
• Reads from this slot are encrypted using the key stored in Slot 14 Valid commands • Clear Text Write
• KDF Write
• Encrypted Read Table 2-12. Slot 6 Configuration Information Slot Configuration Value Description of Enabled Features

6 Key: Join Server Integrity Key

• 128-bit AES session key
• Writes by KDF command are permitted Slot: • Writes are always permitted
• Contents of this slot are secret
• Reads from this slot are encrypted using the key stored in Slot 14 Valid commands • Clear Text Write
• KDF Write
• Encrypted Read Table 2-13. Slot 7 Configuration Information Slot Configuration Value Description of Enabled Features

7 Key: Join Server Encryption Key

• 128-bit AES session key
• Writes by KDF command are permitted Slot: • Writes are always permitted
• Contents of this slot are secret
• Reads from this slot are encrypted using the key stored in Slot 14 Valid commands • Clear Text Write
• KDF Write
• Encrypted Read ATECC608A-TNGLoRaWAN EEPROM Memory and Data Zone Access Policies © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 15

Table 2-14. Slot 8 Configuration Information Slot Configuration Value Description of Enabled Features

8 Key: Certificate Data

• Slot contains ECC public key and certificate data
• Slot is lockable Slot: • Writes are always permitted
• Reads are always permitted Valid commands • Write - Clear Text
• Read - Clear Text
• Lock - SlotLock mode
• Verify - Stored Public Key Mode Table 2-15. Slot 9 Configuration Information Slot Configuration Value Description of Enabled Features

9 Key: JoinEUI(3)/DevNonce

• Slot contains other data
• Data are used in derive key calculation Slot: • Writes are always permitted
• Reads are always permitted Valid commands • Write - Clear Text
• Read - Clear Text Table 2-16. Slot 10 Configuration Information Slot Configuration Value Description of Enabled Features

10 Key: DevEUI(4)

• Slot contains other data (manually assigned Device EUI)
• Data is used to derive the session keys
• Slot is lockable Slot: • Writes are always permitted
• Reads are always permitted Valid commands • Write - Clear Text
• Read - Clear Text
• Lock - SlotLock mode ATECC608A-TNGLoRaWAN EEPROM Memory and Data Zone Access Policies © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 16

Table 2-17. Slot 11 Configuration Information Slot Configuration Value Description of Enabled Features

11 Key: Multicast Application Session Key

• Slot contains 128-bit AES session key
• Writes by KDF command are permitted Slot: • Writes are always permitted
• Contents of this slot are secret
• Reads from this slot are encrypted using the key stored in Slot 14 Valid commands • Write - Clear Text
• KDF - AES Mode
• Encrypted Read
• AES Table 2-18. Slot 12 Configuration Information Slot Configuration Value Description of Enabled Features

12 Key: Multicast Network Session Key

• Slot contains 128-bit AES session key
• Writes by KDF command are permitted Slot: • Writes are always permitted
• Contents of this slot are secret
• Reads from this slot are encrypted using the key stored in Slot 14 Valid commands • Write - Clear Text
• KDF - AES Mode
• Encrypted Read
• AES Table 2-19. Slot 13 Configuration Information Slot Configuration Value Description of Enabled Features

13 Key: Repersonalization Key

• Slot contains a SHA256 key Slot: • Slot may be written with an encrypted write back to itself
• Data stored in slot is secret and reads are prohibited
• Key cannot be used with the MAC command. Valid commands • Encrypted Write
• CheckMac
• GenDig ATECC608A-TNGLoRaWAN EEPROM Memory and Data Zone Access Policies © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 17

Table 2-20. Slot 14 Configuration Information Slot Configuration Value Description of Enabled Features

14 Key: IO Protection Key

• Slot contains a SHA-256 key
• A random nonce is required when using this key
• This slot is lockable Slot • Slot is always writable
• Data in slot is secret and reads are prohibited Valid commands • Write - Clear Text
• CheckMac
• GenDig
• Lock - SlotLock mode Notes: 1. Each Major LoRa Network provider will have their own Unique parent key which is used to generate the diversified keys stored in the ATECC608A-TNGLoRaWAN device. 2. For the ATECC608A-TNGLoRaWAN Diversified Parent Keys are generated based on TTI, or Actility. 3. The JoinEUI value is associated with a particular network provider. For the ATECC608A-TNGLoRaWAN this value will be associated with either TTI or Actility. 4. The DevEUI is an IEEE Extended Unique Identifier. Each device will have its own value. For the ATECC608A- TNGLoRaWAN the DevEUI will be assigned by Mircrochip.

2.3 ATECC608A-TNGLoRaWAN EEPROM One-Time Programmable (OTP) Zone

The OTP zone of 64 bytes (512 bits) is part of the EEPROM array and can be used for read-only storage. It is organized as two blocks of 32 bytes each. For the ATECC608A-TNGLoRaWAN, the OTP zone is shipped pre-locked and contains the following information: TTI OTP Zone Values 6A 73 4D 75 37 69 59 4F 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 Actility OTP Zone Values 30 39 71 4A 4E 78 49 33 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 The data byte values written into the OTP zone are always available for reading using either 4 or 32-byte reads but can never be modified. Notice: The bytes in the OTP zone may change over time. These values should not be used in any cryptographic calculations. ATECC608A-TNGLoRaWAN EEPROM Memory and Data Zone Access Policies © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 18

1. Static RAM (SRAM) Memory The device also includes an SRAM array that is used to store the input command or output result, nonces, intermediate computation values, ephemeral keys, the SHA context, etc. The contents of the SRAM can never be read directly; only used internally by the secure element. The entire contents of this memory are invalidated whenever the device goes into Sleep mode or the power is removed. The SRAM Array consists of the following buffers: TempKey TempKey is the primary storage register in the SRAM array that can be used to store various intermediate values generated by various commands. TempKey is 64 bytes long and is divided into an upper and lower half. The contents of this register can never be read from the device (although the device itself can read and use the contents internally). Message Digest Buffer The Message Digest Buffer is a 64-byte register that is used to convey the input message digest to the Verify and Sign commands when the TempKey register is needed to retain different information. The SHA command can write a digest directly to this register to simplify external host programming. Alternate Key Buffer The Alternate Key Buffer is a 32-byte register that can be used by the KDF command to store keys when the TempKey register is needed to retain different information. It can be written to a fixed input value by the Nonce command or to a secret value by the KDF command. SHA Context Buffer The SHA context buffer allows for the generation of a digest to be interrupted to do other functions or to generate other digests. The SHA command uses a standard three-phase flow: Initialize, Update and Finalize. In many situations, the Update phase is run many times. Internal SRAM memory is used to store the intermediate state, aka SHA context, between these phases. ATECC608A-TNGLoRaWAN Static RAM (SRAM) Memory © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 19

1. General Command Information The following sections provide some general information on the basic I/O transactions, command structure, error codes, memory addressing and formatting of keys and signatures that are used in the ATECC608A-TNGLoRaWAN.

4.1 I/O Transactions

The ATECC608A-TNGLoRaWAN uses the I2C protocol to communicate with a host microcontroller. Security commands are sent to the device and responses are received from the device within a transaction that is constructed in the following way: Table 4-1. I/O Transaction Format Byte Name Meaning 0 Count Number of bytes to be transferred to (or from) the device in the group, including the count byte, packet bytes and checksum bytes. Therefore, the count byte must always have a value of (N+1), where N is equal to the number of bytes in the packet plus the two checksum bytes. For a group with one count byte, 50 packet bytes and two checksum bytes, the count byte must be set to 53. The maximum size group (and value of count) is 155 bytes and the minimum size group is four bytes. Values outside this range will cause the device to return an I/O error. 1 to (N-2) Packet Command, parameters and data or response. See Section 4.2 Command Packets for general command packet information or Section 5. Device Commands for specific parameters for each command. N-1, N Checksum CRC-16 verification of the count and packet bytes. The CRC polynomial is 0x8005. Prior to the start of the CRC calculation, the CRC register is initialized to zero. After the last bit of the count and packet have been transmitted, the internal CRC register must have a value that matches the checksum bytes in the block. The first CRC byte transmitted (N-1) is the Least Significant Byte of the CRC value, so the last byte of the group is the Most Significant Byte of the CRC. The ATECC608A-TNGLoRaWAN is designed to have the count value in the input group consistent with the size requirements that are specified in the command parameters. If the count value is inconsistent with the command opcode and/or parameters within the packet, the ATECC608A-TNGLoRaWAN responds in different ways depending upon the specific command. The response may either include an error indication or some input bytes may be silently ignored.

4.2 Command Packets

The command packet is broken down as shown in Table 4-2: Table 4-2. Command Packets Byte Name Meaning 0 Opcode The command code. See Section 5. Device Commands . 1 Param1 The first parameter; always present. 2 – 3 Param2 The second parameter; always present. 0 – 155 Data Optional remaining input data. After the ATECC608A-TNGLoRaWAN receives all the bytes in a group, the device transitions to the Busy state and attempts to execute the command. Neither status nor results can be read from the device when it is busy. During this time, the I/O interface of the device ignores all transitions on the I2C SDA input signal. ATECC608A-TNGLoRaWAN General Command Information © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 20

4.3 Status/Error Codes

The device does not have a dedicated STATUS register, so the output FIFO is shared among status, error, and command results. All outputs from the device are returned to the system as complete groups which are formatted identically to input groups:

• Count
• Packet
• Two byte CRC After the device receives the first byte of an input command group, the system cannot read anything from the device until the system has sent all the bytes to the device. After the wake and execution of a command, there will be error, status, or result bytes in the device’s output register that can be retrieved by the system. For a four bytes length of that group, the codes returned are detailed in Table 4-3. Some commands return more than four bytes when they execute successfully. The resulting packet description is listed in Section 5. Device Commands . CRC errors are always returned before any other type of error. They indicate that an I/O error occurred, and that the command may be resent to the device. No particular precedence is enforced among the remaining errors if more than one occurs. Table 4-3. Status/Error Codes in Four Byte Groups State Description Error/ Status

Description

0x00 Command executed successfully. Checkmac or Verify Miscompare 0x01 The CheckMac or Verify command was properly sent to the device, but the input response did not match the expected value. Parse error 0x03 Command was properly received but the length, command opcode, or parameters are illegal regardless of the state (volatile and/or EEPROM configuration) of the ATECC608A-TNGLoRaWAN. Changes in the value of the command bits must be made before it is re-attempted. ECC Fault 0x05 A computation error occurred during ECC processing that caused the result to be invalid. Retrying the command may result in a successful execution. Self Test error 0x07 There was a Self Test error and the chip is in Failure mode waiting for the failure to be cleared. Health Test error 0x08 There was a random number generator Health Test error and the chip fails subsequent commands requiring a random number until it is cleared. Execution error 0x0F Command was properly received but could not be executed by the device in its current state. Changes in the device state or the value of the command bits must be made before it is re-attempted. After Wake, Prior to First command 0x11 Indication that ATECC608A-TNGLoRaWAN has received a proper Wake token. Watchdog About to Expire 0xEE There is insufficient time to execute the given command before the Watchdog Timer expires. The system must reset the Watchdog Timer by entering the Idle or Sleep modes. CRC or Other Communications error 0xFF Command was not properly received by ATECC608A-TNGLoRaWAN and should be retransmitted by the I/O driver in the system. No attempt was made to parse or execute the command. ATECC608A-TNGLoRaWAN General Command Information © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 21

4.4 Address Encoding

The following subsections provide detailed information on how to address the various memory zones of the ATECC608A-TNGLoRaWAN device.

4.4.1 Configuration Zone Addressing

The Configuration zone can be accessed either 4 or 32 bytes at a time. Individual bytes cannot be accessed. The Configuration zone address is a 2-byte (16-bit value). Only the lowest five bits of the address word are used in addressing of the Configuration zone. For the ATECC608A-TNGLoRaWAN device, these addresses can only be used with the Read command. Table 4-4. Address Format Byte 1: Addr[15:8] Byte 0: Addr[7:0] Unused Unused Block Offset Addr[15:8] Addr[7:5] Addr[4:3] Addr[2:0] Table 4-5. Configuration Zone Addresses Block # (Addr[4:3]) Offset Value (Addr[2:0]) 000 001 010 011 100 101 110 111

4.4.2 OTP Zone Addressing

The One-Time Programmable (OTP) zone can be accessed either 4 or 32 bytes at a time. The zone has a total of 64 bytes. Individual bytes cannot be accessed. The OTP zone address is a 2-byte (16-bit value). Only the lowest four bits are used in addressing. For the ATECC608A-TNGLoRaWAN device, these addresses can only be used with the Read command. Table 4-6. Address Format Byte 1: Addr[15:8] Byte 0: Addr[7:0] Unused Unused Block Offset Addr[15:8] Addr[7:4] Addr[3] Addr[2:0] Table 4-7. OTP Zone Byte Addresses Block # (Addr[3) Block Offset Value (Addr[2:0]) 000 001 010 011 100 101 110 111 ATECC608A-TNGLoRaWAN General Command Information © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 22

4.4.3 DataZone Addressing

Read/Write access to the Data zone is much more complex than the Configuration and OTP zones. There are a total of 16 slots and the size of the slots vary. Each slot’s access policies individually control whether or not a slot has the ability to be read or written. For the ATECC608A-TNGLoRaWAN:

• Data Slots 2-7, 8-12 and 14 can be written as clear text.
• Data Slot 13 can be written with encrypted text.
• Data Slots 8, 9, 10 can be read as clear text.
• Data Slots 2-7 and 11-12 can be read as encrypted text.
• Any slots not specified cannot be read or written. Table 4-8. Address Format by Data Slot Size Data Zone Byte 1 Addr[15:8] Byte 0: Addr[7:0] Unused Block Unused Slot Offset Data Slots[7:0] Addr[15:9] Addr[8] Addr[7] Addr[6:3] Addr[2:0] Data Slot[8] Addr[15:12] Addr[11:8] Addr[7] Addr[6:3] Addr[2:0] Data Slot[15:9] Addr[15:10] Addr[9:8] Addr[7] Addr[6:3] Addr[2:0] Data Slots[7:0] To fully access one of these slots require two 32-byte accesses or nine 4-byte accesses Table 4-9. Data Zone Addresses Slots 0-7 Slot# (Addr[6:3]) Block # (Addr[8]) Block Offset Value (Addr[2:0]) 000 001 010 011 100 101 110 111 01 [32:35] Not Valid Not Valid Not Valid Not Valid Not Valid Not Valid Not Valid Data Slot[8] To fully access this slot require thirteen 32-byte accesses or 104 4-byte accesses or a combination of the two methods. Table 4-10. Data Zone Addressing Slot 8 Slot# (Addr[6:3]) Block # (Addr[8]) Block Offset Value (Addr[2:0]) 000 001 010 011 100 101 110 111 Data Slots[15:9] To fully access these slots requires three 32-byte accesses or eighteen 4-byte accesses or a combination of the two methods. ATECC608A-TNGLoRaWAN General Command Information © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 23

Table 4-11. Data Zone Addressing Slots 9-15 Slot# (Addr[6:3]) Block # (Addr[8]) Block Offset Value (Addr[2:0]) 000 001 010 011 100 101 110 111 10 [64:67] [68:71] Not Valid Not Valid Not Valid Not Valid Not Valid Not Valid

4.5 Formatting of Keys, Signatures and Certificates

The following sections provide detailed formatting information for ECC keys, Signatures and Compressed certificates.

4.5.1 ECC Key Formatting

The format for public and private keys depends on the command and key length. In general, the Most Significant Bytes (MSB) appear first on the bus and at the lowest address in memory. In the remainder of this section below, the bytes on the left side of the page are the MSBs. Microchip recommends all pad bytes be set to zero for consistency.

• ECC private keys appear to the user only as the input parameter to the PrivWrite command. This parameter is always 36 bytes in length and the first four bytes (32 bits) are all pad bits. ECC public keys appear as the input or output parameters to several commands, and they can also be stored in EEPROM. They are composed of an X value first on the bus or in memory, followed by a Y value. They are formatted differently depending on the situation as noted below:
• The public key is an output of the GenKey command or an input to the Verify command: 32 bytes of X, then 32 bytes of Y. (36 bytes) There are no pad bytes.
• Write command: Public keys can be written directly to the EEPROM using the Write command and are always 72 bytes long, formatted as follows: 4-pad bytes, 32 bytes of X, four pad bytes, then 32 bytes of Y.
• GenKey command: SHA Message: Public keys can be hashed and placed in TempKey by the GenKey command. The SHA message contains various bytes that are independent of the size of the key. These are followed by 25 bytes of pad, followed by 32 bytes of X, then by 32 bytes of Y.
• Verify command: SHA Message: When used to validate a stored public key, the Verify command expects an input signature created over a SHA-256 digest of a key stored in memory. Such an inner SHA calculation is always performed over 72 bytes formatted as they are stored in EEPROM as 4-pad bytes, 32 bytes of X, 4-pad bytes, then 32 bytes of Y. When a public key is configured to be validated by the Verify command, the Most Significant four bits of the first byte in memory are used internally by the device to save the validation state. They are always set to the invalid state (0xA) by the Write command, and then may be set to the Valid state (0x5) by the Verify command. The lowest levels of the I/O protocols are described below. Above the I/O protocol level, the exact same bytes are transferred to and from the device to implement the commands. Error codes are documented in the following sections.

4.5.1.1 Public Key Formats

The ATECC608A-TNGLoRaWAN works with the P-256 elliptic curve public keys in two formats. The following example illustrates those two formats in detail. For the following examples, we'll use a sample public key, with the X and Y integers expressed as fixed-width big- endian unsigned integers: X: b2be345ad7899383a9aab4fb968b1c7835cb2cd42c7e97c26f85df8e201f3be8 Y: a82983f0a11d6ff31d66ce9932466f0f2cca21ef96bec9ce235b3d87b0f8fa9e ATECC608A-TNGLoRaWAN General Command Information © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 24

Any command that returns a public key (GenKey) or accepts a public key as a parameter (Verify and ECDH) will format the public key as the X and Y big-endian unsigned integers concatenated together for a total of 64 bytes. For example: b2be345ad7899383a9aab4fb968b1c7835cb2cd42c7e97c26f85df8e201f3be8 a82983f0a11d6ff31d66ce9932466f0f2cca21ef96bec9ce235b3d87b0f8fa9e Stored Public Key Format When storing a public key in a slot for use with the Verify command, the X and Y integers will be padded out to 36 bytes and concatenated together for a total of 72 bytes. For example: 00000000b2be345ad7899383a9aab4fb968b1c7835cb2cd42c7e97c26f85df8e201f3be8 00000000a82983f0a11d6ff31d66ce9932466f0f2cca21ef96bec9ce235b3d87b0f8fa9e Note: Only slots 8-15 are large enough to hold a public key. Stored Validated Public Key Format A validated or invalidated public key format is the same as a stored public key format with the exception of the four Most Significant bits of the LSB. If a key is validated, the Least Significant Nibble will be 0x5 and 0xA if invalidated. These values can be changed by the Verify command in Validate or Invalidate mode. When written, the key will be initially invalidated. Example Validated Public Key: 50000000b2be345ad7899383a9aab4fb968b1c7835cb2cd42c7e97c26f85df8e201f3be8 00000000a82983f0a11d6ff31d66ce9932466f0f2cca21ef96bec9ce235b3d87b0f8fa9e Example Invalidated Public Key: A0000000b2be345ad7899383a9aab4fb968b1c7835cb2cd42c7e97c26f85df8e201f3be8 00000000a82983f0a11d6ff31d66ce9932466f0f2cca21ef96bec9ce235b3d87b0f8fa9e Note: Only slots 8-15 are large enough to hold a public key.

4.5.2 Signature Format

The ECDSA signature that is generated and output by the Sign command or input to the Verify command is always 64 bytes in length. The signature is divided into R and S components. Both components are 32 bytes in length and R always appears before S on the bus. Each portion of the signature appears MSB first on the bus, meaning the MSB of the signature is in the lowest memory location. Example R/S Signature Any command that returns a signature (Sign) or accepts a signature as a parameter (Verify) will format the signature as the R and S big-endian unsigned integers concatenated together for a total of 64 bytes. For example: R: 7337887F8C39DF79FD8BF88DDFBFB9DB15D7B1AD68196AE3FB0CE5BFA2842DF3 S: 72868A43A42831E950E1DA9F73B29F5C0ED8A96B2889E3CBBE8E61EA6C67F673

4.5.3 Certificate Storage

The amount of storage required for a full X.509 Certificate within the device can rapidly use up multiple EEPROM memory slots. Depending on the actual application, it may or may not be desirable to use these slots for certificate storage. Due to these memory limitations, Microchip has defined an encoding that allows for a full X.509 Certificate to be reconstructed from a minimal amount of information. The host system would actually be responsible for reconstructing the full X.509 Certificate but how to do this will be determined by the data stored in the encoded certificate. Data that are common to all devices for a given system can readily be stored in the host system. Other data can readily be calculated or extracted from data that are already stored in the device. Table 4-12 indicates the type of data that are stored in an X.509 Certificate and how it can be encoded to fit into a single 72-byte slot. ATECC608A-TNGLoRaWAN General Command Information © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 25

Table 4-12. Certificate Storage X.509 Certificate Encoded Certificate X.509 Element Size (Bytes) Encoded Certificate Element Device Cert (Bits) Signer Cert (Bits) Serial Number 8-20 Serial number source 4 4 Issue Date 13 Compressed format 19 19 Expiry Date 13 # of years before expiration 5 5 Signer ID2 4 ID of the specific signer used to sign the certificate (device cert) or of the signer itself (signer cert) 16 16 AuthorityKeyIdentifier 20 SHA1 HASH of the authority public key 0 0 SubjectKeyIdentifier 20 SHA1 HASH of the subject public key 0 0 Signature R 32 Stored in device 256 256 Signature S 32 Stored in device 256 256 Public Key X1 32 Calculated from the private key or stored in the device1 0 256 Public Key Y1 32 Calculated from the private key or stored in the device1 0 256 n/a 0 Cert format 4 4 n/a 0 Template ID 4 4 n/a 0 Chain ID 4 4 n/a 0 Reserved/User Defined 8 8 Total (206-218 bytes) — 576 bits (72 bytes) 1088 bits (136 bytes) Notes: 1. For the device certificate, the device public key can be regenerated from the private key. For the signer certificate, the public key is typically stored in a separate slot. 2. For the device certificate, the ID of the signer used to sign the certificate is stored. For the signer certificate, the actual ID of the signer is stored so that the device can identify it. Slot 8 contains a total of 416 bytes. Depending on the size of the serial number stored in the cert, it may or may not be possible to store two complete certificates. Often within devices where a chain of trust has been created, the device certificate, the signer certificate and the signer public key must be stored within the device. For more information, see the Compressed Certificate Definition Application Note. ATECC608A-TNGLoRaWAN General Command Information © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 26

1. Device Commands The following section details all of the commands broken out by Command mode that are allowed in the ATECC608A-TNGLoRaWAN. The commands have been broken into three categories: 1. General Device Commands These commands fall into two categories:

• General device access commands that are used to send data to the device or retrieve data but typically do not perform any cryptographic functions.
• General cryptographic commands that can be used by the device or the system but typically do not operate on specific data slots. 2. Asymmetric Cryptography Commands These commands perform asymmetric cryptographic operations, such as key generation, message signing and message verification that utilize an ECC public or private key. These commands are limited to use on ECC Data zone slots. 3. Symmetric Cryptography Commands These commands perform a symmetric cryptographic function, such as generating a digest or MAC, key derivation or AES encryption and decryption. Input Parameters for all Commands Multibyte input parameters are shown as big-endian (MSB first) values in the input parameters tables unless otherwise specified. Note that the ATECC608A-TNGLoRaWAN device actually expects the data to be sent little- endian (LSB first). Table 5-1. Command Opcodes, Short Descriptions, and Categories Command Opcode Description Command Category AES 0x51 Execute the AES-ECB Encrypt or Decrypt functions. Calculate a Galois Field Multiply. Symmetric Cryptography Command CheckMac 0x28 Verify a MAC calculated on another CryptoAuthentication device. Symmetric Cryptography Command Counter 0x24 Read or increment one of the monotonic counters General Device Commands DeriveKey 0x1C Derive a target key value from the target or parent key. Symmetric Cryptography Command ECDH 0x43 Generate an ECDH pre-master secret using stored private key and input public key. Asymmetric Cryptography Command GenDig 0x15 Generate a data digest from a random or input seed and a stored value. Symmetric Cryptography Command GenKey 0x40 Generate an ECC public key. Optionally generate an ECC private key. Asymmetric Cryptography Command Info 0x30 Return device state information. General Device Commands KDF 0x56 Implement the PRF or HKDF key derivation functions Symmetric Cryptography Command Lock 0x17 Prevent further modifications to a zone or slot of the device. General Device Commands MAC 0x08 Calculate digest (response) from key and other internal data using SHA-256. Symmetric Cryptography Command Nonce 0x16 Generate a 32-byte random number and an internally stored Nonce. General Device Commands Random 0x1B Generate a random number. General Device Commands ATECC608A-TNGLoRaWAN Device Commands © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 27

Command Opcode Description Command Category Read 0x02 Read 4 or 32 bytes from the device, with or without authentication and encryption. General Device Commands SelfTest 0x77 Test the various internal cryptographic computation elements General Device Commands Sign 0x41 ECDSA signature calculation. Asymmetric Cryptography Command SHA 0x47 Compute a SHA-256 or HMAC digest for general purpose use by the system. General Device Commands UpdateExtra 0x20 Update bytes 84 or 85 within the Configuration zone after the Configuration zone is locked. General Device Commands Verify 0x45 ECDSA verify calculation. Asymmetric Cryptography Command Write 0x12 Write 4 or 32 bytes to the device, with or without authentication and encryption. General Device Commands

5.1 General Device Commands

The following table provides a summary of the general device commands: Table 5-2. General Device Commands Command Name Opcode Description Counter 0x24 Increments and reads the monotonic counters. Info 0x30 Used to read revision and status information from the device. Lock 0x17 Used to lock the individual lockable slots in the device. Nonce 0x16 Used to generate or pass a number used once into the device. Random 0x1B Used to generate a 32-byte random number used by the system. Read 0x02 Used to read various zones of the device. SelfTest 0x77 Tests the various internal cryptographic computation elements. SHA 0x47 Computes a SHA-256 or HMAC digest for general purpose use by the system. UpdateExtra 0x20 Updates bytes 84 or 85 within the Configuration zone after the Configuration zone is locked. Write 0x12 Used to write 4 or 32 bytes to the device, with or without authentication and encryption.

5.1.1 Counter Command

The Counter command reads the binary count value from one of the two monotonic counters located on the device within the Configuration zone. The maximum value that the counter may have is 2,097,151. Any attempt to count beyond this value will result in an error code. The counter is designed to never lose counts even if the power is interrupted during the counting operation. In some power loss conditions, the counter may increment by a value of more than one. For the ATECC608A-TNGLoRaWAN, the counters are not attached to any keys but may still be used by the system. Each count is set to its default value and can count to the maximum value. ATECC608A-TNGLoRaWAN Device Commands © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 28

Table 5-3. Input Parameters Count Opcode (1 Byte) Mode (1 Byte) KeyID (2 Bytes) 0x24 0x00 0x00 00 Reads the value of Counter[0] 0x00 01 Reads the value of Counter[1] 0x01 0x00 00 Increments the value of Counter[0] 0x00 01 Increments the value of Counter[1] Table 5-4. Output Response Count Name Size Description Count 4 bytes Counter value in binary if the command succeeds. Response 1 byte Error code if the command fails.

5.1.2 Info Command

The Info command is used to read the status and state of the device. This information is useful in determining errors or to operate various commands.

5.1.2.1 Info - Revision

The Revision mode of the Info command reads back the silicon revision of the ATECC608A-TNGLoRaWAN. This information is hard coded into the device. This information may or may not be the same as what is read back in the Revision bytes shown in the Configuration zone. Table 5-5. Input Parameters - Info Revision Opcode (1 Byte) Mode (1 Byte) Param (2 Bytes) Data (0 Bytes) 0x30 0x00 0x00 00 — Returns silicon revision Table 5-6. Output Response - Info Revision Name Response Description Response 00 00 60 vv Revision Info. 0x60 indicated ATECC608A-TNGLoRaWAN. vv is the most recent silicon version. Notice: The Output Response for the ATECC608A devices will be 0x00 0x00 0x60 0x02. The response for the ATECC608B devices will be 0x00 0x00 0x60 0x03. The device revision is the easiest way to determine which version of silicon you have. Over time the fourth byte for the ATECC608B could change if additional silicon enhancements are implemented.

5.1.2.2 Info - Device State

The current status of the device is returned with the Info command in this mode. The Status bits are useful in determining the current state of the device and may be useful in determining why a given command fails or if a command can be executed. ATECC608A-TNGLoRaWAN Device Commands © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 29

Table 5-7. Input Parameters - Info Device State Opcode (1 Byte) Mode (1 Byte) Param (2 Bytes) Data (0 Bytes) 0x30 0x02 0x00 00 — Returns device state Table 5-8. Output Response - Info Device State Name Response Description Response 0x00 00 Byte[1] Byte[0] Table 5-9. Status Flags Byte # Bit # Name Description 0 7 TempKey.NoMacFlag 0: NoMacFlag is invalid 1: NoMacFlag is valid 6 TempKey.GenKeyData 0: GenKeyData is invalid 1: GenKeyData is valid 5 TempKey.GenDigData 0: GenDigData is invalid 1: GenDigData is valid 4 TempKey.SourceFlag 0: TempKey is fixed source 1: Temp Key is from random source 3:0 TempKey.KeyID TempKey Key SlotID 1 7 TempKey.Valid 0: TempKey is not valid 1: TempKey is valid 6:3 AuthComplete.KeyID Authorization Key SlotID 2 AuthComplete.Valid 0: Authorization invalid 1: Authrorization valid 1:0 Unused 2’b00

5.1.3 Lock Command

For the ATECC608A-TNGLoRaWAN, the Configuration zone has already been locked and the access policies of the Data zone have already been enforced. However, several of the data slots can still be updated through the use of other commands. If so desired, some of these slots can be permanently locked from future updates by using the Slot Locking mode of the Lock command.

5.1.3.1 SlotLock

The Slot Lock mode of the Lock command is used to individually lock slots. Any slot that has the Lockable bit set and has not previously been slot-locked can be locked to prevent any further updates. This process is not reversible. Once a slot has been locked, it is permanently locked. In this mode of operation, the Summary CRC and Data fields are ignored. For the ATECC608A-TNGLoRaWAN, the following individual slots may be locked: Slots 8, 10 and 14. Table 5-10. SlotLock Input Parameters Opcode (1 Byte) Mode(1 Byte) Summary CRC (2 Bytes) Data (0 Bytes) 0x17 8’b00[bb_bb]10(1) 0x00 00 — Individual Slot Lock ATECC608A-TNGLoRaWAN Device Commands © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 30

Note: 1 - [bb_bb] Indicates the 4-bit value that represents the slot being locked. Table 5-11. Slot Lock Output Name Size Description Response 1 byte 0x00 if the command successfully locks the slot. An error code will output if the command fails.

5.1.4 Nonce Command

The Nonce command generates a nonce (number used once) for use by a subsequent command by combining a random number (which can be generated internally or externally) with an input value from the system. The resulting nonce is stored internally in three possible buffers: TempKey, Message Digest Buffer, and Alternate Key Buffer. Instead of generating a nonce, a value may be passed to the device if so desired.

5.1.4.1 Nonce - Random

When the Nonce command is run in Random mode, it generates a new nonce based on the input values shown in the tables below. If Param2 is 0x00 00, then a new random number is generated based on the internal RNG. If Param2 is 0x80 00, a value stored in TempKey is used to generate a new nonce instead and the random number generator is not run. TempKey must be valid prior to running the Nonce command in this case. Upon completion, the TempKey.SourceFlag is set to Rand. It is recommended that the 20 bytes of data sent to the device be generated from a random source to prevent replay attacks. Table 5-12. Random Nonce Input Parameters Opcode Mode Param2 Data Description 0x16 0x00 or 0x01 0x00 00 20 bytes • 32 bytes written to TempKey

• Output is from the RNG
• SHA256 digest includes the random number 0x00 or 0x01 0x80 00 20 bytes • 32 bytes written to TempKey
• Output is the SHA256 Hash value
• SHA256 digest includes the TempKey Table 5-13. Random Nonce Output Response Name Input Param2 Size Description Response 0x00 00 32 bytes Random number 0x80 00 32 bytes New TempKey value Notes: 1. TempKey.SourceFlag set to ‘ 0’ on successful completion of the command indicating the nonce value was random source. 2. TempKey.Valid set to ‘ 1’ on success. Table 5-14. Nonce SHA256 HASH Calculation # of Bytes Input Data Param2 = 0x00 00 Input Data Param2 = 0x80 00

32 RandOut from random number generator TempKey value from previous command

20 NumIn from input stream NumIn from input stream

1 Opcode (always 0x16) Opcode (always 0x16)

1 Mode (0x00 or 0x01) Mode (0x00 or 0x01)

© 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 31

# of Bytes Input Data Param2 = 0x00 00 Input Data Param2 = 0x80 00

1 LSB of Param2 (always 0x00) LSB of Param2 (always 0x00)

5.1.4.2 Nonce - Fixed

A fixed nonce is passed to the device and stored in one of the internal buffers. The size of the nonce may be either 32 or 64 bytes. The TempKey.SourceFlag is always set to input after this command is run. This mode of the Nonce command does not run a SHA256 calculation or generate a random number. Table 5-15. Fixed Nonce Input Parameters Opcode Mode Param2 Data Description 0x16 0x03 0x43 0x83 0x00 32 bytes • 32 bytes written to TempKey

• 32 bytes written to Message Digest Buffer
• 32 bytes written to Alternate Key Buffer 0x23 0x63 0x00 64 bytes • 64 bytes written to TempKey
• 64 bytes written to Message Digest Buffer Table 5-16. Fixed Nonce Output Response Name Size Description Response 1 byte 0x00 if the command is completed successfully. Otherwise an error code is received. Notes: 1. TempKey.SourceFlag is set to ‘ 1’ upon successful command completion, indicating nonce value was fixed input value. 2. TempKey.Valid is set to ‘ 1’, indicating the value is valid for other use.

5.1.5 Random Command

The Random command generates a random number to be used by the system. Random numbers are generated via the internal NIST 800-90 A/B/C random number generator. The output of the command is always a 32-byte number placed on the bus. The number cannot be stored in any data slot or SRAM location. Table 5-17. Input Parameters - Random OpCode (1 Byte) Mode (1 Byte) Param2 (2 Bytes) Data (0 Bytes) 0x1B 0x00 0x00 00 — Random command Table 5-18. Output Response - Random Name Size Description RandOut 32 bytes The output of the RNG

5.1.6 Read Command

The Read command can be used to access any of the EEPROM zones of the ATECC608A-TNGLoRaWAN device. Data zone access is limited based on the access policies set for each of the slots. Encrypted reads are possible only on the Data zone slots if specific access policies are set. ATECC608A-TNGLoRaWAN Device Commands © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 32

5.1.6.1 Clear Text Read

Clear text reads are always possible from the Configuration and OTP zones of the ATECC608A-TNGLoRaWAN device. Specific slots within the Data zone may be readable as clear text based on the access policies that have been set. Either 4-byte or 32-byte reads are possible on any of these zones. For the ATECC608A-TNGLoRaWAN device, Slots 8 and 10-14 contain data that can be read as clear text. Table 5-19. Input Parameters - Clear Text Read Opcode (1 Byte) Mode (1 Byte) Address (2 Byte) 0x02 0x00 See Section 4.4 Address Encoding. 4-byte Configuration zone read 0x80 See Section 4.4 Address Encoding. 32-byte Configuration zone read 0x01 See Section 4.4 Address Encoding. 4-byte OTP zone read 0x81 See Section 4.4 Address Encoding. 32-byte OTP zone read 0x02 See Section 4.4 Address Encoding. 4-byte Data zone read 0x82 See Section 4.4 Address Encoding. 32-byte Data zone read Table 5-20. Output Response - Clear Text Read Name Size Description Data Contents 4 bytes 4 bytes transmitted [0:3] 32 bytes 32 bytes transmitted [0:31]

5.1.6.2 Encrypted Read

Encrypted reads are only possible on Data zone slots that have the access policies set for an encrypted read. Data in the Configuration zone and OTP zone can never be encrypted. All encrypted reads must be 32 bytes in length. Prior to doing the encrypted read an encryption key must be generated. This key can be unique every time an encrypted read is done on a given slot. Note that in order to read all of the contents of a slot, multiple reads may be required. A unique session key will need to be generated for each encrypted read. For the ATECC608A-TNGLoRaWAN device, Slots 2-7 and 11-12 require an encrypted read. Procedure for an Encrypted Read The following steps are required for each encrypted read: 1. Run the Nonce command. It is recommended that this be done in Random mode, 32 bytes. Output the value to TempKey. 2. Run the GenDig command. The Slot # of the Encryption key must be included in the GenDig Input parameters, as well as the output of the Nonce command which is stored in TempKey. Note: The output of these two commands is the encryption key and is stored in TempKey. 3. Issue the Read command. – The contents of the Data zone slot will be encrypted by XOR’ing the data with the generated value stored in TempKey. This value in TempKey is the session key that was previously generated. – The output of the command will be the encrypted data. Table 5-21. Input Parameters - Encrypted Read Opcode (1 Byte) Mode (1 Byte) Address (2 Byte) 0x02 0x82 See Section 4.4 Address Encoding 32-byte Data zone read ATECC608A-TNGLoRaWAN Device Commands © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 33

Table 5-22. Output Response - Encrypted Read Name Size Description Data Contents 32 bytes 32 bytes of encrypted data [0:31] The host system must also calculate the Encryption/Decryption key based on the output of the Nonce command and the SHA256 calculation used in the GenDig command. This allows for the host system to decrypt the data being sent.

5.1.7 SelfTest Command

The SelfTest command performs a test of one or more of the cryptographic engines within the ATECC608A- TNGLoRaWAN chip. Some or all of the algorithms will be tested depending on the Input mode parameter. For the ATECC608A-TNGLoRaWAN device, the SelfTest command has been disabled from running automatically after a Power-up or Wake event. However, the command may be executed by the system if so desired. There is no requirement to run this test. If any self test fails, whether called automatically on power-up, wake or via this command, the chip will enter a Failure state, in which chip operation is limited. The stored Failure state is always cleared upon a wake or power cycle. Note that the self-test failure (error code: 0x07) is not the same as a health-test failure (error code: 0x08). When in the Failure state, the following operations are allowed:

• Reads of the Configuration zone.
• This self-test command. If a particular test is re-run and passes on the subsequent attempt, that bit in the Failure register will be cleared. If all bits are cleared, then ATECC608A-TNGLoRaWAN resumes normal command operation.
• The current state of the Failure register can be read by calling this self-test command with a mode parameter of
• Any other command or reads of any other zone, will return an error code of 0x07. Use SelfTest(0) to determine the cause of the failure Table 5-23. Input Parameters Self Test Opcode (1 Byte) Mode (1 Byte)1 Param2 (2 Bytes)b[7:6] b[5] b[4] b[3] b[2] b[1] b[0] 2’b00 SHA AES ECDH ECDSA (Sign, Verify) 0 RNG, DRBG 0x00 00 Note: 1. Any combination of tests can be run at one time. Setting the corresponding mode bit to ‘ 1’ indicates that the test will be run. If the bit is ‘0’, then the test will not be run. Table 5-24. Output Response Self Test Name Size Description Success 1 byte 0x00 - All Tests Passed Failure Map - one for each test that failed. Failure bits align with bits in Mode byte.

5.1.8 SHA Command

The SHA command computes a SHA-256 or HMAC/SHA digest for general purpose use by the host system. The SHA computation is performed in a special section of internal ATECC608A-TNGLoRaWAN memory (Context Buffer) that is not read nor written by any other commands. Any arbitrary command can be interspersed between the various phases of the SHA command without problems. This SHA context is invalidated on power-up and wake. In most cases, if an error occurs during the execution of the SHA command, the context is retained without change. ATECC608A-TNGLoRaWAN Device Commands © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 34

5.1.8.1 SHA - SHA256 Digest

The SHA command utilizes the SHA256 Hash algorithm for computing the hash of a message. The primary input to the command is the actual message. The message is submitted to the device in blocks of 1 to 64 bytes. The following procedure is used when no context switching is required: 1. Issue the SHA command in Start mode. No message is included. 2. Issue the SHA command in Update mode with 1 to 64 bytes of the message. 3. Repeat step 2 until the total number of bytes of the message have been submitted. 4. Issue the SHA command in End mode to complete the SHA256 calculation. Table 5-25. Input Parameters SHA Standard Mode Opcode (1 Byte) Mode (1 Byte) Param2 (2 Bytes) Data (Varies by Mode) 0x47 0x00 0x00 00 0 bytes Start mode 0x01 0x00 [ByteCount] 1 to 64 bytes Update mode 0x02 0x00 [ByteCount] 0 to 64 bytes Finalize mode: Digest placed in Output Buffer and TempKey 0x42 0x00 [ByteCount] Finalize mode: Digest placed in Output Buffer and Message Digest Buffer 0xC2 0x00 [ByteCount] Finalize mode: Digest placed in Output Buffer only Table 5-26. Output Response SHA256 Standard Name Mode Size Description Response 0x00, 0x01 1 byte 0x00 if successful, otherwise an error code is received 0x02, 0x42, 0xC2 1 byte 32 bytes If error code SHA256 Digest

5.1.8.2 SHA - HMAC Digest

The SHA command may be used to calculate an HMAC Digest instead of an SHA256 Digest. The procedure is essentially the same but requires the use of an internal key and the use of HMAC_START instead of START. The following procedure is used when no context switching is required: 1. Issue the SHA command in HMAC_Start mode with key location indicated. No message is included. 2. Issue the SHA command in Update mode with 1 to 64 bytes of the message. 3. Repeat step 2 until the total number of bytes of the message has been submitted. 4. Issue the SHA command in End mode to complete the HMAC Digest calculation. ATECC608A-TNGLoRaWAN Device Commands © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 35

Table 5-27. Input Parameters SHA HMAC Mode Opcode (1 Byte) Mode (1 Byte) Param2 (2 Bytes) Data (Varies by Mode) 0x47 0x04 0x00 0[slot] 0 bytes HMAC Start mode and include a key from a data slot 0x04 0xFF FF 0 bytes HMAC Start mode and include a key from TempKey 0x01 0x00 [ByteCount] 1 to 64 bytes Update mode 0x02 0x00 [ByteCount] 0 to 64 bytes Finalize mode: Digest placed in Output Buffer and TempKey 0x42 0x00 [ByteCount] Finalize mode: Digest placed in Output Buffer and Message Digest Buffer 0xC2 0x00 [ByteCount] Finalize mode: Digest placed in Output Buffer only Table 5-28. Output Response SHA256 Standard Name Mode Size Description Response 0x04, 0x01 1 byte 0x00 if successful, otherwise an error code is received 0x02, 0x42, 0xC2 1 byte 32 bytes If Error Code HMAC Digest upon success

5.1.8.3 SHA - Context Switching

Context switching allows for the generation of a digest to be interrupted to do other functions or to generate other digests. Context switching can be used only in the SHA256 Digest mode, so it can only occur after a SHA Start has been issued and prior to a SHA Finalize command. Context switching may happen multiple times during the course of a digest generation. Context switching involves two phases: 1. Read_Context - Reads a variable length context from the ATECC608A-TNGLoRaWAN while leaving the context valid within the chip. The total length of the output data parameter is always from 40 to 99 bytes and can either be determined from the length field in the output packet or computed as 40 plus the Least Significant six bits of the first byte in the output. 2. Write_Context - Writes a SHA256 context from the host to the ATECC608A-TNGLoRaWAN to allow subsequent update operations to be completed. This context must have previously been read from the chip with the Read_Context mode. The ATECC608A-TNGLoRaWAN determines the size of the context from the first 4 bytes of the data parameter. After the context has been read, the device may perform any other operations as required. Upon completion of the other operations, the context may be written back to the ATECC608A-TNGLoRaWAN and the SHA256 Digest generation process may continue until it has completed. Table 5-29. Input Parameters SHA Context Switching Opcode (1 Byte) Mode (1 Byte) Param2 (2 Bytes) Data (Varies by Mode) 0x47 0x06 0x00 00 0 bytes Read the current context 0x07 0x00 [ByteCount] 40 to 99 bytes Restore the current context from the prior session ATECC608A-TNGLoRaWAN Device Commands © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 36

Table 5-30. Output Response SHA Context Switching Name Mode Size Description Response 0x06 1 byte 40-99 bytes If error code context value 0x07 1 byte 0x00 if successful, otherwise an error code is received

5.1.9 UpdateExtra Command

The UpdateExtra command is used to update the UpdateExtra and UpdateExtraAdd bytes, bytes 84 and 85 respectively, in the Configuration zone. These bytes can only be updated by this command. These bytes are one-time updatable bytes and can only be updated if the current value is 0x00. Trying to update this byte if the value is not 0x00 will result in an error. For the ATECC608A-TNGLoRaWAN device, the UpdateExtraAdd byte (byte 85) has been configured to be an alternate I2C address. Table 5-31. Input Parameters - UpdateExtra OpCode (1 Byte) Mode (1 Byte) Param2 (2 Bytes) Data (0 Bytes) 0x20 0x00 0x00 [Value] — Write the UpdateExtra byte (byte 84) with the value in the LSB of Param2. — 0x01 0x00 [Value] — Write the UpdateExtraAdd byte (byte 85) with the value in the LSB of Param2. Table 5-32. Output Response - UpdateExtra Name Size Description Success 1 byte 0x00 - The byte is written successfully. An error code is received if the byte is not written successfully.

5.1.10 Write Command

For the ATECC608A-TNGLoRaWAN, the Configuration and OTP zones have been locked and no updates to these zones are possible. Limited write capability exists on the Data zone based on access policies of each slot. Slots that can be written are described in the submodes of this command.

5.1.10.1 Data Zone - Clear Text Write

Standard Clear Text Writes Clear text writes to Data zone slots are only possible for slots so configured provided they have not been SlotLocked. Note that any given slot may allow for more than one block of data to be written to it based on the size of the slot. 4 or 32-byte writes are permissible for any block within a slot provided that slot is not secret. For secret slots only 32 byte writes are permitted. The last block of any slot will not be 32 bytes. This can still be written as a 32-byte write and the additional bytes need to be padded with zeros. For the ATECC608A-TNGLoRaWAN device, Slots 2-7, 8-12 and 14 can be written as clear text. Table 5-33. Clear Text Write Input Parameters Opcode (1 Byte) Mode (1 Byte) Address (2 Bytes) Data (4 or 32 Bytes) 0x12 0x02 See Section 4.4 Address Encoding 4 bytes 4-byte write 0x82 See Section 4.4 Address Encoding 32 bytes 32-byte write ATECC608A-TNGLoRaWAN Device Commands © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 37

Table 5-34. Clear Text Write Output Response Name Size Description Response 1 byte If successful, it will return a value of 0x00. If unsuccessful, then an error code will be returned.

5.1.10.2 Data Zone - Encrypted Write

Writes to the Data zone may be encrypted if the slots have been so configured. Only data written to the Data zone may be encrypted. For the ATECC608A-TNGLoRaWAN device, Slot 13 can be written as encrypted text. All encrypted writes must be done as 32-byte blocks. If a partial block at the end of the zone needs to be encrypted 32 bytes of input, data must still be sent and used as part of the MAC calculation. The address of the write is an actual memory location address and is not a Data slot number. Table 5-35. Input Parameters - Encrypted Write Opcode (1 Byte) Mode (1 Byte) Address (2 Bytes) Input Data (32 Bytes) MAC (32 Bytes) 0x12 0x82 See Section 4.4 Address Encoding 32 bytes of encrypted input data 32 bytes of MAC 32-byte encrypted write Table 5-36. Output Response - Encrypted Write Name Size Description Response 1 byte If successful, it will return a value of 0x00. If unsuccessful, then an error code will be returned. Data Encryption Data must be encrypted by the host system prior to writing the data to the slot. The encryption algorithm simply XOR’s the clear text data with the value stored in the TempKey. TempKey must be a result of a GenDig command. The host system will need to calculate this value that will be used in parallel with what the ATECC608A- TNGLoRaWAN calculates. The GenDig command can be used one or more times when calculating the XOR value. The final value will be the actual XOR value used for the encryption. Once the data are encrypted and written, the ATECC608A-TNGLoRaWAN decrypts the value with the value stored in TempKey. The encrypted write must occur before any other commands that can affect the TempKey value or before a time-out occurs. In order to validate the encrypted write, a 32-byte MAC value must also be sent with the command. Input MAC Generation The required Input MAC is generated by a SHA256 Hash over 96 bytes. This is calculated by the host system and sent as part of the encrypted Write command. 32 bytes 1 byte 1 byte 2 bytes 1 byte 2 bytes 25 bytes 32 bytes TempKey OpCode = 0x12 Mode Address (LSB, MSB) SN[8] = Varies by vendor SN[0:1]=0x01 0x23 Zeros Plain Text Data

5.2 Asymmetric Cryptography Commands

The Asymmetric Cryptography command set is made up of those commands that are specifically used to generate or use ECC keys. Keys are typically stored in Data zone slots, but for some commands could also be in the SRAM array. ATECC608A-TNGLoRaWAN Device Commands © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 38

Table 5-37. Asymmetric Cryptography Commands Command Name Opcode Description ECDH 0x43 Generates an ECDH pre-master secret using the stored private key and input public key. GenKey 0x40 Generates an ECC private key or optionally generates an ECC public key from the stored private key. Sign 0x41 Signs an internal or external message digest using an ECC private key with an ECDSA signature calculation. Verify 0x45 Verifies an internal or external message digest using an ECC public key with an ECDSA verify calculation.

5.2.1 ECDH Command

The ECDH command is used to generate a shared secret between two devices. By passing an ECC public key from another device and combining with the ECC private key stored in a slot or with an ephemeral key stored in TempKey and doing the reverse on the other device, both devices will generate the same shared master secret. This can then be further combined with other common data in both sides to generate a shared session key between the devices. The KDF command is often used with TLS sessions to further diversify the shared secret.

5.2.1.1 ECDH - Stored Key

The ECDH command may use an internal data slot as its ECC private key source. The slot must have its access policies configured such that the slot is an ECC private key and that the ECDH command is allowed. Access policies may also specify whether or not the output will be stored, encrypted or allow the command itself to determine whether the output is stored or encrypted. The IO protection key is used when encryption is required. Encryption can only occur when data is output to the output buffer. For the ATECC608A-TNGLoRaWAN, the ECDH command may be run using the ECC private keys stored in Slot 1. Table 5-38. Input Parameters ECDH Stored Key Opcode (1 Byte) Mode (1 Byte) KeyId (2 Bytes) Data Description Data 1 (32 Bytes) Data 2 (32 Bytes) 0x43 0x0C 0x00 0[Slot] X component of public key Y component of public key

• Results go to the output buffer
• Output is in the clear (1) 0x0E 0x00 0[Slot] X component of public key Y component of public key
• Results go to the output buffer
• Output is encrypted 0x08 0x00 0[Slot] X component of public key Y component of public key
• Results stored in TempKey
• Output is available for other operations but is not directly accessible. Note: 1. When the ChipOptions.ECDHPROT value is 1, then the output of the ECDH command will be encrypted in this mode. For the ATECC608A-TNGLoRaWAN the ECDHPROT field is set to 0 and encryption will be dependent upon the mode of the ECDH command. Table 5-39. Output Response ECDH Stored Key Name Mode Size Description Response 0x0C or 0x0E 1 byte Error code if command fails ATECC608A-TNGLoRaWAN Device Commands © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 39

Name Mode Size Description Response 0x0C 32 bytes Shared Master Secret as clear text Response OutNonce 0x0E 32 bytes 32 bytes Shared Master Secret as encrypted text nonce used for encryption Response 0x08 1 byte 0x00 if successful, otherwise an error code is returned

5.2.1.2 ECDH - TempKey Source

The ECDH command may use the value in TempKey as its starting value for an ECDH command. The ECC private key value in TempKey must be generated by the GenKey command. Once the TempKey has been used by the ECDH command, the TempKey.Valid flag is reset. If the output is back to the TempKey location, then this flag will be set again. Table 5-40. Input Parameters ECDH TempKey Opcode (1 Byte) Mode (1 Byte) KeyId (2 Bytes) Data Description Data 1 (32 Bytes) Data 2 (32 Bytes) 0x43 0x0D 0x00 00 X component of public key Y component of public key

• Results sent to the output buffer
• Output is in the clear (1) 0x0F 0x00 00 X component of public key Y component of public key
• Results sent to the output buffer
• Output is encrypted 0x09 0x00 00 X component of public key Y component of public key
• Results stored in TempKey
• Output is available for other operations but is not directly accessible. 0x05 0x00 0[Slot] X component of public key Y component of public key
• Results stored in specified slot Note: 1. When the ChipOptions.ECDHPROT value is 1, then the output of the ECDH command will be encrypted in this mode. For the ATECC608A-TNGLoRaWAN the ECDHPROT field is set to 0 and encryption will be dependent upon the mode of the ECDH command. Table 5-41. Output Response ECDH TempKey Name Mode Size Description Response 0x0D or 0x0F 1 byte Error code if command fails Response 0x0D 32 bytes Shared Master Secret as clear text Response OutNonce 0x0F 32 bytes 32 bytes Shared Master Secret as encrypted text nonce used for encryption Response 0x05 or 0x09 1 byte 0x00 if successful, otherwise an error code is returned ATECC608A-TNGLoRaWAN Device Commands © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 40

5.2.2 GenKey Command

The GenKey command is used to generate ECC private keys, ECC public keys from private keys or generate a public key digest. This command is only applicable for those slots designated to be ECC private or public keys. Running this command on a non-ECC slot will result in an error.

5.2.2.1 Private Key - Stored in TempKey

The GenKey command can be used to generate an ephemeral ECC private key and place it in SRAM where there is no limit on writing to a memory location. This key cannot be read out but may be used by the ECDH command. Table 5-42. Command Parameters Opcode (1 Byte) Mode (1 Byte) KeyID (2 Bytes) OtherData (3 Bytes) Comment 0x40 0x04 0xFF FF 0x00 00 00 • Private key stored in TempKey

• Public key generated and output on the bus Table 5-43. Output Response GenKey Stored in TempKey Name Size Response Response 1 byte If an ECC Fault code has been generated due to a command error 64 bytes Public keys X and Y coordinate the command’s success

5.2.2.2 Public Key Generation

If the slot has been so configured, the ECC public key can be regenerated from a stored ECC private key and output on the bus. In addition, if so desired, a public key digest can also be generated and stored in TempKey at the same time. For the ATECC608A-TNGLoRaWAN, the public key can be generated from the stored private key in Slot 1. Optional digest generation is also allowed. Table 5-44. Input Parameters - Public Key Generation Opcode (1 Byte) Mode (1 Byte) KeyID (2 Bytes) OtherData (0 Bytes) 0x40 0x00 0x00 0[Slot] — Public key generated and output on the bus 0x40 0x08 0x00 0[Slot] — • Public key generated and output on the bus

• Public key digest generated and stored in TempKey Table 5-45. Output Response - Public Key Generation Name Size Response Response 1 byte ECC Fault code if command fails 64 bytes Public keys X and Y coordinate the command’s success Public Key Digest Generation A SHA256 Hash is performed over 128 bytes to generate a digest from the public key. ATECC608A-TNGLoRaWAN Device Commands © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 41

SN[8] SN[0:1] Zeros X and Y coordinates of the public key

5.2.2.3 Public Key Digest Generation

A digest of a public key may be generated from a stored ECC public key and stored in TempKey. The Slot# must point to a stored public key, therefore this command is limited to Slots 8 and higher. Prior to running this command, the TempKey must be a valid value. The public key will not be output on the bus. The public key could however be read out using the Read command. Note that in this mode the 3 bytes in OtherData will be used to generate the digest and the mode and KeyID bytes will be ignored. For the ATECC608A-TNGLoRaWAN, a digest can be created from Slot 1. Table 5-46. Input Parameters - Public Key Digest Generation Opcode (1 Byte) Mode (1 Byte) KeyID (2 Bytes) OtherData (3 Bytes) Comment 0x40 0x10 0x00 0[Slot] 0x[any value] Public key digest is created and stored in TempKey Table 5-47. Output Response - Public Key Digest Generation Name Size Response Response 1 byte • 0x00 if command completes successfully

• ECC Fault code if command fails Public Key Digest Creation A SHA256 Hash is performed over 128 bytes to generate a digest from the public key. 32 bytes 1 byte 1 byte 2 bytes 1 byte 2 bytes 25 bytes 64 bytes TempKey OpCode OtherData[0] OtherData[1:2] SN[8] SN[0:1] Zeros X and Y coordinates of the public key

5.2.3 Sign Command

The Sign command generates a signature using the ECDSA algorithm. The ECC private key in the slot specified by KeyID is used to generate the signature. Only External messages can be signed by the ATECC608A-TNGLoRaWAN device.

5.2.3.1 Sign - External Message

The Sign command can be used to sign the digest of an external message by an ECC private key. The message must be compiled and the digest of the message generated by the host system. The message can be loaded into either the TempKey or Message Digest Buffer via the Nonce command run in fixed mode and is always 32 bytes in length. The message always resides in the lower 32 bytes of these locations. For the ATECC608A-TNGLoRaWAN device, Slot 1 is enabled to sign external messages. ATECC608A-TNGLoRaWAN Device Commands © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 42

Table 5-48. Input Parameters - Sign External Opcode (1 Byte) Mode (1 Byte) KeyId (2 Bytes) 0x41 0x80 or 0xC0 0x00 0[Slot] External message digest stored in TempKey 0xA0 or 0xD0 0x00 0[Slot] External message digest stored in Message Digest Buffer Table 5-49. Output Response - Sign External Name Size Description Response 1 byte Error code if the command fails 64 bytes The signature composed of R and S values

5.2.4 Verify Command

The Verify command takes an ECDSA [R,S] signature and verifies that it is correctly generated given an input message digest and public key. In all cases, the signature is an input to the command. An optional MAC can be returned from the Verify command to defeat any man-in-the-middle attacks. If the verify calculation shows that the signature is correctly generated from the input digest, then a MAC will be computed based on an input nonce stored in TempKey and the value of the IO protection secret which is stored in both the ATECC608A-TNGLoRaWAN and the host MCU. MAC outputs can only be generated in External and Stored modes. The IO protection function must be enabled for MAC computation.

5.2.4.1 Verify - External Public Key Mode

The Verify command may be used to verify a message generated externally to the ATECC608A-TNGLoRaWAN with a public key that is passed to the command. The output of the command will either be a code indicating success, failure or error or a 32-byte MAC. Prior to this command being run, the message should be written using the Nonce command in Fixed mode to either TempKey or the Message Digest Buffer. In this mode, the device merely accelerates the public key computation and returns a boolean result. Procedure to Verify a Message with an External Public Key 1. Write the 32-byte digest of the message to either the TempKey or Message Digest Buffer using the Nonce command in Fixed mode. 2. Optional: System Nonce - Nonce generated by the system. 2.1. If the external message digest is stored in TempKey, the nonce generated by the system must be stored in the lower 32 bytes of the Message Digest Buffer. 2.2. If the external message is stored in the MessageDigestBuffer[31:0], then the System Nonce must be stored in the upper 32 bytes of the MessageDigest Buffer[63:32]. To do this, the external message and nonce value should be written as a 64-byte value. 3. Issue the Verify command. Include the Mode, KeyID, which specifies the P256 ECC Curve, the 64-byte signature and the 64-byte external public key. 4. The output will return: 4.1. One byte success, fail or error code if MAC is not required. 4.2. A 32-byte MAC if specified by the mode. ATECC608A-TNGLoRaWAN Device Commands © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 43

Table 5-50. Command Parameters Opcode (1 Byte) Mode (1 Byte) Key ID (2 Bytes) Data Field (128 Bytes) Comment Signature (64 Bytes) Public Key (64 Bytes) 0x45 0x02 0x00 04 R value S value X value Y value Message stored in TempKey 0x22 0x00 04 R value S value X value Y value Message stored in Message Digest Buffer 0xA2 0x00 04 R value S value X value Y value

• Message stored in TempKey
• System Nonce stored in MDB[31:0]
• Validation MAC is returned 0x82 0x00 04 R value S value X value Y value
• Message stored in Message Digest Buffer
• System Nonce stored in MDB[63:32]
• Validation MAC is returned Table 5-51. Output Response - Verify External Name Mode Size Response Response 0x02 or 0x22 1 byte • 0x00 - If signature is verified
• 0x01 - If signature does not match
• Error code - If there is a failure due to some other reason 0x82 or 0xA2 1 byte or 32 bytes • Validation MAC - If signature is verified
• 0x01 - If signature does not match
• Error code - If there is a failure due to some other reason Table 5-52. Validation MAC - Verify External Size (Bytes) Message in TempKey Message in Message Digest Buffer

32 Contents of the IO protection key Contents of the IO protection key

32 Message stored in TempKey Message stored in the first 32 bytes of the Message

32 System Nonce stored in the first 32 bytes of the

System Nonce stored in the second 32 bytes of the Message Digest Buffer

32 R Data of the passed signature R Data of the passed signature

32 S Data of the passed signature S Data of the passed signature

1 Opcode Opcode

1 Mode Mode

2 Param2 [LSB,MSB] Param2 [LSB,MSB]

5.2.4.2 Verify - Stored Public Key Mode

When using the Verify command in Stored mode, the public key to be used is stored in a data slot and does not need to be passed. Prior to this command being run, the message should be written to TempKey or the Message Digest Buffer using the Nonce command. ATECC608A-TNGLoRaWAN Device Commands © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 44

Procedure to Verify a Message with a Stored Key 1. If so required, validate the public key before using the Verify command. 2. If so required, authorize the public key before use. 3. Write the 32-byte digest of the message to either the TempKey or Message Digest Buffer using the Nonce command in Fixed mode. 4. Write the System Nonce to either the lower or upper 32 bytes of the Message Digest Buffer. 4.1. If TempKey contains the message digest, then store the System Nonce in the lower 32 bytes of the Message Digest Buffer. 4.2. If the message digest is stored in the lower 32 bytes of the Message Digest Buffer, then store the System Nonce in the upper 32 bytes of the Message Digest Buffer. The user needs to write both the message digest and the System Nonce at one time using the Nonce command. 5. Issue the Verify command. Include the Mode, KeyID, which specifies the public key slot, the 64-byte signature and the slot # of the internal public key. 6. The output will return: 6.1. One byte success, fail or error code if MAC is not required. 6.2. A 32-byte MAC, if specified by the mode or an error code, if the command fails. Table 5-53. Command Parameters Opcode (1 Byte) Mode (1 Byte) Public Key (2 Bytes) Data Field (64 Bytes) Comment Signature (64 Bytes) 0x45 0x00 0x00, 0[Slot] R value S value - Message stored in TempKey 0x20 0x00, 0[Slot] R value S value - Message stored in Message Digest Buffer 0x80 0x00, 0[Slot] R value S value - Message stored in TempKey Validation MAC is returned 0xA0 0x00, 0[Slot] R value S value - Message stored in Message Digest Buffer Validation MAC is returned Table 5-54. Output Response - Verify Stored Name Mode Size Response Response 0x00 or 0x20 1 byte • 0x00 - If signature is verified

• 0x01 - If signature does not match
• Error code - If there is a failure due to some other reason 0x80 or 0xA0 32 bytes 1 byte
• Validation MAC - If signature is verified
• 0x01 - If signature does not match
• Error code - If there is a failure due to some other reason Table 5-55. Validation MAC - Verify Stored The validation MAC input locations vary based on where the message is stored. Size (Bytes) Message in TempKey Message in Message Digest Bufffer

32 Message from TempKey First 32 bytes message from the Digest Buffer

© 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 45

(Bytes) Message in TempKey Message in Message Digest Bufffer

32 System Nonce in the first 32 bytes of the

System Nonce stored in the second 32 bytes of the Message Digest Buffer

5.3 Symmetric Cryptography Commands

The Symmetric Cryptography command set is made of up of those commands associated with the generation or use of symmetric keys. Keys are typically stored in Data zone slots, but for some commands, keys could also be generated and stored in some SRAM memory locations. Table 5-56. Symmetric Cryptography Commands Command Name Opcode Description AES 0x51 Execute the AES-ECB Encrypt or Decrypt functions. Calculate a Galois Field Multiply. CheckMac 0x28 Verify a MAC calculated on another CryptoAuthentication device. DeriveKey 0x1C Derive a target key value from the target or parent key. GenDig 0x15 Generate a data digest from a random or input seed and a stored value. KDF 0x56 Implement the PRF, AES or HKDF key derivation functions MAC 0x08 Calculate digest (response) from key and other internal data using SHA-256.

5.3.1 AES Command

The AES Command can be used to encrypt and/or decrypt a 16-byte block of data utilizing an AES key. Note that the key is stored in a 16 Byte (128 bit) location with a given slot or within the first 16 bytes of TempKey. Multiple keys may be stored in a given slot and accessed in successive 16-byte boundaries, starting with 0-15 up to the size of the slot, but not exceeding four keys in any slot. For the ATECC608A-TNGLoRaWAN, the AES keys are stored in Slots 0, 2-7, and 11-12. In addition to AES encryption and decryption, the AES command may be used to generate a Galois Field Multiply (GFM) in support of other cryptographic operations.

5.3.1.1 AES-ECB Encrypt

In the AES-ECB Encrypt mode, 16 bytes of clear text are expected in the input stream and the device will output 16 bytes of encrypted text. ATECC608A-TNGLoRaWAN Device Commands © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 46

Table 5-57. AES-ECB Encrypt Opcode (1 Byte) Mode (1 Byte) KeyID (2 Bytes) Data (16 Bytes) Comments 0x51 0x00 0x40 0x80 0xC0 0x00 0[Slot] Any 16 bytes of ClearText data Encrypt key in Position 0 Encrypt key in Position 1 Encrypt key in Position 2 Encrypt key in Position 3 0x00 0xFF FF Any 16 bytes of ClearText data Encryption key located in TempKey Table 5-58. AES Encrypt Output Response Name Size (Bytes) Notes Response 1 If the operation fails, the ouptut is a one byte error code. 16 If the operation is successful, the device will output 16 bytes of encrypted text.

5.3.1.2 AES-GFM

The GFM operation is often used as part of various AES cryptographic operations. This function has been provided to aid in the creation of operations that are not directly supported by the ATECC608A-TNGLoRaWAN. The output of this operation can be used in the AES-GCM AEAD functionality. This mode does not involve secrets or anything stored on the chip. If this mode is selected, the remaining mode bits are ignored. Table 5-59. AES Galois FIeld Multiply (GFM) Opcode (1 Byte) Mode (1 Byte) KeyID (2 Bytes) Data (32 Bytes) 0x51 0x03 0x00 00 • First 16 bytes - H-Field

• Second 16 bytes input data Table 5-60. AES GFM Output Response Name Size (Bytes) Notes Response 1 If the operation fails, the output is a one-byte error code.

16 If the operation is successful, the device will output 16 bytes result of the GFM

calculation.

5.3.2 CheckMac Command

The CheckMac command calculates a MAC response that would have been generated on a different CryptoAuthentication™ (ATECC608A, ATECC508A, ATSHA204A) device and then compares the result with the input value. The command returns a boolean result to indicate the success or failure of the comparison. If a value in TempKey is used as an input to the CheckMac, then a Nonce and/or GenDig command must be run prior to the CheckMac command. ATECC608A-TNGLoRaWAN Device Commands © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 47

Table 5-61. Input Parameters CheckMac Opcode (1 Byte) Mode (1 Byte)(2) KeyID (2 Bytes) Data (77 Bytes)(1) 0x28 0x00 0x00 0[Slot] • 32-byte client challenge

• 32-byte response generated by the client
• 13 bytes other data 0x01 0x00 0[Slot] • 32 bytes ignored but must be present
• 32-byte client response
• 13 bytes other data Use if TempKey.SourceFlag was random 0x05 0x00 0[Slot] Use if TempKey.SourceFlag was fixed 0x02 0x00 00 • 32-byte client challenge
• 32-byte client response
• 13 bytes other data Use if TempKey.SourceFlag was random 0x06 0x00 00 Use if TempKey.SourceFlag was fixed Notes: 1. OtherData[0:12] values must match the values used in the original MAC command. 2. For modes other than 0x00, Mode[2] must match the TempKey.SourceFlag. Table 5-62. Output Response CheckMac Name Size Description Response 1 byte • 0x00 - If successful
• 0x01 - If there is a mismatch
• Error Code - If there is a failure Table 5-63. SHA256 CheckMac Hash # of Bytes Mode 0x00 Mode 0x01 or 0x05 Mode 0x02 or 0x06

32 Key[KeyID] Key[KeyID] TempKey

32 Input Client Challenge TempKey Input Client Challenge

4 OtherData[0:3] OtherData[0:3] OtherData[0:3]

8 Zeros Zeros Zeros

3 OtherData[4:6] OtherData[4:6] OtherData[4:6]

1 SN[8] = Varies by vendor SN[8] = Varies by vendor SN[8] = Varies by vendor

4 OtherData[7:10] OtherData[7:10] OtherData[7:10]

2 SN[0:1] = 0x01 0x23 SN[0:1] = 0x01 0x23 SN[0:1] = 0x01 0x23

2 OtherData[11:12] OtherData[11:12] OtherData[11:12]

5.3.3 DeriveKey Command

The device combines the current value of a key with the nonce stored in TempKey using SHA-256 and places the result into the target key slot. Specific bits of the Slot Configurations affect the way this command works.

• SlotConfig[TargetKey].Bit13 must be set or DeriveKey will return an error.
• DeriveKey always returns an error if KeyConfig indicates that the slot contains an ECC private key, if the Configuration zone has not been locked, or if the TargetKey slot is individually locked using SlotLocked.
• SlotConfig[TargetKey].Bit 12 ATECC608A-TNGLoRaWAN Device Commands © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 48

– 0: The source key that will be combined with TempKey is the target key as specified in the command line (Roll Key operation) – 1: The source key is the parent key of the target key, which is found in SlotConfig[TargetKey].WriteKey (Create Key operation).

• If SlotConfig[TargetKey].Bit15 is set, an input MAC must be present and have been computed as follows: – SHA-256(ParentKey, Opcode, Param1, Param2, SN[8], SN[0:1]) where the ParentKey ID is always SlotConfig[TargetKey].WriteKey.
• If performing a Roll Key operation and KeyConfig[TargetKey].ReqAuth is one, then the appropriate authorization must have been performed using KeyConfig[TargetKey].AuthKey prior to the execution of DeriveKey. If performing a Create Key operation and KeyConfig[ParentKey].ReqAuth is one, then the appropriate authorization must have been performed using KeyConfig[ParentKey].AuthKey prior to the execution of DeriveKey. Prior to execution of this command, the Nonce command must have been run to create a valid nonce in TempKey. If KeyConfig.ReqRandom is one for the source key, this nonce must have been created with the internal RNG or an error will be returned. In all cases, Mode[2] must match the state of TempKey.SourceFlag or the command will return an error. If performing a Roll Key operation and KeyConfig[TargetKey].ReqAuth is one, then the appropriate authorization must have been performed using KeyConfig[TargetKey].AuthKey prior to the execution of DeriveKey. If performing a Create Key operation and KeyConfig[ParentKey].ReqAuth is one, then the appropriate authorization must have been performed using KeyConfig[ParentKey].AuthKey prior to the execution of DeriveKey. If an input MAC is required and KeyConfig[ParentKey].ReqAuth is one, then the appropriate authorization must have been performed using KeyConfig[ParentKey].AuthKey prior to the execution of DeriveKey. If a parent key is involved in the operation (either SlotConfig[TargetKey].Bit12 or SlotConfig[TargetKey].Bit15 are set) and SlotConfig[ParentKey].LimitedUse is also set, DeriveKey returns an error if Counter[0] has reached its limit. DeriveKey always ignores LimitedUse for the target key. WARNINGIf the source and target key are the same, then there is a risk of permanent loss of the key value if power is interrupted during the write operation. If the Configuration bits permit it, then the key value may be recovered using an authenticated and encrypted write based on the parent key. For the ATECC608A-TNGLoRaWAN, the DeriveKey command can be run on Slot 0. Slot 13 is the parent key used for the key derivation and an authorizing MAC is always required. Table 5-64. Input Parameters DeriveKey Opcode (1 Byte) Mode (1 Byte) TargetKey (2 Bytes) Data (0 or 32 Bytes)

0x1C 0x00 0x00 0[Slot] Optional MAC data Use if TempKey Source was Random 0x04 0x00 0[Slot] Optional MAC data Use if TempKey Source was fixed Table 5-65. Output Response DeriveKey Name Size Notes Response 1 Byte • 0x00 - If successful

• Error code if there is a failure The key written to the target slot is the result of SHA-256 of the following message: ATECC608A-TNGLoRaWAN Device Commands © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 49

Table 5-66. Generated Key from DeriveKey # of Bytes SlotConfig[12]=0 SlotConfig[12]=1

32 TargetKey ParentKey

1 OpCode = 0x1C OpCode = 0x1C

2 TargetKey TargetKey

1 SN[8] = Varies by vendor SN[8] = Varies by vendor

2 SN[0:1] = 0x01 0x23 SN[0:1] = 0x01 0x23

25 Zeros Zeros

32 TempKey.Value TempKey.Value The data flow for this command is illustrated in Figure 5-1. Figure 5-1. Data Flow for DeriveKey Command Match Parent Key Target Key SHA (AUTH) Input MAC SHA (Device) Mode Source Key Nonce

5.3.4 GenDig Command

The GenDig command uses a SHA-256 Hash to combine a stored or input value with the contents of TempKey, which must be validated prior to the execution of this command. The stored value can come from one of the data slots, the Configuration zone, either of the OTP pages, or the monotonic counters. The specific mode of the device determines which data is to be included in the GenDig calculation. In some cases, it is required to run the GenDig prior to the execution of some commands. The command can be run multiple times to include more data in the digest prior to executing a given command. The resulting digest is retained in TempKey and can be used in one of four ways: 1. It can be included as part of the message used by the MAC, Sign or CheckMac commands. Because the MAC response output incorporates both the data used in the GenDig calculation and the secret key from the MAC command, it serves to authenticate the data stored in the Data and/or OTP zones. 2. A subsequent Read or Write command can use the digest to provide authentication and/or confidentiality for the data, in which case it is known as a data protection digest. 3. The command can be used for secure personalization by using a value from the transport keyarray. The resulting data protection digest would then be used by write. ATECC608A-TNGLoRaWAN Device Commands © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 50

1. The input value, typically a nonce from a remote device, is combined with the current TempKey value to create a shared nonce in which both devices can attest to the inclusion of the RNG.

5.3.4.1 GenDig - Config

Data from the Configuration zone can be included in the GenDig calculation. Data are always included in 32-byte blocks and only one block may be included on any given GenDig calculation. The Nonce command must be run prior to the first GenDig command to load a value into TempKey. Subsequent GenDig commands will use the value stored in TempKey from the previous GenDig operation. Table 5-67. Input Parameters GenDig Config Opcode (1 Byte) Mode (1 Byte) KeyID(1) (2 Bytes) Data (0 Bytes) 0x15 0x00 0x00 00 — Use Configuration Block 0 0x00 01 — Use Configuration Block 1 0x00 02 — Use Configuration Block 0x00 03 — Use Configuration Block 3 Note: 1. KeyId specifies the Configuration zone block to be used in the TempKey Calculation. Table 5-68. Output Response - GenDig Config Name Size Description Response 1 byte 0x00 - If successful. Error code - If the command fails. Notes: Flag Bits 1. TempKey.Valid flag will be set to 1 if successful, otherwise it is 0. 2. TempKey.GenDigData will be set to 0. Table 5-69. TempKey Calculation - GenDig Config 32 bytes 1 byte 1 byte 2 bytes 1 byte 2 bytes 25 bytes 32 bytes Configuration Zone Block Opcode = 0x15 Mode = 0x00 KeyID[0:1] = 0x0[block] 0x00 SN[8] = Varies by vendor SN[0:1] = 0x01 0x23 All Zeros TempKey.Value

5.3.4.2 GenDig - OTP

Data from the OTP zone can be included in the GenDig calculation. Data are always included in 32-byte blocks and only one block may be included on any given GenDig calculation. The Nonce command must be run prior to the first GenDig command to load a value into TempKey. Subsequent GenDig commands will use the value from the previous GenDig operation. Table 5-70. Input Parameters - GenDig OTP Opcode (1 Byte) Mode (1 Byte) KeyID(1) (2 Bytes) Data (0 Bytes) 0x15 0x01 0x00 00 — Use OTP Block 0 as the KeyID 0x00 01 — Use OTP Block 1 as the KeyID ATECC608A-TNGLoRaWAN Device Commands © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 51

Note: 1. KeyId specifies the OTP zone block to be used in the TempKey calculation. Table 5-71. Output Response - GenDig OTP Name Size Description Response 1 byte 0x00 - If successful. Error code - If the command fails. Notes: Flag Bits 1. TempKey.Valid flag will be set to 1 if successful, otherwise it is 0. 2. TempKey.GenDigData will be set to 0. Table 5-72. TempKey Calculation - GenDig OTP 32 bytes 1 byte 1 byte 2 bytes 1 byte 2 bytes 25 bytes 32 bytes OTP Zone Block Opcode = 0x15 Mode = 0x00 KeyID[0:1] = 0x0[block] 0x00 SN[8] = Varies by vendor SN[0:1] = 0x01 0x23 All Zeros TempKey.Value

5.3.4.3 GenDig - Data

Data from the Data zone slots can be included in the GenDig calculation. Data are always included in 32-byte blocks and only the lowest block of a slot is included in the GenDig calculation. The Nonce command must be run prior to the first GenDig command to load a value into TempKey. If the slot requires a random nonce, then the data must be generated by the Nonce command versus passing it into the device. Subsequent GenDig commands will use the value from the previous GenDig operation. If a slot is set for NoMAC, then it is not allowed to use the output of this GenDig in a MAC command. If multiple GenDigs are run, if any slot has NoMAC set, then the output in TempKey cannot be used in executing a MAC command. Table 5-73. Input Parameters - GenDig Data Opcode (1 Byte) Mode (1 Byte) KeyID(1) (2 Bytes) Data (0 or 4 Bytes) 0x15 0x02 0x00 0[Slot] — Use data from slot # in the calculation. 0x00 0[Slot] 4 bytes Use data from slot # in the calculation and other data when using a NoMAC key slot Note: 1. KeyId specifies the Data zone slot to be used in the TempKey calculation. Only the lowest 32 bytes will be used. Table 5-74. Output Response - GenDig Data Name Size Description Response 1 byte 0x00 - If successful. Error code - If the command fails. Notes: Flag Bits 1. TempKey.Valid flag will be set to 1 if successful, otherwise it is 0. 2. TempKey.GenDigData will be set to 1 indicating a DataZone slot was used in the calculation. 3. TempKey.KeyID will set to the slot specified in the command. 4. TempKey.NoMacFlag will be set to 0 if the MAC command is allowed and 1 if it is not. ATECC608A-TNGLoRaWAN Device Commands © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 52

Table 5-75. TempKey Calculation - GenDig Data Size Parameters - MAC Parameters - NoMAC 32 bytes DATA.slot[KeyID] DATA.slot[KeyID] 4 byte Opcode, Mode, KeyID = 0x15, 0x02, 0x0[Slot] 0x00 OtherData[0:3] 1 byte SN[8] = Varies by vendor SN[8] = Varies by vendor 2 bytes SN[0:1] = 0x01 0x23 SN[0:1] = 0x01 0x23 25 bytes All Zeros All Zeros 32 bytes TempKey.Value TempKey.Value

5.3.4.4 GenDig - Shared Nonce

In Shared Nonce mode 32 bytes of data are input to this command. This mode is used when a nonce value must be shared between two devices. The Nonce command must be run prior to the first GenDig command to load a value into TempKey. Subsequent GenDig commands will use the value from the previous GenDig operation. Table 5-76. Input Parameters GenDig Shared Nonce Opcode (1 Byte) Mode (1 Byte) KeyID(1) (2 Bytes) Data (32 Bytes) 0x15 0x03 0x00 0[Slot] Input data 0x80 0[Slot] Input data Note: 1. KeyId specifies the DataZone slot to be used in the TempKey calculation. Only the lowest 32 bytes will be used. Table 5-77. Output Response - GenDig Data Name Size Description Response 1 byte 0x00 - If successful. Error code - If the command fails. Notes: Flag Bits 1. TempKey.Valid flag will be set to 1 if successful, otherwise it is 0. 2. TempKey.GenDigData will be set to 1 indicating a DataZone slot was used in the calculation. 3. TempKey.KeyID will set to the slot specified in the command. Table 5-78. TempKey Calculation - GenDig Shared Nonce Size Parameters - KeyID MSB 0x00 Parameters - KeyID MSB 0x80 32 bytes Input Data TempKey.value 1 byte Opcode = 0x15 Opcode = 0x15 1 byte Mode = 0x03 Mode = 0x03 1 byte LSB of KeyID = 0x0[Slot] LSB of KeyID = 0x0[Slot] 1 byte 0x00 0x00 1 byte SN[8] = Varies by vendor SN[8] = Varies by vendor 2 bytes SN[0:1] = 0x01 0x23 SN[0:1] = 0x01 0x23 25 bytes All Zeros All Zeros 32 bytes TempKey.Value Input Data ATECC608A-TNGLoRaWAN Device Commands © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 53

5.3.4.5 GenDig - Counter

In the Counter mode of the GenDig command, the binary value of the counter is included in the TempKey calculation. The Nonce command must be run prior to the first GenDig command to load a value into TempKey. Subsequent GenDig commands will use the value from the previous GenDig operation. Table 5-79. Input Parameters - GenDig Counter Opcode (1 Byte) Mode (1 Byte) KeyID (2 Bytes) Data (0 Bytes) 0x15 0x04 0x00 00 — Include Counter[0] value 0x00 01 — Include Counter[1] value Note: 1. KeyId specifies the monotonic counter value to be used in the TempKey calculation. Table 5-80. Output Response - GenDig Counter Name Size Description Response 1 byte 0x00 - If successful. Error code - If the command fails. Notes: Flag Bits 1. TempKey.Valid flag will be set to 1 if successful, otherwise it is 0. 2. TempKey.GenDigData will be set to 0. Table 5-81. TempKey Calculation - GenDig Counter 32 bytes 1 byte 1 byte 2 bytes 1 byte 2 bytes 1 byte 4 bytes 20 bytes 32 bytes All Zeros Opcode = 0x15 Mode = 0x04 KeyID[0:1] = 0x0[Counter#] 0x00 SN[8] = Varies by vendor SN[0:1] = 0x01 0x23 Zero Counter[KEYID] - Binary value as reported by the Counter command All Zeros TempKey.Value

5.3.4.6 GenDig - Key Config

In the Key Config mode of the GenDig command, the slot configuration and key configuration of the key specified by KeyID are included in the GenDig TempKey calculation. The Nonce command must be run prior to the first GenDig command to load a value into TempKey. Subsequent GenDig commands will use the value from the previous GenDig operation. Table 5-82. Input Parameters - GenDig Key Config Opcode (1 Byte) Mode (1 Byte) KeyID(1) (2 Bytes) Data (0 or 4 Bytes) 0x15 0x05 0x00 0[Slot] — Includes slot configuration information Note: 1. KeyId specifies the slot # that will have its configuration information included in the TempKey calculation. The actual slot value is not included. ATECC608A-TNGLoRaWAN Device Commands © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 54

Table 5-83. Output Response - GenDig Key Config Name Size Description Response 1 byte 0x00 - If successful. Error code - If the command fails. Notes: Flag Bits 1. TempKey.Valid flag will be set to 1 if successful, otherwise it is 0. 2. TempKey.GenDigData will be set to 0. Table 5-84. TempKey Calculation - GenDig Key Config 32 bytes 1 byte 1 byte 2 bytes 1 byte 2 bytes 1 byte 2 bytes 2 bytes 1 byte 20 bytes TempKey.value Opcode = 0x15 Mode = 0x05 KeyID[0:1] = 0x0[Slot] 0x00 SN[8] = Varies by vendor SN[0:1] = 0x01 0x23 0x00 SlotConfig[KeyID] KeyConfig[KeyID] SlotLocked[KeyID] All Zeros

5.3.5 KDF Command

For the ATECC608A-TNGLoRaWAN, the KDF command implements the AES Key Derivation Function. Support for this function is available in CryptoAuthLib. For additional information on the KDF command contact Microchip Sales for more information.

5.3.6 MAC Command

The Message Authentication Code (MAC) command is used to generate a SHA256 digest of a message, which consists of a key stored in the device, a challenge, and other information on the device. The output of this command is the digest of this message. The normal command flow to use this command is as follows: 1. Run the Nonce command to load input challenge and optionally combine it with a generated random number. The result of this operation is a nonce stored internally on the device. 2. Optionally run the GenDig command one or more times to combine stored EEPROM locations in the device with the nonce. The result is stored internally in the device. This capability permits two or more keys to be used as part of the response generation. 3. Run this MAC command to combine the output of step 1 (and step 2 if desired) with an EEPROM key to generate an output response (i.e., digest). Alternatively, data in any slot (which does not have to be secret) can be accumulated into the response through the same GenDig mechanism. This has the effect of authenticating the value stored in that location.

5.3.6.1 Non-Diversified MAC

The MAC is always calculated over a total of 88 bytes and always creates a 32-byte SHA256 digest. A non- diversified MAC does not include the serial number of the device and will therefore be the same across all devices if the input parameters are the same. ATECC608A-TNGLoRaWAN Device Commands © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 55

Table 5-85. Input Parameters - Non-Diversified MAC Opcode (1 Byte) Mode (1 Byte) KeyID (2 Bytes) Data(2) (0-32 Bytes) Mode Descriptions 0x08 0x00 0x00 0[Slot] 32 bytes • First 32 bytes loaded from data slot

• Second 32 bytes are taken from the input challenge 0x01 or 0x05(1) 0x00 0[Slot] 0 bytes • First 32 bytes loaded from data slot
• Second 32 bytes are taken from TempKey 0x02 or 0x06(1) 0x00 00 32 bytes • First 32 bytes loaded with TempKey
• Second 32 bytes are taken from the input challenge Note: (1) Mode[2] must match the TempKey.SourceFlag. (2) When present, the Data parameter corresponds to the input challenge. Table 5-86. Output Response - Non-Diversified MAC Name Size Description Response 1 byte If the command fails 32 bytes SHA-256 digest Table 5-87. Non-Diversified MAC Calculation # of Bytes Mode 0x00 Mode 0x01 or 0x05 Mode 0x02 or 0x06 Data Slot Input Challenge Opcode (0x08) Mode KeyID Zeros SN[8] Varies by vendor Zeros SN[0:1] 0x01 0x23 Zeros Data Slot TempKey Opcode (0x08) Mode KeyID Zeros SN[8] Varies by vendor Zeros SN[0:1] 0x01 0x23 Zeros TempKey Input Challenge Opcode (0x08) Mode KeyID Zeros SN[8] Varies by vendor Zeros SN[0:1] 0x01 0x23 Zeros

5.3.6.2 Diversified MAC

A diversified MAC includes the serial number of the device. The serial number will be unique for each device and therefore, will always generate a unique SHA256 digest. The MAC is always calculated over a total of 88 bytes and always creates a 32-byte SHA256 digest. Table 5-88. Input Parameters - Diversified MAC Opcode (1 Byte) Mode (1 Byte) KeyID (2 Bytes) Data(2) (0-32 Bytes) Mode Descriptions 0x08 0x40 0x00 0[Slot] 32 bytes • First 32 bytes loaded from data slot

• Second 32 bytes are taken from the input challenge 0x41 or 0x45(1) 0x00 0[Slot] 0 bytes • First 32 bytes loaded from data slot
• Second 32 bytes are taken from TempKey 0x42 or 0x46(1) 0x00 00 32 bytes • First 32 bytes loaded with TempKey
• Second 32 bytes are taken from the input challenge ATECC608A-TNGLoRaWAN Device Commands © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 56

Note: (1) Mode[2] must match the TempKey.SourceFlag. (2) When present, the Data parameter corresponds to the input challenge. Table 5-89. Output Response - Diversified MAC Name Size Description Response 1 byte If the command fails 32 bytes SHA-256 digest Table 5-90. Diversified MAC Calculation # of Bytes Mode 0x40 Mode 0x41 or 0x45 Mode 0x42 or 0x46 Data Slot Input Challenge Opcode (0x08) Mode KeyID Zeros SN[8]Varies by vendor SN[4:7] SN[0:1] 0x01 0x23 SN[2:3] Data Slot TempKey Opcode (0x08) Mode KeyID Zeros SN[8] Varies by vendor SN[4:7] SN[0:1] 0x01 0x23 SN[2:3] TempKey Input Challenge Opcode (0x08) Mode KeyID Zeros SN[8] Varies by vendor SN[4:7] SN[0:1] 0x01 0x23 SN[2:3] ATECC608A-TNGLoRaWAN Device Commands © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 57

1. Application Information The ATECC608A-TNGLoRaWAN is a member of the Microchip’s Trust&GO CryptoAuthentication family of products. The Trust&GO products are easy to use, simple to implement and allow even low volume customers to implement security into their end system while leveraging Microchip’s expertise and infrastructure in secure provisioning. The ATECC608A-TNGLoRaWAN device is compatible with the LoRaWAN 1.1 specification and backwards compatible with the LoRaWAN 1.0 specification. Primary enhancement to LoRaWAN 1.1 was associated with improving overall security. Support for LoRaWAN Backend Interfaces has been built into the device to offer support for roaming access across various LoRaWAN networks. The ATECC608A-TNGLoRaWAN device has been developed to take the guesswork out of adding security to a LoRa Wide Area Network. The product has been preconfigured to readily connect IoT devices to major LoRa network service providers such as Actility and TTI. For any given application, a specific network infrastructure provider must be selected. Each infrastructure provider will have its own private key from which diversified parent keys for each device are generated. The diversified parent keys are then used to generate multiple network and application AES Session keys. The ATECC608A-TNGLoRaWAN device is integrated with the Microchip’s Secure Provisioning environment to quickly and easily add devices to major network security providers. This allows for rapid prototyping to verify new designs and rapid deployment of products once initial prototyping is complete. ATECC608A-TNGLoRaWAN

Application Information

© 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 58

1. I2C Interface The I2C Interface uses the SDA and SCL pins to indicate various I/O states to the ATECC608A-TNGLoRaWAN. This interface is designed to be compatible at the protocol level with the Microchip AT24C16 Serial EEPROM operating at 1 MHz. Note: There are many differences between the two devices (for example, the ATECC608A-TNGLoRaWAN and AT24C16 have different default I2C addresses); therefore, designers should read the respective data sheets carefully. The SDA pin is normally pulled high with an external pull-up resistor because the ATECC608A-TNGLoRaWAN includes only an open-drain driver on its output pin. The bus master may either be open-drain or totem pole. In the latter case, it should be tri-stated when the ATECC608A-TNGLoRaWAN is driving results on the bus. The SCL pin is an input and must be driven both high and low at all times by an external device or resistor.

7.1 I/O Conditions

The device responds to the following I/O conditions:

7.1.1 Device is Asleep

When the device is asleep, it ignores all but the Wake condition.

• Wake - Upon the rising edge of SDA, after SDA has been held low for a period ≥ t WLO, the device exits the Low- Power mode. After a delay of tWHI, it will be ready to receive I2C commands.
• The device ignores any levels or transitions on the SCL pin when the device is idle or asleep and during t WLO. At some point during tWHI, the SCL pin is enabled and the conditions listed in Section 7.1.2 Device is Awake are honored. The Wake condition requires that either the system processor manually drives the SDA pin low for tWLO, or a data byte of 0x00 be transmitted at a clock rate sufficiently slow so that SDA is low for a minimum period of tWLO. When the device is awake, the normal processor I2C hardware and/or software can be used for device communications. This includes the I/O sequences required to put the device back into Low-Power (i.e., Sleep) mode. Tip: A simple way to generate a wake pulse is to send a byte of 0x00 at 100 kHz. Subsequent commands can be run at a higher frequency. In the I2C mode, the device will ignore a wake sequence that is sent when the device is already awake. Multiple Devices on the Bus When there are multiple devices on the bus and the I2C interface is run at speeds of less than ~300 kHz1, the transmission of certain data patterns will cause the ATECC608A-TNGLoRaWAN devices on the bus to wake up. The lower the frequency the higher the probability that the device wakes up. Because subsequent device addresses transmitted along the bus only match the desired devices, the ATECC608A-TNGLoRaWAN will not respond but will be awake. It is recommended that after communicating with another device at slow frequencies, a sleep or idle sequence be issued to place the ATECC608A-TNGLoRaWAN back into a known state. Important: tWLO is the minimum time that the system must provide to ensure that the ATECC608A- TNGLoRaWAN will wake under all manufacturing and environmental conditions. In actuality, the device may wake up with a lesser pulse width. 1 The actual frequency for a given device will vary with process and environmental factors. This value is considered safe under all conditions. ATECC608A-TNGLoRaWAN I2C Interface © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 59

7.1.2 Device is Awake

When the device is awake, it honors the conditions listed below:

• DATA Zero: If SDA is low and stable while SCL goes from low to high to low, then a zero bit is being transferred on the bus. SDA can change while SCL is low.
• DATA One: If SDA is high and stable while SCL goes from low to high to low, then a one bit is being transferred on the bus. SDA can change while SCL is low. Figure 7-1. Data Bit Transfer on I2C Interface SCL Data Line Stable; Data Valid Change of Data Allowed SDA
• Start Condition: A high-to-low transition of SDA with SCL high is a Start condition which must precede all commands.
• Stop Condition: A low-to-high transition of SDA with SCL high is a Stop condition. After this condition is received by the device, the current I/O transaction ends. On input, if the device has sufficient bytes to execute a command, the device transitions to the busy state and begins execution. The Stop condition should always be sent at the end of any packet sent to the device. Figure 7-2. Start and Stop Conditions on I2C Interface SCL SDA Start Condition Stop Condition S P
• Acknowledge (ACK): On the ninth clock cycle after every address or data byte is transferred, the receiver will pull the SDA pin low to acknowledge proper reception of the byte.
• Not Acknowledge (NACK): Alternatively, on the ninth clock cycle after every address or data byte is transferred, the receiver can leave the SDA pin high to indicate that there was a problem with the reception of the byte or that this byte completes the group transfer. Figure 7-3. NACK and ACK Conditions on I2C Interface Data Output by Receiver SCL from Master Data Output by Transmitter Clock Pulse for Acknowledgment Start Condition S Not Acknowledge Acknowledge 1 2 8 9 ATECC608A-TNGLoRaWAN I2C Interface © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 60

Multiple ATECC608A-TNGLoRaWAN devices can easily share the same I2C interface signals if the I2C_Address byte in the Configuration zone is programmed differently for each device on the bus. Because all seven of the bits of the device address are programmable, ATECC608A-TNGLoRaWAN can also share the I2C interface with any I2C device, including any Serial EEPROM.

7.2 I2C Transmission to ATECC608A-TNGLoRaWAN

The transmission of data from the system to the ATECC608A-TNGLoRaWAN is summarized in the table below. The order of transmission is as follows:

• Start Condition
• Device Address Byte
• Word Address Byte
• Optional Data Bytes (1 through N)
• Stop Condition Figure 7-4. Normal I2C Transmission to ATECC608A-TNGLoRaWAN 1-7 8 9 1-7 8 9 1-7 8 9 1-7 8 9 1-7 8 9SCL SDA S P R/W ACK 1 ACK 1 ACK 1 Word Address Data 1 ACK 1 Data 2Start Condition Stop Condition Device Address ACK 1 Data N SDA is driven low by ATECC608A-TNGLoRaWAN ACK periods. The following tables label the bytes of the I/O transaction. The column labeled “I2C Name” provides the name of the byte as described in the AT24C16 data sheet. Table 7-1. I2C Transmission to ATECC608A-TNGLoRaWAN Name I2C Name Description Device Address Device Address This byte selects a particular device on the I2C interface. ATECC608A-TNGLoRaWAN is selected if bits 1 through 7 of this byte match bits 1 through 7 of the I2C_Address byte in the Configuration zone. Bit 0 of this byte is the standard I2C R/W bit, and should be zero to indicate a write operation (the bytes following the device address travel from the master to the slave). Word Address Word Address This byte should have a value of 0x03 for normal operation. See Section 7.2.1 Word Address Values for more information. Command Data1,N The command group, consisting of the count, command packet, and the two-byte CRC. The CRC is calculated over the size and packet bytes. See Section 4.1 I/O Transactions. Because the device treats the command input buffer as a FIFO, the input group can be sent to the device in one or many I2C command groups. The first byte sent to the device is the count, so after the device receives that number of bytes, it will ignore any subsequently received bytes until execution is finished. The system must send a Stop condition after the last command byte to ensure that ATECC608A-TNGLoRaWAN will start the computation of the command. Failure to send a Stop condition may eventually result in a loss of synchronization; see Section 7.2.2 I2C Synchronization for recovery procedures.

7.2.1 Word Address Values

During an I2C write packet, the ATECC608A-TNGLoRaWAN interprets the second byte sent as the word address, which indicates the packet function as it is described in the table below: ATECC608A-TNGLoRaWAN I2C Interface © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 61

Table 7-2. Word Address Values Name Value Description Reset 0x00 Reset the address counter. The next I2C read or write transaction will start with the beginning of the I/O buffer. Sleep (Low-power) 0x01 The ATECC608A-TNGLoRaWAN goes into the low-power Sleep mode and ignores all subsequent I/O transitions until the next Wake flag. The entire volatile state of the device is reset. Idle 0x02 The ATECC608A-TNGLoRaWAN goes into the Idle mode and ignores all subsequent I/O transitions until the next Wake flag. The contents of TempKey, MessageDigestBuffer, and Alternate Key registers are retained. Command 0x03 Write subsequent bytes to sequential addresses in the input command buffer that follow previous writes. This is the normal operation. Reserved 0x04 – 0xFF These addresses should not be sent to the device.

7.2.2 I2C Synchronization

It is possible for the system to lose synchronization with the I/O port on the ATECC608A-TNGLoRaWAN, perhaps due to a system Reset, I/O noise, or other conditions. Under this circumstance, the ATECC608A-TNGLoRaWAN may not respond as expected, may be asleep, or may be transmitting data during an interval when the system is expecting to send data. To resynchronize, the following procedure can be followed: 1. To ensure an I/O channel Reset, the system must send the standard I 2C software Reset sequence, as follows:

• A Start bit condition
• Nine cycles of SCL, with SDA held high by the system pull-up resistor
• Another Start bit condition
• A Stop bit condition It should then be possible to send a read sequence, and if synchronization completes properly, the ATECC608A-TNGLoRaWAN will ACK the device address. The device may return data or may leave the bus floating (which the system will interpret as a data value of 0xFF) during the data periods. If the device does ACK the device address, the system should reset the internal address counter to force the ATECC608A-TNGLoRaWAN to ignore any partial input command that may have been sent. This can be accomplished by sending a write sequence to word address 0x00 (Reset), followed by a Stop condition. 2. If the device does not respond to the device address with an ACK, then it may be asleep. In this case, the system must send a complete Wake token and wait tWHI after the rising edge. The system may then send another read sequence, and if synchronization is complete, the device will ACK the device address. 3. If the device still does not respond to the device address with an ACK, then it may be busy executing a command. The system must wait the longest tEXEC (max) and then send the read sequence, which will be acknowledged by the device.

7.3 Sleep Sequence

Upon completion of the use of the ATECC608A-TNGLoRaWAN by the system, the system should issue a sleep sequence to put the device into Low-Power mode. This sequence consists of the proper device address followed by the value of 0x01 as the word address followed by a Stop condition. This transition to the Low-Power state causes a complete reset of the device’s internal command engine and input/output buffer. It can be sent to the device at any time when it is awake and not busy.

7.4 Idle Sequence

If the total sequence of required commands exceeds tWATCHDOG, then the device will automatically go to sleep and lose any information stored in the volatile registers. This action can be prevented by putting the device into Idle mode prior to completion of the watchdog interval. When the device receives the Wake token, it will then restart the Watchdog Timer and execution can be continued. ATECC608A-TNGLoRaWAN I2C Interface © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 62

The idle sequence consists of the proper device address followed by the value of 0x02 as the word address followed by a Stop condition. It can be sent to the device at any time when it is awake and not busy.

7.5 I2C Transmission from the ATECC608A-TNGLoRaWAN

When the ATECC608A-TNGLoRaWAN is awake and not busy, the bus master can retrieve the current output buffer contents from the device using an I2C read. If valid command results are available, the size of the group returned is determined by the particular command which has been run. Otherwise, the size of the group (and the first byte returned) will always be four: count, status/error, and 2-byte CRC. The bus timing is shown in Figure 8-2. Table 7-3. I2C Transmission from the ATECC608A-TNGLoRaWAN Name I2C Name Direction Description Device Address Device Address To slave This byte selects a particular device on the I2C interface and ATECC608A-TNGLoRaWAN will be selected if bits 1 through 7 of this byte match bits 1 through 7 of the I2C_Address byte in the Configuration zone. Bit 0 of this byte is the standard I2C R/W pin, and should be one to indicate that the bytes following the device address travel from the slave to the master (read). Data Data1,N To master The output group, consisting of the count, status/error byte or the output packet followed by the two-byte CRC. See Section 4.1 I/O Transactions. The status, error, or command outputs can be read repeatedly by the master. Each time a Read command is sent to the ATECC608A-TNGLoRaWAN along the I2C interface, the device transmits the next sequential byte in the output buffer. See the following section for details on how the device handles the address counter. If the ATECC608A-TNGLoRaWAN is busy, idle, or asleep, it will NACK the device address on a read sequence. If a partial command has been sent to the device and a read sequence [Start + DeviceAddress(R/W == R)] is sent to the device, then the ATECC608A-TNGLoRaWAN will NACK the device address to indicate that no data is available to be read. ATECC608A-TNGLoRaWAN I2C Interface © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 63

1. Electrical Characteristics

8.1 Absolute Maximum Ratings

Operating Temperature -40°C to +85°C Storage Temperature -65°C to +150°C Maximum Operating Voltage 6.0V DC Output Current 5.0 mA Voltage on any pin -0.5V to (VCC + 0.5V) -0.5V to (VCC + 0.5V) ESD Ratings: Human Body Model(HBM) ESD >4kV Charge Device Model(CDM) ESD >1kV Note: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification are not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

8.2 Reliability

The ATECC608A-TNGLoRaWAN is fabricated with Microchip’s high reliability CMOS EEPROM manufacturing technology. Table 8-1. EEPROM Reliability Parameter Min. Typ. Max. Units Write Endurance at +85°C (Each Byte) 400,000 — — Write Cycles Data Retention at +55°C 10 — — Years Data Retention at +35°C 30 50 — Years Read Endurance Unlimited Read Cycles

8.3 AC Parameters: All I/O Interfaces

Figure 8-1. AC Timing Diagram: All Interfaces Data CommWake tLIGNORE tHIGNORE Noise Suppresion tWLO tWHI ATECC608A-TNGLoRaWAN

Electrical Characteristics

© 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 64

Table 8-2. AC Parameters: All I/O Interfaces Parameter Sym. Direction Min. Typ. Max. Units Conditions Power-Up Delay(2) tPU To Crypto Device 100 — — µs Minimum time between VCC > VCC min prior to start of tWLO. Wake Low Duration tWLO To Crypto Device 60 — — µs Wake High Delay to Data Comm tWHI To Crypto Device 1500 — — µs SDA should be stable high for this entire duration unless polling is implemented. SelfTest is not enabled at power-up. Wake High Delay when SelfTest is Enabled tWHIST To Crypto Device 20 — — ms SDA should be stable high for this entire duration unless polling is implemented. High-Side Glitch Filter at Active tHIGNORE_A To Crypto Device 45(1) — — ns Pulses shorter than this in width will be ignored by the device, regardless of its state when active. Low-Side Glitch Filter at Active tLIGNORE_A To Crypto Device 45(1) — — ns Pulses shorter than this in width will be ignored by the device, regardless of its state when active. Low-Side Glitch Filter at Sleep tLIGNORE_S To Crypto Device 15(1) — — µs Pulses shorter than this in width will be ignored by the device when in Sleep mode. Watchdog Time-out tWATCHDOG To Crypto Device 0.7 1.3 1.7 s Time from wake until device is forced into Sleep mode if Config.ChipMode[2] is 0. Notes: 1. These parameters are characterized, but not production tested. 2. The power-up delay will be significantly longer if power-on self test is enabled in the Configuration zone.

8.3.1 AC Parameters: I2C Interface

Figure 8-2. I2C Synchronous Data Timing SCL SDA IN SDA OUT tF tHIGH tLOW tLOW tR tAA tDH tBUF Table 8-3. AC Characteristics of I2C Interface(2) Unless otherwise specified, applicable over recommended operating range from TA = -40°C to +85°C, VCC = +2.0V to +5.5V, CL = 1 TTL Gate and 100 pF. ATECC608A-TNGLoRaWAN © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 65

Parameter Sym. Min. Max. Units SCL Clock Frequency fSCL 0 1 MHz SCL High Time tHIGH 400 — ns SCL Low Time tLOW 400 — ns Start Setup Time tSU.STA 250 — ns Start Hold Time tHD.STA 250 — ns Stop Setup Time tSU.STO 250 — ns Data In Setup Time tSU.DAT 100 — ns Data In Hold Time tHD.DAT 0 — ns Input Rise Time1 tR — 300 ns Input Fall Time1 tF — 100 ns Clock Low to Data Out Valid tAA 50 550 ns Data Out Hold Time tDH 50 — ns SMBus Time-Out Delay tTIMEOUT 25 75 ms Time bus must be free before a new transmission can start1 tBUF 500 — ns Notes: 1. Values are based on characterization and are not tested. 2. AC measurement conditions: – R L (connects between SDA and VCC): 1.2 kΩ (for VCC = +2.0V to +5.0V) – Input pulse voltages: 0.3V CC to 0.7VCC – Input rise and fall times: ≤ 50 ns – Input and output timing reference voltage: 0.5V CC

8.4 DC Parameters: All I/O Interfaces

Table 8-4. DC Parameters on All I/O Interfaces Parameter Sym. Min. Typ. Max. Units Conditions Ambient Operating Temperature TA -40 — +85 °C Standard Industrial Temperature Range Power Supply Voltage VCC 2.0 — 5.5 V — Active Power Supply Current ICC — 2 3 mA Waiting for I/O during I/O transfers or execution of non-ECC commands. Independent of Clock Divider value. — — 14 mA During ECC command execution. Clock divider = 0x0 Idle Power Supply Current IIDLE — 800 — µA When device is in Idle mode, VSDA and VSCL < 0.4V or > VCC – 0.4 Sleep Current ISLEEP — 30 150 nA When device is in Sleep mode, VCC ≤ 3.6V, VSDA and VSCL < 0.4V or > VCC – 0.4, TA ≤ +55°C — — 2 µA When device is in Sleep mode. Over full VCC and temperature range. ATECC608A-TNGLoRaWAN © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 66

Parameter Sym. Min. Typ. Max. Units Conditions Output Low Voltage VOL — — 0.4 V When device is in Active mode, VCC = 2.5 to 5.5V Output Low Current IOL — — 4 mA When device is in Active mode, VCC = 2.5 to 5.5V, VOL = 0.4V Theta JA ƟJA — 166 — °C/W SOIC (SSH) — 173 — °C/W UDFN (MAH)

8.4.1 VIH and VIL Specifications

The input levels of the device will vary dependent on the mode and voltage of the device. The input voltage thresholds when in Sleep or Idle mode are dependent on the VCC level as shown in Figure 8-3. When in Sleep or Idle mode the TTLenable bit has no effect. The active input levels of the ATECC608A-TNGLoRaWAN are fixed and do not vary with the VCC level. The input levels transmitted to the device must comply with the table below. Table 8-5. VIL, VIH on All I/O Interfaces (TTLenable = 0) Parameter Sym. Min. Typ. Max. Units Conditions Input Low Voltage VIL -0.5 — 0.5 V When device is active and TTLenable bit in Configuration memory is zero; otherwise, see above. Input High Voltage VIH 1.5 — VCC + 0.5 V When device is active and TTLenable bit in Configuration memory is zero; otherwise, see above. ATECC608A-TNGLoRaWAN © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 67

Figure 8-3. VIH and VIL in Sleep and Idle Mode ATECC608A-TNGLoRaWAN © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 68

1. Package Drawings

9.1 Package Marking Information

As part of Microchip’s overall security features, the part marking for all crypto devices is intentionally vague. The marking on the top of the package does not provide any information as to the actual device type or the manufacturer of the device. The alphanumeric code on the package provides manufacturing information and will vary with assembly lot. The packaging mark should not be used as part of any incoming inspection procedure. ATECC608A-TNGLoRaWAN Package Drawings © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 69

9.2 8-pad UDFN BA 0.10C0.10C (DATUM B) (DATUM A) CSEATINGPLANE N 2XTOP VIEW SIDE VIEW NOTE 1 N 0.10CAB 0.10CAB 0.10C 0.08C Microchip Technology Drawing C04-21355-Q4B Rev B Sheet 1 of 2 For the most current package drawings, please see the Microchip Packaging Specification located athttp://www.microchip.com/packagingNote:8-Lead Ultra Thin Plastic Dual Flat, No Lead Package (Q4B) - 2x3 mm Body [UDFN]Atmel Legacy Global Package Code YNZ © 2017 Microchip Technology Inc. D E E2K L 8X be 0.10CAB0.05C A(A3) BOTTOM VIEW ATECC608A-TNGLoRaWAN Package Drawings © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 70

For the most current package drawings, please see the Microchip Packaging Specification located athttp://www.microchip.com/packagingNote: © 2017 Microchip Technology Inc. Number of TerminalsOverall Height Terminal WidthOverall WidthTerminal LengthExposed Pad Width Terminal ThicknessPitchStandoff UnitsDimension Limits A1A bE2 A3e LE N 0.50 BSC0.152 REF 1.200.350.18 0.500.00 0.250.401.30 0.550.02

3.00 BSC

1.400.450.30 0.600.05 MAX K -0.20 -Terminal-to-Exposed-Pad Overall LengthExposed Pad LengthDD21.402.00 BSC1.501.60 Microchip Technology Drawing C04-21355-Q4B Rev B Sheet 2 of 2 8-Lead Ultra Thin Plastic Dual Flat, No Lead Package (Q4B) - 2x3 mm Body [UDFN]Atmel Legacy Global Package Code YNZ ATECC608A-TNGLoRaWAN Package Drawings © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 71

RECOMMENDED LAND PATTERNDimension LimitsUnitsOptional Center Pad WidthOptional Center Pad LengthContact PitchY2X2 1.401.60MILLIMETERS0.50 BSCMINE MAX Contact Pad Length (X8)Contact Pad Width (X8)Y1X1 0.850.30 NOM CContact Pad Spacing2.90Contact Pad to Center Pad (X8)G10.33Thermal Via DiameterVThermal Via PitchEV 0.301.00 For the most current package drawings, please see the Microchip Packaging Specification located athttp://www.microchip.com/packagingNote: © 2017 Microchip Technology Inc.Microchip Technology Drawing C04-23355-Q4B Rev B 8-Lead Ultra Thin Plastic Dual Flat, No Lead Package (Q4B) - 2x3 mm Body [UDFN]Atmel Legacy Global Package Code YNZ Y1SILK SCREENX1E C EVG2 ØV Contact Pad to Contact Pad (X6)G20.20 ATECC608A-TNGLoRaWAN Package Drawings © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 72

9.3 8-lead SOIC

0.25 C A–B D

C SEATING PLANE TOP VIEW SIDE VIEW VIEW A–A 0.10 C 0.10 C Microchip Technology Drawing No. C04-057-SWB Rev E Sheet 1 of 2 For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Note: 8-Lead Plastic Small Outline - Narrow, 3.90 mm (.150 In.) Body [SOIC] Atmel Legacy Global Package Code SWB © 2017 Microchip Technology Inc. R 1 2 N h h A2A A B e D E E 2E1 NOTE 5 NOTE 5 NX b

0.10 C A–B

H 0.23 (L1) L R0.13 R0.13 VIEW C SEE VIEW C NOTE 1 D ATECC608A-TNGLoRaWAN Package Drawings © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 73

Microchip Technology Drawing No. C04-057-SWB Rev E Sheet 2 of 2 For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Note: © 2017 Microchip Technology Inc. R Foot Angle 0° - 8° 15°-5°Mold Draft Angle Bottom 15°-5°Mold Draft Angle Top 0.51-0.31bLead Width 0.25-0.17cLead Thickness 1.27-0.40LFoot Length 0.50-0.25hChamfer (Optional)

4.90 BSCDOverall Length

3.90 BSCE1Molded Package Width

6.00 BSCEOverall Width

0.25-0.10A1Standoff --1.25A2Molded Package Thickness 1.75--AOverall Height

1.27 BSCePitch

protrusions shall not exceed 0.15mm per side. 3. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or REF: Reference Dimension, usually without tolerance, for information purposes only. BSC: Basic Dimension. Theoretically exact value shown without tolerances. 1. Pin 1 visual index feature may vary, but must be located within the hatched area. 2. § Significant Characteristic 4. Dimensioning and tolerancing per ASME Y14.5M Notes: Footprint L1 1.04 REF 5. Datums A & B to be determined at Datum H. 8-Lead Plastic Small Outline - Narrow, 3.90 mm (.150 In.) Body [SOIC] Atmel Legacy Global Package Code SWB ATECC608A-TNGLoRaWAN Package Drawings © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 74

Microchip Technology Drawing C04-2057-SWB Rev E 8-Lead Plastic Small Outline - Narrow, 3.90 mm (.150 In.) Body [SOIC] BSC: Basic Dimension. Theoretically exact value shown without tolerances. Notes: Dimensioning and tolerancing per ASME Y14.5M1. For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging Note: © 2017 Microchip Technology Inc. R Dimension Limits Units CContact Pad Spacing Contact Pitch MILLIMETERS

1.27 BSC

E MAX 5.40 Contact Pad Length (X8) Contact Pad Width (X8) 1.55 0.60 NOM E C SILK SCREEN Atmel Legacy Global Package Code SWB ATECC608A-TNGLoRaWAN Package Drawings © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 75

1. Revision History Revision A (November 2019) Original release of the document. Revision B (September 2020)

• Simplification of the Configuration Zone Information
• Simplification of the Data slot Configuration Information
• Simplification of SRAM descriptions.
• Added Tables for overall Device Commands and Symmetric Cryptography Commands ATECC608A-TNGLoRaWAN

Revision History

© 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 76

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• Business of Microchip – Product selector and ordering guides, latest Microchip press releases, listing of seminars and events, listings of Microchip sales offices, distributors and factory representatives Product Change Notification Service Microchip’s product change notification service helps keep customers current on Microchip products. Subscribers will receive email notification whenever there are changes, updates, revisions or errata related to a specified product family or development tool of interest. To register, go to www.microchip.com/pcn and follow the registration instructions. Customer Support Users of Microchip products can receive assistance through several channels:
• Distributor or Representative
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• Technical Support Customers should contact their distributor, representative or ESE for support. Local sales offices are also available to help customers. A listing of sales offices and locations is included in this document. Technical support is available through the website at: www.microchip.com/support ATECC608A-TNGLoRaWAN © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 77

Product Identification System To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. X -X Device Package Type Tape and Reel Device: TTI Base Part #: ATECC608A-TNGLORA Actility Base Part #: ATECC608A-TNGACT Pre-configured Cryptographic Co-processor with secure hardware-based key storage for LoRa Wide Area Networks Package Options U 8-Pad 2 mm x 3 mm x 0.6 mm Body, Thermally Enhanced Plastic Ultra Thin Dual Flat, No Lead Package (UDFN) S 8-Lead (0.150” Wide Body), Plastic Gull Wing Small Outline (JEDEC SOIC) Tape and Reel Options G 2k Reel C 100 Unit Reel B 10 Unit Bulk-Prototype units Table 14-1. Device Ordering codes arranged by LoRa Network Provider The Things Industry (TTI) Device Ordering Codes

• ATECC608A-TNGLORAU-G: Trust&GO LoRaWAN, Provisioned, 8-UDFN, I 2C, 2K Reel
• ATECC608A-TNGLORAU-C: Trust&GO LoRaWAN, Provisioned, 8-UDFN, I 2C, 100 Unit Reel
• ATECC608A-TNGLORAU-B: Trust&GO LoRaWAN, Prototyping, 8-UDFN, I 2C, 10 Unit Bulk
• ATECC608A-TNGLORAS-G: Trust&GO LoRaWAN, Provisioned, 8-SOIC, I 2C, 2K Reel
• ATECC608A-TNGLORAS-C: Trust&GO LoRaWAN, Provisioned, 8-SOIC, I 2C, 100 Unit Reel
• ATECC608A-TNGLORAS-B: Trust&GO LoRaWAN, Prototyping, 8-SOIC, I 2C, 10 Unit Bulk Actility Device Ordering Codes
• ATECC608A-TNGACTU-G: Trust&GO LoRaWAN, Provisioned, 8-UDFN, I 2C, 2K Reel
• ATECC608A-TNGACTU-C: Trust&GO LoRaWAN, Provisioned, 8-UDFN, I 2C, 100 Unit Reel
• ATECC608A-TNGACTU-B: Trust&GO LoRaWAN, Prototyping, 8-UDFN, I 2C, 10 Unit Bulk
• ATECC608A-TNGACTS-G: Trust&GO LoRaWAN, Provisioned, 8-SOIC, I 2C, 2K Reel
• ATECC608A-TNGACTS-C: Trust&GO LoRaWAN, Provisioned, 8-SOIC, I 2C, 100 Unit Reel
• ATECC608A-TNGACTS-B: Trust&GO LoRaWAN, Prototyping, 8-SOIC, I 2C, 10 Unit Bulk Note: 1. Tape and Reel identifier only appears in the catalog part number description. This identifier is used for ordering purposes and is not printed on the device package. Check with your Microchip Sales Office for package availability with the Tape and Reel option. Microchip Devices Code Protection Feature Note the following details of the code protection feature on Microchip devices:
• Microchip products meet the specifications contained in their particular Microchip Data Sheet.
• Microchip believes that its family of products is secure when used in the intended manner and under normal conditions.
• There are dishonest and possibly illegal methods being used in attempts to breach the code protection features of the Microchip devices. We believe that these methods require using the Microchip products in a manner ATECC608A-TNGLoRaWAN © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 78

outside the operating specifications contained in Microchip’s Data Sheets. Attempts to breach these code protection features, most likely, cannot be accomplished without violating Microchip’s intellectual property rights.

• Microchip is willing to work with any customer who is concerned about the integrity of its code.
• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of its code. Code protection does not mean that we are guaranteeing the product is “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Legal Notice Information contained in this publication is provided for the sole purpose of designing with and using Microchip products. Information regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. THIS INFORMATION IS PROVIDED BY MICROCHIP “AS IS”. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION INCLUDING BUT NOT LIMITED TO ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE OR WARRANTIES RELATED TO ITS CONDITION, QUALITY, OR PERFORMANCE. IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE INFORMATION OR ITS USE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY RELATED TO THE INFORMATION OR ITS USE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THE INFORMATION. Use of Microchip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights unless otherwise stated. Trademarks The Microchip name and logo, the Microchip logo, Adaptec, AnyRate, AVR, AVR logo, AVR Freaks, BesTime, BitCloud, chipKIT, chipKIT logo, CryptoMemory, CryptoRF, dsPIC, FlashFlex, flexPWR, HELDO, IGLOO, JukeBlox, KeeLoq, Kleer, LANCheck, LinkMD, maXStylus, maXTouch, MediaLB, megaAVR, Microsemi, Microsemi logo, MOST, MOST logo, MPLAB, OptoLyzer, PackeTime, PIC, picoPower, PICSTART, PIC32 logo, PolarFire, Prochip Designer, QTouch, SAM-BA, SenGenuity, SpyNIC, SST, SST Logo, SuperFlash, Symmetricom, SyncServer, Tachyon, TempTrackr, TimeSource, tinyAVR, UNI/O, Vectron, and XMEGA are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. APT, ClockWorks, The Embedded Control Solutions Company, EtherSynch, FlashTec, Hyper Speed Control, HyperLight Load, IntelliMOS, Libero, motorBench, mTouch, Powermite 3, Precision Edge, ProASIC, ProASIC Plus, ProASIC Plus logo, Quiet-Wire, SmartFusion, SyncWorld, Temux, TimeCesium, TimeHub, TimePictra, TimeProvider, Vite, WinPath, and ZL are registered trademarks of Microchip Technology Incorporated in the U.S.A. Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut, BlueSky, BodyCom, CodeGuard, CryptoAuthentication, CryptoAutomotive, CryptoCompanion, CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial Programming, ICSP, INICnet, Inter-Chip Connectivity, JitterBlocker, KleerNet, KleerNet logo, memBrain, Mindi, MiWi, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, PowerSmart, PureSilicon, QMatrix, REAL ICE, Ripple Blocker, SAM-ICE, Serial Quad I/O, SMART-I.S., SQI, SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC, USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. ATECC608A-TNGLoRaWAN © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 79

The Adaptec logo, Frequency on Demand, Silicon Storage Technology, and Symmcom are registered trademarks of Microchip Technology Inc. in other countries. GestIC is a registered trademark of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in other countries. All other trademarks mentioned herein are property of their respective companies. © 2020, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. ISBN: 978-1-5224-6396-2 Quality Management System For information regarding Microchip’s Quality Management Systems, please visit www.microchip.com/quality. ATECC608A-TNGLoRaWAN © 2020 Microchip Technology Inc. Complete Datasheet DS40002154B-page 80

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