AT-103 MACOM | Alldatasheet
Document overview
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Technical content
Features
Attenuation 0.5 dB Steps to 15.5 dB CMOS Control Interface Internal Latch on Control Input Hermetic Case PIN 1 PIN 13 0.600 (15.2) 0.14 (3.6 –0.5) 0.10 (2.5 –0.5) 0.80 (20.3 –0.5)
0.100 TYP
(2.4) 0.018 –0.005 (0.46 –0.13) DIA 24 PINS
0.120 MIN
(3.0)
0.200 MAX
(5.1) RF1 RF2 +V C R 16 1 2 4 8 1.37 (34.8 –0.5) l l l l DI-3 Guaranteed Specifications* (From-55°C to +85°C) Operating Characteristics
Ordering Information
Dimensions in ( ) are in mm. Unless Otherwise Noted: .xxx = ±0.010 (.xx = ±0.25) WEIGHT (APPROX.): 0.39 OUNCES 11 GRAMS MIL-STD-883 screening available. 1 2 3 4 5 6 7 8 9 10 - 12 13 14 - 23 24 + 5V GND C R 0.5 1 2 4 8 GND RF2 GND RF1 Pin Configuration All specifications apply when operated with bias voltage of +15 VDC and a 50 ohm impedance at both RF ports. Above reference insertion loss.
5-Bit Digital Attenuator AT-103 V2.00 M/A-COM, Inc. North America: Tel. (800) 366-2266 n Asia/Pacific: Tel. +81 (03) 3226-1671n Europe: Tel. +44 (1344) 869 595 Fax (800) 618-8883 Fax +81 (03) 3226-1451 Fax +44 (1344) 300 020 Specifications Subject to Change Without Notice. Truth Table Typical Performance ATTENUATION FLATNESS VSWR REFERENCE INSERTION LOSS