ASVMPALP-14.3181MHZ-XJ-PD

ASVMPA ABRACON | Alldatasheet

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Plastic SMD MEMS Clock Oscillator Revision: IR Initial Release 9/2/2025 Page 1 Disclaimer lign Check Inventory S lign Request Samples

Description

Parameters Min. Typ. Max. Units Notes Frequency Range CMOS 2.5000 170.0000 MHz -20 ~ +70°C -40 ~ +85°C -40 ~ +105°C -40 ~ 125°C LVPECL 2.5000 450.0000 -20 ~ +70°C -40 ~ +85°C -40 ~ +105°C LVDS 2.3000 450.0000 -20 ~ +70°C -40 ~ +85°C -40 ~ +105°C -40 ~ +125°C HCSL 2.3000 450.0000 -20 ~ +70°C -40 ~ +85°C -40 ~ +105°C Operating Temperature -20 +70 °C See options Storage Temperature -55 +150 °C Overall Frequency Stability Note 4 -50 +50 ppm See options Supply Voltage (Vdd)Note 1 +2.25 +3.63 V Startup Time (tSU) Note 2 5.5 6 ms Enable Time (tEN) 350 ns OE Option 6 ms Power Down Option The Abracon AS VMPA series is a programmable MEMS oscillator, with a continuous operating power supply ranging from 2.25V to 3.6 3V. This series features low power consumption, a wide frequency range, exceptional phase noise, tight stabilities, and short lead times for industrial, consumer, and other applications. The ASVMPA series comes in a 7.0 x 5.0 mm compact package with CMOS, HCSL, LVDS, or LVPECL output logic.  Extended Operating Temperature at -40 to +125°C (LVDS and CMOS only)  MIL-STD-883 shock and vibration compliant  Durable QFN Plastic Compact Packaging  Tri-State or Power Down functions  PCIe Gen1-6 Compliant Output  Low RMS Jitter 650 fs (typ.)  REACH/RoHS II Compliant | MSL Level 1 Features Applications  Storage Area Networks (SATA, SAS, Fiber Channel)  Passive Optical Networks (EPON, 10G- EPON, GPON, 10G-PON)  Ethernet (1G, 10GBASE-T,/KR/LR/SR, FCoE)  PCI Express  Display port Key Electrical Specifications

Plastic SMD MEMS Clock Oscillator Revision: IR Initial Release 9/2/2025 Page 2 Disclaimer lign Check Inventory S lign Request Samples Note 1: VDD pin should be filtered with 0.1 μF capacitor. Note 2: tSU is time to 100 ppm stable output frequency after VDD is applied and outputs are enabled. Note 3: tDA: See the Output Waveforms and the Test Circuits sections for more information. Note 4: Includes frequency variations due to initial tolerance, temperature and power supply voltage. Note 5: Per year after first year Parameters Min. Typ. Max. Units Notes Disable Time (tDA) Note 3 25 ns Disable Current 2.5 5 µA Power Down Option 23 mA OE Option Tri-state Function (Standby/Disable) "1" (VIH≥0.75*Vdd) or Open: Oscillation "0" (VIL<0.25*Vdd): Hi Z V 1.5MΩ pull-up resistor embedded Aging -5.0 +5.0 ppm First year @ 25°C -1.0 +1.0 Note 5 Parameters Min. Typ. Max. Units Notes Supply Current (Idd) 27 mA CL= No Load, 100MHz Output Logic Level VOH 0.8*Vdd V IOH/IOL=±12mA VOL 0.2*Vdd V Rise Time Tr 1.2 ns CL=15pF 20% to 80% Fall Time Tf 1.1 ns Duty Cycle 45 55 % Integrated Phase Jitter (JPH) 0.65 psRMS 12kHz ~ 20MHz @ 100MHz Period Jitter (JPTP, pk-pk) 25 ps @100MHz Cycle-to-Cycle Jitter (JCC, Peak) 22 ps @100MHz Key Electrical Specifications - CMOS (VDD = 2.5V±10% or 3.3V±10%, T =-40 ~ +125°C) Key Electrical Specifications Cont. - CMOS, LVPECL, LVDS, and HCSL

Plastic SMD MEMS Clock Oscillator Revision: IR Initial Release 9/2/2025 Page 3 Disclaimer lign Check Inventory S lign Request Samples Parameters Min. Typ. Max. Units Notes Supply Current (Idd) 50 mA RL = 50Ω Output Logic Level VOH Vdd-1.145 V RL = 50Ω VOL Vdd-1.695 V Peak to Peak Output Swing (Vpp) 800 mV Single ended Rise Time Tr 200 250 ps RL=50Ω, 20% to 80% Fall Time Tf 250 300 Duty Cycle 48 52 % Differential Integrated Phase Jitter (JPH) 0.65 psRMS 12kHz ~ 20MHz, @ 156.25MHz Period Jitter RMS (JPER) 2.0 ps 10k cycles, @156.25MHz Period Jitter (JPTP, pk-pk) 20 ps 10k cycles, @156.25MHz Parameters Min. Typ. Max. Units Notes Supply Current (Idd) 32 mA RL = 100Ω Output Offset Voltage (VOS) 1.15 1.25 1.35 V RL = 100Ω differential Peak to Peak Output Swing (Vpp) 250 350 450 mV Single ended Rise Time Tr 120 170 220 ps RL=100Ω, 20% to 80% Fall Time Tf Duty Cycle 48 52 % Differential Integrated Phase Jitter (JPH) 0.65 psRMS 12kHz ~ 20MHz, @156.25MHz, T =-40 ~ +105°C 0.9 2kHz ~ 20MHz, @156.25MHz, T =-40 ~ +105°C Phase Jitter (JRMS-CC) 0.025 0.1 psRMS PCIe Gen 6.0, 64 GT/s Period Jitter RMS (JPER) 2.5 ps 10k cycles, @156.25MHz Period Jitter (JPTP, pk-pk) 20 10k cycles, @156.25MHz Period Jitter RMS (JPER) 3.0 T =-40 ~ +105°C, @156.25MHz Period Jitter (JPTP, pk-pk) 25 T =-40 ~ +105°C, @156.25MHz Key Electrical Specifications – LVPECL (VDD = 2.5V±10% or 3.3V±10%, T =-40 ~ +105°C) Key Electrical Specifications – LVDS (VDD = 2.5V±10% or 3.3V±10%, T =-40 ~ +105°C)

Plastic SMD MEMS Clock Oscillator Revision: IR Initial Release 9/2/2025 Page 4 Disclaimer lign Check Inventory S lign Request Samples Note 6: Jitter limits are established by Gen 1.1, Gen 2.1, and Gen 3.0 PCIe standards Parameters Min. Typ. Max. Units Notes Supply Current (Idd) 40 mA RL = 50Ω Output Logic Level VOH 0.64 V RL = 50Ω VOL 0.1 V Peak to Peak Output Swing (Vpp) 750 mV Single ended Rise Time Tr 200 260 400 ps RL=50Ω, 20% to 80% Fall Time Tf 250 370 500 Duty Cycle 48 52 % Differential Integrated Phase Jitter (JPH) 0.617 psRMS 12 kHz to 20 MHz, @100 MHz T = –40°C to +105°C 0.460 100 kHz to 20 MHz, @100 MHz T = –40°C to +105°C 0.212 1.875 MHz to 20 MHz, @100 MHz, T = –40°C to +105°C Phase Jitter TJ Note 6 3.42 86 psPP PCIe Gen 1.1, TJ = DJ +14.069 x RJ (BER 10–12) JRMS-CCHF Note 6 0.247 3.1 PSRMS PCIe Gen 2.1, 1.5 MHz to Nyquist JRMS-CCHF Note 6 0.08 3.0 PSRMS PCIe Gen 2.1, 10 kHz to 1.5 MHz JRMS-CC 0.107 1.0 PSRMS PCIe Gen 3.0 Note 6 0.107 0.30 PCIe Gen 4.0, 16 GT/s 0.043 0.12 PCIe Gen 5.0, 32 GT/s 0.054 0.1 PCIe Gen 6.0, 64 GT/s Period Jitter RMS (JPER) 2 ps T =-40 ~ +105°C, @100MHz Period Jitter (JPTP, pk-pk) 16 ps T =-40 ~ +105°C, @100MHz Key Electrical Specifications – HCSL (VDD = 2.5V±10% or 3.3V±10%, T =-40 ~ +105°C)

Plastic SMD MEMS Clock Oscillator Revision: IR Initial Release 9/2/2025 Page 5 Disclaimer lign Check Inventory S lign Request Samples Note: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational sections of this specification is not intended. Exposure to maximum rating conditions for extended periods may affect device reliability. The data sheet limits are not guaranteed if the device is operated beyond the recommended operating conditions. CMOS Test Circuit Item Min. Max. Units Supply voltage -0.3 +4.0 V Input voltage -0.3 Vdd+0.3 V Junction Temp. +150 °C Storage Temp. -55 +150 °C Soldering Temp. +260 °C ESD HBM MM CDM 4,000 400 1,500 V Absolute Maximum Ratings Recommended Test Circuit (Unless specified otherwise: T=25° C, VDD=3.3 V)

Plastic SMD MEMS Clock Oscillator Revision: IR Initial Release 9/2/2025 Page 6 Disclaimer lign Check Inventory S lign Request Samples LVPECL Test Circuit LVDS Test Circuit

Plastic SMD MEMS Clock Oscillator Revision: IR Initial Release 9/2/2025 Page 7 Disclaimer lign Check Inventory S lign Request Samples HCSL Test Circuit Phase Noise - CMOS (Unless specified otherwise: T=25° C, VDD=3.3 V, 125MHz)

Plastic SMD MEMS Clock Oscillator Revision: IR Initial Release 9/2/2025 Page 8 Disclaimer lign Check Inventory S lign Request Samples Phase Noise – LVDS, LVPECL, HCSL (Unless specified otherwise: T=25° C, VDD=3.3 V, 156.25MHz) Output Waveform (CMOS)

Plastic SMD MEMS Clock Oscillator Revision: IR Initial Release 9/2/2025 Page 9 Disclaimer lign Check Inventory S lign Request Samples Output Waveform (LVPECL, LVDS, and HCSL)

Plastic SMD MEMS Clock Oscillator Revision: IR Initial Release 9/2/2025 Page 10 Disclaimer lign Check Inventory S lign Request Samples ASVMPA - MHz - - - *LVDS and CMOS output only Tri- state (pin 1) Blank: OE Tri-state PD: Power Down Packaging Blank: Bulk T: Tape & Reel (1kpcs / reel) Frequency in MHz e.g. 14.3181 MHz (Maximum 4 digits after decimal) Overall Freq. stability Blank: ±50ppm R: ±25 ppm J: ±20 ppm Output Type. C; CMOS LP: LVPECL LV: LVDS HC: HCSL Operating Temp. Blank: -20°C ~ +70°C L: -40°C ~ +85°C X: -40°C ~ +105°C V*: -40°C ~ +125°C Options and Part Identification (left blank if standard)

Plastic SMD MEMS Clock Oscillator Revision: IR Initial Release 9/2/2025 Page 11 Disclaimer lign Check Inventory S lign Request Samples Dimensions: Inches[mm] Pin # Function

1 Tri-State or Power Down

3 GND

4 Output

5 NC (CMOS)

Output (LVPECL, LVDS, HCSL)

6 Vdd

Note: Recommended using an approximately 0.01µF bypass capacitor between PIN 6 and 3

Plastic SMD MEMS Clock Oscillator Revision: IR Initial Release 9/2/2025 Page 12 Disclaimer lign Check Inventory S lign Request Samples Table 1 SnPb Eutectic Process Classification Temperatures (Tc) Package Thickness Volume mm3 <350 Volume mm3 >350 <2.5 mm 235 °C 220 °C >2.5 mm 220 °C 220 °C Table 2 Pb-Free Process Classification Temperatures (Tc) Package Thickness Volume mm3 <350 Volume mm3 350-2000 Volume mm3 >2000 <1.6 mm 260 °C 260 °C 260 °C 1.6 mm - 2.5 mm 260 °C 250 °C 245 °C >2.5 mm 250 °C 245 °C 245 °C Profile Feature Sn-Pb Eutectic Assembly Pb-Free Assembly Preheat / soak Temperature minimum (Tsmin) 100°C 150°C Temperature maximum (Tsmax) 150°C 200°C Time (Tsmin to Tsmax) (ts) 60 - 120 sec. 60 - 120 sec. Average ramp-up rate (Tsmax to TP) 3°C/sec. max 3°C/sec. max Liquidous temperature (TL) 183°C 217°C Time at liquidous (tL) 60 - 150 sec. 60 - 150 sec. Peak package body temperature (TP)* see Table 1 see Table 2 Time (tp)** within 5°C of the specified classification temperature (TC) 20 sec. 30 sec. Ramp-down rate (Tp to Tsmax) 6°C/sec. max 6°C/sec. max Time 25°C to peak temperature 6 min. max 8 min. max Reflow cycles 2 max 2 max *Tolerance for peak profile temperature (TP) is defined as a supplier minimum and a user maximum. **Tolerance for time at peak profile temperature (tp) is defined as supplier minimum and a user maximum. Reflow Profile [JEDEC J-STD-020]

Plastic SMD MEMS Clock Oscillator Revision: IR Initial Release 9/2/2025 Page 13 Disclaimer lign Check Inventory S lign Request Samples Tape Specifications (mm) Width Ao Bo Do D1 (Min) E1 F Ko Width P1 P2 P0 T (Max) T1 (Max) T2 (Max) W (Max) *Note: Compliant to EIA-481 Dimension: mm Packaging T: 1,000pcs/reel

Plastic SMD MEMS Clock Oscillator Revision: IR Initial Release 9/2/2025 Page 14 Disclaimer lign Check Inventory S lign Request Samples Reel Specifications (mm) Width Qty/Reel A (Nom) B (Min) C (Min) D (Min) N (Min) *W1 *Note: Measured at Hub Dimension: mm