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Document overview

  • Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 12

Technical content

Features

  • 5 V Supply Monitor
  • Selectable Watchdog Period
  • Debounce Manual Push−button Reset Input
  • Precision Temperature−compensated V oltage Reference and Comparator
  • Power−up, Power−down and Brown Out Detection
  • 250 ms Minimum Reset Time
  • Active LOW Open Drain Reset Output and Active HIGH Push−pull Output
  • Selectable Trip Point Tolerance: 5% or 10%
  • Low−cost Surface Mount Packages: 8−pin/16−pin SO, 8−pin DIP and 8−pin Micro SO Packages
  • Wide Operating Temperature −40°C to +85°C (N Suffixed Devices)

Applications

  • Microprocessor Systems
  • Computers
  • Controllers
  • Portable Equipment
  • Intelligent Instruments
  • Automotive Systems http://onsemi.com PIN CONFIGURATIONS See detailed ordering and shipping information in the package dimensions section on page 12 of this data sheet.

ORDERING INFORMATION

PDIP−8 P SUFFIX CASE 646AA SOIC−8 S SUFFIX CASE 751BD PBRST TD TOL GND VCC ST RESET RESET ASM1232LP ASM1232LPS−2 ASM1232LPU DIP/SO/MicroSO (Top View) MICRO−8 U SUFFIX CASE 846AA SO (Top View) SOIC−16 S SUFFIX CASE 751BG ASM1232LPS NC VCC NC ST NC RESET NC RESET NC PBRST NC TD NC TOL NC GND

Table 1. PIN DESCRIPTION 1 2 PBRST Debounced manual pushbutton RESET input. for TD = Open, and tTD = 1200 ms for TD = VCC).

  1. If VCC falls below the reset voltage trip point.
  2. If ST is not strobed LOW before the timeout period set by TD expires.

6 11 RESET Active LOW reset output. (See RESET). 1,3,5,7,10,12,14,16 NC No internal connection. Table 2. ABSOLUTE MAXIMUM RATINGS

  1. Voltages are measured with respect to ground

Table 3. DC ELECTRICAL CHARACTERISTICS (Unless otherwise stated, 4.5 V ≤ VCC ≤ 5.5 V and over the operating

  1. PBRST is internally pulled HIGH to VCC through a nominal 40 k/C0087 resistor.
  2. RESET is an open drain output.
  3. RESET remains within 0.5 V of VCC on power−down until VCC falls below 2 V. RESET remains within 0.5 V of ground on power−down until
  4. Must not exceed the minimum watchdog time−out period (tTD). The watchdog circuit cannot be disabled. To avoid a reset, ST must be strobed.

ASM1232LP, ASM1232LPS http://onsemi.com PACKAGE DIMENSIONS Micro8/C0116/TSSOP8 3x3 CASE 846AA−01 ISSUE O SBM0.08 (0.003) A ST NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. 846A-01 OBSOLETE, NEW STANDARD 846A-02. b ePIN 1 ID 8 PL 0.038 (0.0015) −T− SEATING PLANE A A1 c L *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. SOLDERING FOOTPRINT* 8X 8X 6X /C0466mm inches/C0467SCALE 8:1 1.04 0.041 0.38 0.015 5.28 0.208 4.24 0.167 3.20 0.126 0.65 0.0256 DIM A MIN NOM MAX MIN MILLIMETERS INCHES A1 0.05 0.08 0.15 0.002 b 0.25 0.33 0.40 0.010 c 0.13 0.18 0.23 0.005 D 2.90 3.00 3.10 0.114 E 2.90 3.00 3.10 0.114 e 0.65 BSC L 0.40 0.55 0.70 0.016 −− 0.043 0.003 0.006 0.013 0.016 0.007 0.009 0.118 0.122 0.118 0.122

0.026 BSC

0.021 0.028 NOM MAX HE DD E

ASM1232LP, ASM1232LPS http://onsemi.com PACKAGE DIMENSIONS PDIP−8, 300 mils CASE 646AA−01 ISSUE A D A L eb E eB c TOP VIEW SIDE VIEW END VIEW PIN # 1 IDENTIFICATION Notes: (1) All dimensions are in millimeters. (2) Complies with JEDEC MS-001. SYMBOL MIN NOM MAX A b c D e L 0.38 2.92 0.36 6.10 1.14 0.20 9.02

2.54 BSC

3.30 5.33 4.95 0.56 7.11 1.78 0.36 10.16 eB 7.87 10.92 E 7.62 8.25 2.92 3.80 3.30 0.46 6.35 1.52 0.25 9.27 7.87

ASM1232LP, ASM1232LPS http://onsemi.com PACKAGE DIMENSIONS SOIC 8, 150 mils CASE 751BD−01 ISSUE O E1 E A h θ L c e b D PIN # 1 IDENTIFICATION TOP VIEW SIDE VIEW END VIEW Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC MS-012. SYMBOL MIN NOM MAX θ A b c D E e h 0º 8º 0.10 0.33 0.19 0.25 4.80 5.80 3.80

1.27 BSC

1.75 0.25 0.51 0.25 0.50 5.00 6.20 4.00 L 0.40 1.27 1.35

ASM1232LP, ASM1232LPS http://onsemi.com PACKAGE DIMENSIONS SOIC−16, 150 mils CASE 751BG−01 ISSUE O TOP VIEW PIN#1 IDENTIFICATION E D A e b L h c SIDE VIEW END VIEW Notes: (1) All dimensions are in millimeters. Angles in degrees. (2) Complies with JEDEC MS-012. /C0113 SYMBOL MIN NOM MAX θ A b c D E e h 0º 8º 0.10 0.33 0.19 0.25 9.80 5.80 3.80 1.75 0.25 0.51 0.25 0.50 10.00 6.20 4.00 L 0.40 1.27 1.35 9.90 6.00 3.90

Table 4. ORDERING INFORMATION

  1. For parts to be packed in Tape and Reel, add “−T” at the end of the part number.

arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.