ASL5XXXYHZ NXP | Alldatasheet
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Technical content
Matrix LED Controller (MLC) Rev. 2.1 — 5 February 2019 Product data sheet
1 General description
The ASL5xxxyHz family is a fully featured and flexible Matrix LED Controller (MLC). It provides a cost effective design solution, specifically targeting advanced automotive exterior lighting applications. The family consists of part numbers with different maximum currents and different driving modes, Smart and direct PWM. Smart PWM part numbers determine PWM dimming duty cycle from information stored inside the MLC in the form of dimming polynomial curve coefficients. These coefficients are programmable by the customer according to the dimming profile they would like to see. The MLC uses these polynomial coefficients to calculate the PWM duty cycle to 12- bit resolution. The MLC also provides the capability to increase the speed of the PWM dimming curve dynamically or sequence several PWM dimming curves together. It is possible to store polynomials for up to eight PWM dimming curves. By storing these polynomial coefficients internally, it is not necessary for the microcontroller to send updated PWM dimming information to each LED switch continuously. Instead, the microcontroller selects the PWM curve and LED to which it must be applied. Therefore, the PWM dimming information from the microcontroller is reduced, which reduces the volume of data transfer from the microcontroller to the MLC. The MLC also provides the functionality to correct for LED brightness variations. This feature is especially useful to ensure a homogenous light output from LEDs that have luminance variations with the same LED current. The MLC has many diagnostic features, including:
- Direct NTC feedback for monitoring the LED temperature
- Direct identification resistor input for PCB characterization
- Single LED open/short detection and protection
- Internal IC junction temperature monitoring
- Power-on-Reset (POR) monitoring; mandatory for off-board configuration and following safety requirements
- Power OK bit (POK) to ensure that the complete MLC is working as expected
- External components (NTC, ID resistor, charge pump capacitor) monitoring and fail detection
- Full communication diagnosis, including flagging illegal actions
- Possibility to clear Open Circuit (OC) and Short Circuit (SC) flags and reset the internal mosfets dynamically and without a need of a power-on-reset All this diagnostic information is available to the microcontroller via the MLC interface. A microcontroller controls the MLC through a high-speed serial CAN interface. Through this interface, the microcontroller can control up to 32 MLCs, enabling control of up to 384 LEDs or segments. The MLC has an internal 200 MHz oscillator that avoids the need of an external quartz (reducing system cost and providing better EMC behavior) for synchronization and clock
NXP Semiconductors ASL5xxxyHz Matrix LED Controller (MLC) Product data sheet Rev. 2.1 — 5 February 2019 generation. All the internal clocks are synchronized with the internal oscillator and the trimming is done via the CAN message (CAN-ID). This process allows for a very accurate clock (accuracy < 0.25 %). The MLC can be mounted close to the LEDs on an IMS PCB. Because the pinning has been optimized to avoid any crossing tracks, a single-layer PCB can be used. The ASL5xxxyHz family is available in automotive-qualified, thermally enhanced, 36-pin HVQFN and 48-pin HLQFP packages. The device is designed to meet the stringent requirements of automotive applications, being fully AEC Q100 grade 1 and AEC Q006 qualified. It operates over the –40 °C to +125 °C ambient temperature range. The Matrix LED Controller (MLC) also offers the possibility to be driven in direct PWM mode. In this mode, the microcontroller needs to update the PWM value in every channel with a certain cycle, determined by the system specifications. These part numbers, ASL5115yHz and ASL5108yHz, also offer 12-bit resolution to ensure a smooth dimming performance to avoid glitches in the output light. The MLC family also offers two different maximum currents per switch. Part numbers ASL5008yHz and ASL5108yHz offer a maximum current per switch of 0.8 A. Part numbers ASL5015yHz and ASL5115yHz offer a maximum current per switch of 1.5 A. All part numbers are pin-to-pin compatible, which offers a completely scalable and flexible system solution that can be adapted to any system requirements.
NXP Semiconductors ASL5xxxyHz Matrix LED Controller (MLC) Product data sheet Rev. 2.1 — 5 February 2019
2 Features
- Automotive grade product that is AEC-Q100 grade 1 and AEC-Q006 qualified
- Operating ambient temperature range of –40 °C to +125 °C
- Maximum junction temperature of 175 °C
- Operating input voltage 5 V ± 0.5 V. Vcc pin.
- Able to drive up to 12 LEDs / segments, with a string voltage range up to 57 V
- Able to drive multiple LEDs per switch (MTP configurable)
- 12 channels, arranged in 4 configurable blocks of 3 switches per block
- Each block of three can fully float up to 60 V with respect to ground and can be paralleled with any other block
- Each switch can control up to 1.5 A LED current in the ASL5x15yHz family and up to
0.8 A in the ASL5x08yHz family
- 100 mΩ (Rdson) switches for 1.5 A part numbers and 200 mΩ for 0.8 A part numbers
- PWM dimming with 12-bit resolution and built-in phase shifting for minimum losses
- Internal PWM duty cycle generator with incremental calculation for glitch-free operation in the ASL50xxyHz family—Smart
- On-chip storage of preprogrammed PWM curves to reduce data traffic in ASL50xxyHz family—Smart
- LED brightness variation correction functionality
- On-chip 200 MHz oscillator, avoiding need for external quartz
- CAN-based serial interface with optional external CAN physical layer
- Broadcast messages to reduce system latency and bus load
- Low Electromagnetic Emission (EME) and high Electromagnetic Immunity (EMI)
- Individual LED open and LED short-fault monitoring, with bypass feature on open condition
- NTC input with 6-bit resolution for LED temperature monitoring; directly connected to MLC
- Identification resistor input
- MLC can be used in a configuration of up to 32 ICs in a single CAN network
- Small package outline, leadless HVQFN package with improved Automated Optical Inspection (AOI) capability and leaded HLQFP package
- Low operational current consumption
- Sleep and wake-up modes available
- Standby current consumption < 1.35 mA
- Input under voltage protection
- 9-bit resolution IC junction temperature feedback via CAN interface
- Internally programmed Limp Home Mode (LHM) in case of communication failure
- Built-in charge pump failure operation mode (CPFSO)
3 Applications
- Automotive lighting – Matrix/pixel high beam (ADB / Glare-Free High Beam - GFHB) – Matrix/pixel low beam (ADB) – Dynamic turning indicator – Welcoming scenarios – Dynamic rear lights
4 Orderable parts
Table 1. Orderable part variations
5 Application diagram
Figure 1. Application diagram for the ASL5xxxyHz family (OFF board configuration)
6 Block diagram
Figure 2. Block diagram
7 Pinning information
7.1 Pinning – HVQFN36 package
Figure 3. Pin configuration for HVQFN36
7.2 Pin description – HVQFN36 package
Table 2. Pin description
NXP Semiconductors ASL5xxxyHz Matrix LED Controller (MLC) Product data sheet Rev. 2.1 — 5 February 2019 Symbol Pin Description A0 19 Address bit 0 A1 20 Address bit 1 A2 21 Address bit 2 A3 22 Address bit 3 A4 23 Address bit 4 ID 24 Connection for the identification resistor GND 25 Ground NTC 26 Connection to the NTC Internally connected 27 ICP (Internally Connected Pin) – Connect to ground SW7 28 Drain of switch 6 SW6 29 Source of switch 6 and drain of switch 5 SW5 30 Source of switch 5 and drain of switch 4 SW4 31 Source of switch 4 NC 32 Not Connected SW3 33 Drain of switch 3 SW2 34 Source of switch 3 and drain of switch 2 SW1 35 Source of switch 2 and drain of switch 1 SW0 36 Source of switch 1 EXP 37 Exposed pad – Connect it to ground NC pins are inserted between two blocks of switches to prevent high voltages between two adjacent pins. An NC pin is also inserted between VMAX and TXD pins. NC pins must float. The exposed center pad of the package is internally connected to ground. For enhanced thermal and electrical performance, it is highly recommended to connect the exposed center pad the the board's ground. Both RXD pins and both TXD pins are internally connected to facilitate single-layer PCB layout without jumpers.
7.3 Pinning – HLQFP48 package
Figure 4. Pin configuration for LQFP48
7.4 Pin description – HLQFP48 package
Table 3. Pin description
NXP Semiconductors ASL5xxxyHz Matrix LED Controller (MLC) Product data sheet Rev. 2.1 — 5 February 2019 Symbol Pin Description SW12 18 Source of switch 10 NC 19 Not connected SW11 20 Drain of switch 9 SW10 21 Source of switch 9 and drain of switch 8 SW9 22 Source of switch 8 and drain of switch 7 SW8 23 Source of switch 7 NC 24 Not connected NC 25 Not connected A0 26 Address bit 0 A1 27 Address bit 1 A2 28 Address bit 2 A3 29 Address bit 3 A4 30 Address bit 4 NC 31 Not connected BIN 32 Connection for the identification resistor GND 33 Ground NTC 34 Connection to the NTC ICP 35 ICP (Internally Connected Pin) – Connect it to ground NC 36 Not connected NC 37 Not connected SW7 38 Drain of switch 6 SW6 39 Source of switch 6 and Drain of switch 5 SW5 40 Source of switch 5 and Drain of switch 4 SW4 41 Source of switch 4 SW4 42 Source of switch 4 NC 43 Not connected SW3 44 Drain of switch 3 SW2 45 Source of switch 3 and Drain of switch 2 SW1 46 Source of switch 2 and Drain of switch 1 SW0 47 Source of switch 1 NC 48 Not connected EXP 49 Exposed pad - Connect it to ground NC pins are inserted between two blocks of switches to prevent high voltages between two adjacent pins. Two NC pins are also inserted between VMAX and TXD pins. The NC pins must float, only pin 8 can be used for ground routing, since pin 9 (NC) still keep the isolation between ground and high voltage. The exposed center pad must be connected to ground during layout routing.
NXP Semiconductors ASL5xxxyHz Matrix LED Controller (MLC) Product data sheet Rev. 2.1 — 5 February 2019 Both RXD pins and both TXD pins are internally connected to facilitate single-layer PCB layout without jumpers.
8 Functional description
8.1 Integrated switches for single or multiple LEDs dimming
The floating blocks make it possible for the ASL5xxxyHz family (Matrix LED Controller, MLC) to drive 12 single LEDs or multiple LEDs per switch and multiple strings with different currents and string voltages. The 12 independent switches are separated in 4 floating blocks of 3 switches each. Every block can float at 60 V with respect to ground and can be driven separately or as a unique system. Figure 5 and Figure 6 show possible configurations.
Figure 5. Single LED driving configuration application diagram
Figure 6. Multiple strings with segment driving configuration application diagram Polarity must be respected in the internal MOSFET.
8.2 LED current capability and power dissipation
serial configuration, and up to 6 A in parallel configuration for ASL5x15yHzpart numbers. configuration, and up to 3.2 A when paralleling all switches' blocks.
8.3 Internal PWM dimming generator and phase shifting
turn on at the same instant and use the same PWM information. shifting between two consecutive switches of different blocks is 512 clocks. different phase shifting sequences. Figure 8. Blocks of switches can be assigned to phase shifting sequences The MTP configuration bits (2 bits) are showed in the bottom side of the blocks. phase shifting sequence (same 2 bits value). and reduces the voltage ripple on the LED string. "Nonvolatile Multitime Programmable Memory (MTP)".
8.4 Programming and execution of PWM dimming – ASL50xxyHz
programming is done once at the end of the customer production line.
Figure 9. Example PWM Polynomial curves (Default curves in MTP) Note: A system emulation tool is available and can reproduce any possible scenario. allows a very smooth LED dimming without any undesirable light glitch. internal PWM generator (in the Smart version, ASL50xxyHz). feature is only available in the Smart versions, ASL50xxyHz. to be the same as the fade-out ones. the PWM duty cycle to 100 % immediately, such as in the case of high-beam flashing. This adjustment is possible by changing the shift value.
8.4.1 Channel programming registers map
Table 4. Curve selection, auto-bit, shift value, start/stop positions and delay factor (Read/Write)
SHIFTx: These three bits determine the shift value used in the internal PWM generator. selected (2), the fastest curve is performed. Table 5 shows the different possible values. Table 5. SHIFT values new configuration can be followed at the end of the current sequence. sequence is done and another trigger is set (START command or AUTO bit). fade sequence. With three bits, eight curves can be selected. step from 0 to 255 (8 bits resolution). step from 0 to 255 (8 bits resolution). coefficients, the curve behavior could change depending on the coefficient values.
cycle. These values are accessible from the register 42h to 59h, as shown in Table 6. This accessibility ensures maximum control of the system and LED board feedback. Table 6. PWM-Feedback registers (only Read registers) Table 7. Immediate OFF commands. Set duty cycle to zero (Read/Write)
Table 8. Start commands for each channel (Read/Write) should be sent after all the channels have been programmed with the desired values. previous START command must be performed from the moment the MLC startup.
8.5 Delay coefficient – ASL50xxyHz
curves can be used in applications such as dynamic turn indicator or welcome scenarios.
8.6 Diagnostics
8.6.1 Direct NTC input
can read the 6-bit digital value of this voltage drop in register 39h.
Figure 10. Typical NTC resistance vs. temperature in the range 70 °C to 130 °C
8.6.2 Direct Identification resistor input
diagnosis, the register 3Ah is included in the 8 bytes of diagnosis answer. ADC. The ID resistors' values are not overlapping in ranges in Table 9. Table 9. Possible identification resistors for nonoverlapping
8.6.3 LED fault detection
system is in Limp Home mode. immediately detected when the switch passes from low ohmic to high ohmic state.
low ohmic to a high ohmic state. string can continue working and just the affected LED is bypassed. still present or not. If the fail is still present, then the MLC will flag it again.
8.6.4 Internal junction temperature warnings
command 13 for selective MLC or command 46 for broadcast trigger. Table 10. Junction temperature warning bits (Read) current. The OTW measurement has a ±10 % accuracy.
8.6.5 Undervoltage detection and protection
allows the communication again and a power on reset is not required. A full system diagnosis should be run after an undervoltage condition.
8.6.6 Diagnosis registers map
8.6.6.1 Register 34h - Status register
Register 34h has read and write rights. message. It depends on the CAN frame Extended-ID command.
Table 11. CLEAR - CLEAR control register (address 34h) bit allocation Table 12. CLEAR - CLEAR control register (address 34h) bit description
7 POR Power-on-reset (POR)
because after a POR, the MLC returns to the default values.
6 ILLEGAL _COMMAND Illegal command
0 — The MLC received a valid command. configuration or a command that is restricted to a different part number. The microcontroller writes a 1 in this location to clear the flag.
5 MTP_LOCK MTP lock
0 — The MTP is available to be read/write. consecutive times. The MTP is not accessible by the micro.
4 REG_ILLEGAL_ACCESS Register illegal access
0 — The selected register is accessible by the microcontroller. 1 — The microcontroller tries to write/read in an invalid register. clear the flag. The flag is not stopping the communication.
3 MTP_ILLEGAL_ACCESS MTP illegal access
1 — The microcontroller is trying to read/write in a restricted register. The microcontroller should write a 1 in this location to clear the flag.
2 MTP_ACCESS_STATUS MTP access status
due to an internal MTP function. The microcontroller must repeat the action.
1 CLR_OC Clear open-circuit detection
0 — Always 0 when the microcontroller reads it. 1 — Write a 1 in this location to clear all the OC flags and restart the channels.
0 CLR_SC Clear short-circuit detection
0 — Always 0 when the microcontroller reads it. 1 — A 1 in this location to clear all the SC flags and restart the channels.
8.6.6.2 Read diagnostic bits, from MLC to microcontroller
Table 13. Open Circuit and Short Circuit registers (Read only) sequence is to turn ON the MLC IC first and wait until the POK bit is set to 1. Table 14. NTC - NTC control register (address 39h) bit allocation Table 15. NTC - NTC control register (address 39h) bit description 7 CPFAIL Used for the internal charge pump circuit. drive the gates of the switches, and the dimming function is not available.
6 to 1 NTC NTC (voltage drop in the NTC resistance).
0 NTCFAIL NTC fail
Table 16. ID - ID control register (address 3Ah) bit allocation Table 17. ID - ID control register (address 3Ah) bit description
7 OTW_1 Overtemperature Warning 1
6 OTW_2 Overtemperature Warning 2
5 POK MLC IC check
4 LHM_STATUS Limp Home mode status
1 — The device is in Limp Home mode.
resistors to characterize the board or LEDs used with the MLC IC.
0 ID-FAIL Identification resistor fail
0 — No open or short condition is detected in the ID pin. 1 — An open or short condition is detected in the ID pin. Table 18. Internal Status - Internal status control register (address 3Bh) bit allocation Table 19. Internal Status - Internal status control register (address 3Bh) bit description
7 TXD_BUFFER_
overflowed, the MLC will start overwriting the content of the last position.
8.7 Internal oscillator 200 MHz for digital blocks
200 MHz oscillator and an adaptive prescaler gives the 10 MHz needed for the serial
calibrate the prescaler. Therefore, the CAN clock has an accuracy of less than 0.25 %. MLC system to have a superior EMC behavior.
8.8 Charge Pump
even when they are controlling different LED strings. selections are described in Table 20. Table 20. External charge pump capacitor selection can affect the IC startup time and may produce a CPFAIL status.
8.9 Charge pump fail-safe operation mode (CPFSO)
the maximum operability as possible.
- Top switch of the top block, in case of driving LED segment.
- First two switches of the top block, in case of driving single LED per switch. The charge pump fail-safe operation mode starts when the MLC detects a problem in the charge pump. Depending on the open circuit threshold programmed in the MTP, it opens (high ohmic state) the first switch of the top block (OC = 1) or the first two switches of the top block (OC = 0).
Table 21. OC threshold selection and CPFSx selection in MTP switch of the selected blocks. the rest of switches with the programmed PWM. respecting the LHM configuration programmed in the MTP for the rest of the switches.
8.10 Matrix LED controller interface and configuration
family. If these versions are required, please contact NXP Semiconductors. microcontroller has full control via the bus interface. No external clock is required for the oversampling, due to the on-chip 200 MHz oscillator.
- When the microcontroller is located close to the MLC and on the same PCB, there can be a direct connection using the TX and RX lines. No physical layer is needed.
- When the microcontroller is on a separate board or otherwise far away (> 10 cm) from the MLC, two CAN physical layer transceivers are needed. The physical layer will guarantee a robust and reliable communication over a long distance. In both configurations, the clock signal, generated by the internal oscillator, is divided by an adaptive prescaler to calibrate the clock to the incoming data. This process is to ensure a common communication speed.
NXP Semiconductors ASL5xxxyHz Matrix LED Controller (MLC) Product data sheet Rev. 2.1 — 5 February 2019 Synchronization between MLCs is therefore done through CAN communication. There is no need for a separate sync signal, which can compromise EMI performance and board layout. The communications protocol is byte-oriented. Because up to 32 devices can be connected together, five bits are sufficient to address the MLC device. Extended ID is used for addressing the device and differentiate between oriented or broadcast message. The Standard ID includes the preamble to synchronize all devices in the bus and ensure a CAN clock accuracy of less than 0.25 %.
8.11 External IC addressing
To make logistics easier, the MLC can be addressed externally with specific hardware configuration of pins from A0 to A4. Five pins are available to address the MLC externally. Therefore, the system can connect up to 32 MLCs. The same physical layer, in case of an off-board configuration, can control all of these MLCs. All these pins have an internal pull-up resistor of 60 kΩ. Thus, if a logic 1 is needed, the pin should remain floating. If a logic 0 is needed, the pin should be connected to ground.
8.12 Protection against missing VCC
When VCC is missing, the MLC is off and all switches remain open. But when VCC is present and the device is working properly, it sets a bit in the diagnostics register that the microcontroller can read (POK). The microcontroller should only enable the LED driver when it is able to read this bit.
8.13 LED brightness calibration factor
The LED brightness calibration factor can be programmed and read out from the MTP of the MLC by the microcontroller. This capability allows the customer to correct for any differences in the luminance of LEDs, as a result of LED production spread, automatically inside the MLC. The LED brightness calibration factor has a 5-bit resolution (from 0 to 31); and for that reason, the brightness reduction can be from 0 % to 24.22 %1. With this factor, the microcontroller does not need to adapt the PWM duty cycle for the brightness variation, because it is calculated inside the MLC. Therefore, when the microcontroller associates a prestored dimming curve that delivers 100 % duty cycle to a channel, and this channel has a brightness reduction associated to it, then the LED brightness cannot be 100 %, but reduced by the brightness calibration factor. The brightness reduction factor is applicable to any PWM duty cycle value and is not a fixed value but a percentage. Two examples are shown below: LED brightness calibration factor for both examples = 20 (10100 in the MTP)
- Example 1 – The PWM duty cycle value in the curve is 100 % – Output brightness = 1 * (1 – (20/128)) = 0.84 = 84 %
- Example 2 – The PWM duty cycle value in the curve is 50 % 1 The factor division inside of the MLC is by 128.
information about the MTP selectable values.
8.14 Limp Home mode operation
Table 22. LHM - Limp Home mode control register (address 3Ch) bit allocation Table 23. LHM - Limp Home mode control register (address 3Ch) bit description 7 BYPASS_BINNING Bypass binning.
- Bypass the calibration factor during Camera calibration
- Measure single LED brightness during manufacturing process Note: This bit is not related to the Limp Home Mode configuration of triggering. 6 to 4 LHM_EXIT Limp Home mode deactivation sequence and LHM timeout refresh.[1] 001 — Deactivation sequence, step 1 010 — Deactivation sequence, step 2 100 — Deactivation sequence, step 3 111 — LHM timeout refresh 3 to 1 LHM_TIMEOUT Timeout setting for activation of Limp Home mode.[2] 000 — 4.5 ms, setting 1 001 — 9 ms, setting 2 010 — 18 ms, setting 3 011 — 36 ms, setting 4 100 — 72.1 ms, setting 5 101 — 144.2 ms, setting 6 110 — 288.4 ms, setting 7 111 — 576.7 ms, setting 8
NXP Semiconductors ASL5xxxyHz Matrix LED Controller (MLC) Product data sheet Rev. 2.1 — 5 February 2019 Bit Symbol Description 0 MTP_CFG MTP configuration. 0 — MLC normal operation 1 — MLC in MTP configuration mode Note: To read or write the MTP, the microcontroller must enter MTP configuration mode. [1] When refreshing the timeout timer with 111 in bits [6:4], the Limp Home mode timeout setting is written as well in bits [3:1] [2] When changing the Limp Home mode timeout setting, the LHM_EXIT bits should be set to “111” to refresh the timeout timer After MTP configuration, the limp home settings are permanently stored. Once the MLC detects a communication failure event (Limp Home mode watch dog timer runs out), the device turns the switches ON or OFF, depending on the Limp Home mode configuration stored in the MTP. In case the system recovers from the error, Limp Home mode can be left via the exit Limp Home mode sequence. With the completion of the exit sequence, the device operates in normal conditions and the configuration registers are open for write access again. The MLC keeps the LHM configuration in the output until the microcontroller starts another sequence. Limp Home and normal operation modes offer the same diagnosis behavior. This behavior includes the undervoltage protection as well as the failure behavior (open and short-circuit detection).
8.14.1 Limp Home mode activation
If no write to the Limp Home mode exit bits (register 3Ch, bits 6:4) with data 111 is executed for the timeout time as defined in the Limp Home mode control register, a Limp Home mode is automatically activated. During start-up, the MLC is preconfigured to the maximum allowed watchdog timeout possible (576.7 ms). If this value wants to be changed, the user must set a new watchdog timeout during the configuration of the register. If the microcontroller does not send an LHM_Refresh command before 576.7 ms after the startup, then the MLC automatically enters in Limp Home mode. Before entering MTP configuration mode, refresh the watchdog timeout. During the MTP configuration, the watchdog is stopped and the refreshing action is not necessary during this time.
8.14.2 Limp Home mode operation
Once the system has entered Limp Home mode, the MLC switches to the configuration as defined in the MTP memory. See Section 14 "Nonvolatile Multitime Programmable Memory (MTP)" for more information about the Limp Home mode configuration. During Limp Home mode, operation of the CAN interface remains functional, but only the Limp Home mode control register can be written. The other registers offer only read access.
8.14.3 Limp Home mode deactivation
To deactivate Limp Home mode, a dedicated Limp Home mode deactivation sequence is written to the Limp Home mode control register.
Table 24. Limp Home mode deactivation sequence This sequence could be applied to any single IC or as a broadcast message. CMD 3 = 000011, target MLC's LHM_Exit [6:4] bits with 3 bytes of data in the data field. Only one CAN message is needed to exit the LHM status. The order in Table 25 shows from byte 0 to byte 2 in the CAN message data field. Table 25. Limp Home mode exit sequence messages Command 3 is used for selective LHM exit and command 38 for broadcast LHM exit. Once the deactivation sequence is completed, the MLC is immediately fully operational. LEDs will follow LHM configuration until the microcontroller starts a new sequence.
8.15 Communication interface
Register map" and Section 11.1 "ASL51xxSHy Register MAP". between the transceiver and the different MLC ICs. not allow current higher than 4 mA in the TXD and RXD pins.
dummy clock trimming message is not needed any more. message collisions, which respects ISO CAN rules.
8.16 Application protocol
field for synchronization as shown in Figure 11. Figure 11. CAN Ext-ID frame Table 26. Standard-ID and the synchronization sequence Table 27. Extended-ID format with the rest of the vehicle.
9 CAN commands
Table 28. CAN and CAN-FD commands
0 Selective Consecutive
1 Selective Selective
2 Invalid command
3 Selective LHM exit All All 3 3 NA
4 Selective MLC channel
5 Selective MLC channel
6 Selective LHM refresh All All 1 1 NA
7 Selective Dummy
8 Selective Write direct
9 Selective Write direct
10 Selective Write direct
11 Invalid command
12 Broadcast
13 Selective Diagnosis
14 Selective MTP write All All 4 4 LHM mode || MTP_Locked || Invalid
15 Invalid command
16 Selective Consecutive
17 Selective Selective
18 Selective Diagnosis
19 Selective Consecutive
20 Selective Selective
21 Selective Read smart
NXP Semiconductors ASL5xxxyHz Matrix LED Controller (MLC) Product data sheet Rev. 2.1 — 5 February 2019 Command CMD[10:5] Type Description PWM Mode (Smart / Direct) CAN/CAN -FD CAN Valid DLC CAN-FD Valid DLC Other Invalid conditions
22 Invalid command
23 Invalid command
24 Invalid command
25 Invalid command
26 Invalid command
27 Invalid command
28 Invalid command
29 Invalid command
30 Selective MTP read All All 2 2 LHM mode || MTP_Locked || Invalid
31 Invalid command
32 Broadcast MLC channel
33 Broadcast MLC channel
34 Broadcast Dummy
35 Broadcast POK register
36 Broadcast POR register
37 Broadcast LHM refresh All All 1 1 NA
38 Broadcast LHM exit All All 3 3 NA
39 Broadcast Clear all OC/
40 Broadcast Diagnosis
41 Broadcast Go to sleep All All 0 0 LHM mode || Partial networking
42 Broadcast Partial sleep All All 4 4 LHM mode || partial networking
43 Broadcast Partial wake All All 4 4 LHM mode || partial networking
disabled || Not in Sleep mode
44 Broadcast Write all PWM
Direct CAN-FD NA 12 LHM mode
45 Broadcast Read smart
46 Broadcast Diagnosis
47 Invalid command
48 Invalid command
49 Invalid command
50 Invalid command
51 Invalid command
52 Invalid command
53 Invalid command
54 Invalid command
55 Invalid command
56 Invalid command
57 Invalid command
58 Invalid command
59 Invalid command
60 Invalid command
61 Invalid command
62 Invalid command
63 Broadcast Junction
LHM state is also not a valid scenario. Table 29. Number of Register fitting DLC (CAN - FD)
0 Invalid Invalid Invalid Invalid
1 Invalid Invalid Invalid Invalid
2 Invalid Invalid ≤ 64 1
For more information regarding CAN commands, refer to the application notes.
Table 30. Standard–ID format in a response frame this time, the microcontroller always wins the arbitration phase in the second bit.
10 ASL50xxyHz Register map
Table 31. ASL50xxyHz Register map
0 CURVID1 SH1[7:5] AUTO1 NOW1 CURVEID1[2:0] 00000000
1 STARTPOS1 STARTPOS1[7:0] 00000000
2 STOPPOS1 STOPPOS1[7:0] 11111111
3 DELAY1 DELAY1[7:0] 00000000
4 CURVID2 SH2[7:5] AUTO2 NOW2 CURVEID2[2:0] 00000000
5 STARTPOS2 STARTPOS2[7:0] 00000000
6 STOPPOS2 STOPPOS2[7:0] 11111111
7 DELAY2 DELAY2[7:0] 00000000
8 CURVID3 SH3[7:5] AUTO3 NOW3 CURVEID3[2:0] 00000000
9 STARTPOS3 STARTPOS3[7:0] 00000000
10 CURVID5 SH5[7:5] AUTO5 NOW5 CURVEID5[2:0] 00000000
11 STARTPOS5 STARTPOS5[7:0] 00000000
12 STOPPOS5 STOPPOS5[7:0] 11111111
13 DELAY5 DELAY5[7:0] 00000000
14 CURVID6 SH6[7:5] AUTO6 NOW6 CURVEID6[2:0] 00000000
15 STARTPOS6 STARTPOS6[7:0] 00000000
16 STOPPOS6 STOPPOS6[7:0] 11111111
17 DELAY6 DELAY6[7:0] 00000000
18 CURVID7 SH7[7:5] AUTO7 NOW7 CURVEID7[2:0] 00000000
19 STARTPOS7 STARTPOS7[7:0] 00000000
20 CURVID9 SH9[7:5] AUTO9 NOW9 CURVEID9[2:0] 00000000
21 STARTPOS9 STARTPOS9[7:0] 00000000
22 STOPPOS9 STOPPOS9[7:0] 11111111
23 DELAY9 DELAY9[7:0] 00000000
24 CURVID10 SH10[7:5] AUTO10 NOW10 CURVEID10[2:0] 00000000
25 STARTPOS10 STARTPOS10[7:0] 00000000
26 STOPPOS10 STOPPOS10[7:0] 11111111
27 DELAY10 DELAY10[7:0] 00000000
28 CURVID1 SH11[7:5] AUTO11 NOW11 CURVEID11[2:0] 00000000
29 STARTPOS11 STARTPOS11[7:0] 00000000
NXP Semiconductors ASL5xxxyHz Matrix LED Controller (MLC) Product data sheet Rev. 2.1 — 5 February 2019 Address Register D7 D6 D5 D4 D3 D2 D1 D0 Reset 2B DELAY11 DELAY11[7:0] 00000000 2C CURVID12 SH12[7:5] AUTO12 NOW12 CURVEID12[2:0] 00000000 2D STARTPOS12 STARTPOS12[7:0] 00000000 2E STOPPOS12 STOPPOS12[7:0] 11111111 2F DELAY12 DELAY12[7:0] 00000000
30 IMMOFF 1 IMMOFF8 IMMOFF7 IMMOFF6 IMMOFF5 IMMOFF4 IMMOFF3 IMMOFF2 IMMOFF1 00000000
31 IMMOFF 2 unused IMMOFF12 IMMOFF11 IMMOFF10 IMMOFF9 00000000
32 START 1 CH8 CH7 CH6 CH5 CH4 CH3 CH2 CH1 00000000
33 START 2 unused CH12 CH11 CH10 CH9 00000000
34 CLEAR POR Illegal_
MTP_ Locked REG_ ILLEGAL_ ACCESS MTP_ ILLEGAL_ ACCESS MTP_ ACCESS_ STATUS CLR_OC CLR_SC 00000000
35 READ_OC1 OC8 OC7 OC6 OC5 OC4 OC3 OC2 OC1 00000000
36 READ_OC2 unused OC12 OC11 OC10 OC9 00000000
37 READ_SC1 SC8 SC7 SC6 SC5 SC4 SC3 SC2 SC1 00000000
38 READ_SC2 unused SC12 SC11 SC10 SC9 00000000
39 NTC CPFAIL NTC[6:1] NTCFAIL 00000000
3A ID OTW_1 OTW_2 POK LHM_ STATUS ID[3:1] ID-FAIL 00000000 3B Internal_Status TXD_ Buffer_Full unused 00000000 3C LHM Bypass_ binning LHM_EXIT[6:4] LHM_TIMEOUT[3:1] MTP_CFG 00000000 3D MTP Write Control1 unused MTP Register Adress [6:0] 00000000 3E MTP Write D1 MTP Write Data D1 [7:0] 00000000 3F MTP Write D2 MTP Write Data D2 [7:0] 00000000
40 MTP Read D1 MTP Read Data D1 [7:0] 00000000
41 MTP Read D2 MTP Read Data D2 [7:0] 00000000
42 ReadCH1-LB PWM[7:0] 00000000
43 ReadCH1-MB unused PWM[11:8] 00000000
44 ReadCH2-LB PWM[7:0] 00000000
45 ReadCH2-MB unused PWM[11:8] 00000000
46 ReadCH3-LB PWM[7:0] 00000000
47 ReadCH3-MB unused PWM[11:8] 00000000
48 ReadCH4-LB PWM[7:0] 00000000
49 ReadCH4-MB unused PWM[11:8] 00000000
4A ReadCH5-LB PWM[7:0] 00000000 4B ReadCH5-MB unused PWM[11:8] 00000000 4C ReadCH6-LB PWM[7:0] 00000000 4D ReadCH6-MB unused PWM[11:8] 00000000 4E ReadCH7-LB PWM[7:0] 00000000 4F ReadCH7-MB unused PWM[11:8] 00000000
50 ReadCH8-LB PWM[7:0] 00000000
51 ReadCH8-MB unused PWM[11:8] 00000000
52 ReadCH9-LB PWM[7:0] 00000000
53 ReadCH9-MB unused PWM[11:8] 00000000
54 ReadCH10-LB PWM[7:0] 00000000
55 ReadCH10-MB unused PWM[11:8] 00000000
56 ReadCH11-LB PWM[7:0] 00000000
57 ReadCH11-MB unused PWM[11:8] 00000000
58 ReadCH12-LB PWM[7:0] 00000000
59 ReadCH12-MB unused PWM[11:8] 00000000
11 Direct PWM mode – ASL51xxyHz. value must be updated in every PWM period, if the duty cycle has to be changed. Full diagnosis is available in these part numbers. microcontroller sends the new PWM duty cycle value to the moment the MLC executes it.
11.1 ASL51xxSHy Register MAP
Table 32. ASL51xxSHy register map
0 DIRECT_CH1_LB PWM[7:0] 00000000
1 DIRECT_CH1_UB unused PWM[11:8] 00000000
2 DIRECT_CH2_LB PWM[7:0] 00000000
3 DIRECT_CH2_UB unused PWM[11:8] 00000000
4 DIRECT_CH3_LB PWM[7:0] 00000000
5 DIRECT_CH3_UB unused PWM[11:8] 00000000
6 DIRECT_CH4_LB PWM[7:0] 00000000
7 DIRECT_CH4_UB unused PWM[11:8] 00000000
8 DIRECT_CH5_LB PWM[7:0] 00000000
9 DIRECT_CH5_UB unused PWM[11:8] 00000000
NXP Semiconductors ASL5xxxyHz Matrix LED Controller (MLC) Product data sheet Rev. 2.1 — 5 February 2019 Address Register D7 D6 D5 D4 D3 D2 D1 D0 Reset Values F DIRECT_CH8_UB unused PWM[11:8] 00000000
10 DIRECT_CH9_LB PWM[7:0] 00000000
11 DIRECT_CH9_UB unused PWM[11:8] 00000000
12 DIRECT_CH10_LB PWM[7:0] 00000000
13 DIRECT_CH10_UB unused PWM[11:8] 00000000
14 DIRECT_CH11_LB PWM[7:0] 00000000
15 DIRECT_CH11_UB unused PWM[11:8] 00000000
16 DIRECT_CH12_LB PWM[7:0] 00000000
17 DIRECT_CH12_UB unused PWM[11:8] 00000000
18 to 2F reserved unused 00000000
31 IMMOFF 2 unused IMMO
MTP_ Locked REG_ ILLEGAL_ ACCESS MTP_ ILLEGAL_ ACCESS MTP_ ACCESS_ STATUS CLR_OC CLR_SC 00000000 3A ID OTW_1 OTW_2 POK LHM_ STATUS ID[3:1] ID-FAIL 00000000 3B Internal_Status TXD_ Buffer_ Full unused 00000000 3C LHM BYPASS_ BINNING LHM_EXIT[6:4] LHM_TIMEOUT[3:1] MTP_ CFG 00000000 3D MTP Write Control1 unused MTP Register Adress [6:0] 00000000 3E MTP Write D1 MTP Write Data D1 [7:0] 00000000 3F MTP Write D2 MTP Write Data D2 [7:0] 00000000 All cells presented in the register map are configurable by the customer. If the microcontroller tries to write in the reserved registers, from 18h to 2Fh, the Matrix LED controller (MLC) will raises an error flag. This means that bit 4 of register 34h, REG_ILLEGAL_ACCESS, is set to 1. This bit can be cleared by writing a 1 on it.
12 Sleep and Wake Up
The MLC can enter in Sleep mode and drastically reduce the current consumption, giving the possibility to make an energy efficient system.
NXP Semiconductors ASL5xxxyHz Matrix LED Controller (MLC) Product data sheet Rev. 2.1 — 5 February 2019 The microcontroller can put the entire Matrix LED Controller to sleep with a single broadcast message:
- CAN message for Sleep mode (Broadcast): (Partial Networking must be deactivated)
- Command = 41
- DLC = 000 (no data in the CAN message) This command is ignored only if the MLC is in Limp Home mode state. All the MLCs go to sleep when they receive this broadcast message, but the CAN controller continues watching the bus and in case any change occurs in the CAN bus, the CAN controller wakes up the MLC immediately. In Sleep mode, the MLC consumes less than 1.35 mA. In case the system has MLCs in sleep and others in the same bus in wake (Partial Networking), refer to Section 13 "Partial networking for Sleep and Wake Up (message based)". Send a message to refresh the Limp Home mode watchdog timer (register 3Ch) right before sending the MLCs to sleep. Refreshing the timer this way avoids reaching the timeout setting during the send-to-sleep process. During sleep mode, the watchdog timer to enter in Limp Home mode in case of communication failure is stopped and refresh action is not required during this mode. Any watchdog refresh action from the microcontroller during Sleep mode wakes up the MLCs. If the MLC wakes up due to a noise in the CAN bus, the MLC returns to sleep, in case it does not receive any message in the period of the maximum value of the watchdog timer (576.7 ms). In this case, the MLC does not enter the Limp Home mode state, but returns to sleep mode. The MLC wakes up only if the microcontroller orders it to do so. A synchronization action must be performed in the bus after waking them up. The synchronization is done by sending three consecutive messages from the microcontroller with no data on them (dummy-trimming message). The preamble of these messages is used to trim the CAN clock and synchronize all the MLCs in the bus. A broadcast trimming action is done to be sure that all the MLCs are synchronized and able to send information to the microcontroller.
13 Partial networking for Sleep and Wake Up (message based)
In both messages, Sleep and Wake Up in partial networking, each bit of the bytes of the data field of the CAN message is linked to an MLC. See Table 33. The partial networking control messages, for Sleep or Wake Up, always has 4 bytes of data, the same 32 bits. Due to the address pins (5, from A0 to A4) of the MLC, up to 32 MLCs in the same CAN bus can connect. For that reason, the number of bits in the message fits with the maximum number of MLCs that can be in the same Bus. These two messages are always broadcast and the MLCs receive the messages whether the MLCs are in normal operation or in sleep mode. These messages are ignored only if the MLC is in Limp Home mode. In both cases, the MLC reacts only to the bit that is linked with its address. For example, the MLC with address 0 reacts to the first bit of the first byte of the message, or what is the same, it reacts to the value of the MS bit of the first byte. See Table 33. If the bit is 1, the MLC goes to sleep, in case the message is intended to send the MLC to sleep, or wakes up the IC, in case the message is intended for this action. Table 33 describes the distribution of the MLCs in the different bytes of the massages.
Table 33. MLCs linked to the bits MLC to sleep, to avoid reaching the timeout setting during the send-to-sleep process. care of it, because it waits only for a wake-up message.
13.1 CAN message configuration for Partial_Sleep and Partial_Wake
Both messages are broadcast and received by all the MLCs connected to the CAN bus. messages is used to trim the CAN clock and synchronize all the MLCs in the bus. have part of the analog and CAN controller activated during sleep mode.
14 Nonvolatile Multitime Programmable Memory (MTP)
- Predefined coefficients for the PWM dimming curves (only in ASL50xxyHz — Smart mode)
- PWM frequency selection (244 Hz or 488 Hz)
- Slew rate control per block (individual)
- Switching phase shifting sequences for the different floating blocks
- Limp Home mode sequence
- Communication baud rate
- Open-circuit detection threshold
- Single / Multiple MLCs (internal push/pull configuration)
- LED calibration / scaling factor (5-bits per channel)
- Overtemperature warning (OTW1 and OTW2) thresholds
- Standby mode (full / partial networking)
- MTP Lock Key and counter
- Short-circuit blanking time selection
- Charge pump fail-safe operation mode (CPFSO)
- Free customer data (~ 480-bit)
- Internal configuration (not accessible by user) The MTP can be programmed at the end of the production line (once the MLC is populated on the PCB). The CAN interface can be used to program all the values in the registers. Table 34 shows the registers to write and read from the MTP, together with a detailed write and read sequence.
Table 34. MTP Read/Write Write and read process flow charts are available in the application notes.
14.1 MTP memory map
Table 35. MTP memory map
NXP Semiconductors ASL5xxxyHz Matrix LED Controller (MLC) Product data sheet Rev. 2.1 — 5 February 2019 MTP Registers (16 bits registers)[1][2] No. Bits Block 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Add ress 960 60 A 3Ch 976 61 B 3Dh 992 62 C 3Eh 1008 63 Curve 1 coefficients D 3Fh 1024 64 A 40h 1040 65 B 41h 1056 66 C 42h 1072 67 Curve 2 coefficients D 43h 1088 68 A 44h 1104 69 B 45h 1120 70 C 46h 1136 71 Curve 3 coefficients D 47h 1152 72 A 48h 1168 73 B 49h 1184 74 C 4Ah 1200 75 Curve 4 coefficients D 4Bh 1216 76 A 4Ch 1232 77 B 4Dh 1248 78 C 4Eh 1264 79 Curve 5 coefficients D 4Fh 1280 80 A 50h 1296 81 B 51h 1312 82 C 52h 1328 83 Curve 6 coefficients D 53h 1344 84 A 54h 1360 85 B 55h 1376 86 C 56h 1392 87 Curve 7 coefficients D 57h 1408 88 Overtemperature Warning 1 Overtemperature Warning 0 Phase1 LHM defs1–3 OC1 Slew1[3:0] 58h 1424 89 Phase2 LHM defs4–6 OC2 Slew2[3:0] 59h 1440 90 Phase3 LHM defs7–9 OC3 Slew3[3:0] 5Ah 1456 91 Value has no impact[5] Phase4 LHM defs10–12 OC4 Slew4[3:0] 5Bh 1472 92 CPFS0 LED binning3 LED binning2 LED binning1 5Ch 1488 93 CPFS1 LED binning6 LED binning5 LED binning4 5Dh 1504 94 CPFS2 LED binning9 LED binning8 LED binning7 5Eh 1520 95 CPFS3 LED binning12 LED binning11 LED binning10 5Fh 1536 96 MTP lock key MTP fail counter Part netw. SC timer CAN speed Multi- MLC PWM freq 60h 1552 97 MTP Write Counter1[4] Diode_Trim_Value[4] 61h
Free space (480-bits). User definable. User can write any information in this space. [2] All the values stored in the MTP start from the Most Significant bit (MSb) to the Less Significant Bit (LSb). [4] Read only. If the microcontroller writes a value in this cell, the system does not raise an error flag, but also does not write any value in the cell. [5] Any value has no impact in the MLC configuration. Write a 0 when a write message is sent. The internal curves' coefficients have 13 bits each, because they are signed coefficients. If the user wants to program a negative coefficient, the first bit must be a logical 1. 3rd grade polynomial equation.
14.1.1 Registers value selection criteria
Table 36. PWM frequency selection Table 37. Slew rate selection
Table 38. Phase shifting sequence in the different floating blocks to the same light source must switch at the same time. Table 39. Limp Home mode selection (58h, 59h, 5Ah and 5Bh)
0 LED OFF
1 LED ON
Table 40. Short circuit timer (blanking time after duty cycle rising edge) Table 41. Data rate selection
Table 42. Open circuit (OC) threshold selection (58h, 59h, 5Ah and 5Bh) Table 43. System configuration. Single / Multiple MLC
0 Single
1 Multiple (default)
Table 44. Scaling factor selection (5Ch, 5Dh, 5Eh and 5Fh)
Table 45. Overtemperature warning (OTW_x) threshold selection Note: The overtemperature warning (OTW) measurement has an accuracy of ±10 °C. Table 46. Partial networking selection
0 OFF (default)
15 Limiting values
Table 47. Limiting values
NXP Semiconductors ASL5xxxyHz Matrix LED Controller (MLC) Product data sheet Rev. 2.1 — 5 February 2019 Symbol Parameter/Pin Conditions Min Max Unit ASL5x15yHz –0.3 1.5 A IT(RMS) Maximum RMS current per switch ASL5x08yHz –0.15 0.8 A VCP CP pin With respect to Ground –0.2 72 V VVMAX VMAX pin With respect to ground –0.2 60 V VTXD Pin TXD With respect to ground –0.2 6 V VRXD Pin RXD With respect to ground –0.2 6 V VNTC Pin NTC With respect to ground –0.2 1.95 V VID Pin ID With respect to ground –0.2 1.95 V VAx Pins A0 to A4 With respect to ground –0.2 6 V VVcc Pin VCC With respect to ground –0.2 6 V VICP Pin ICP Not ground but must be connected to ground –0.2 1.95 V Tj Junction temperature — –40 175 °C Tstg Storage temperature — –55 175 °C TMTP MTP programming ambient temperature MLC in MTP programming mode 0 40 °C Ncy(W)MTP Maximum MTP programming times Programming temperature between 0 and 40 °C — 200 cycles HBM (at any pins)[1] –2 2 KV CDM[2] –500 500 VElectrostatic discharge voltage (Component level) CDM Corner pins[3] –750 750 V ISO10605 SWx, and VCC pins with respect to GND and 270nF/50V capacitor attached to the pin. ID and NTC pins with respect to GND and 10nF capacitor + 3.3 V diode attached to the pin –8 8 KV Vact(ov)ESD System Level[4][5] IEC61000-4-2 SWx, and VCC pins with respect to GND and 270nF/50V capacitor attached to the pin. ID and NTC pins with respect to GND and 10nF capacitor + 3.3 V diode attached to the pin -6 6 KV [1] Human Body Model (HBM): according to AEC-Q100-002 (100 pF, 1.5 KΩ). [2] Charged Device Model (CDM): according to AEC-Q100-011 (field Induced charge; 4 pF). [3] Only applicable for part numbers with HLQFP package. [4] System level test at any pin that can be connected directly to ECU connector (IEC61000-4-2 & ISO10605). Switches pins and Vcc pin. Model for IEC61000-4-2: 330 Ω / 150 pF. Model for ISO10605: 2 kΩ / 150 pF (unpowered) [5] System level test board reference schematic can be found in the application notes
16 Thermal characteristics
Table 48. Thermal characteristics
17 Static characteristics
Table 49. Static characteristics
NXP Semiconductors ASL5xxxyHz Matrix LED Controller (MLC) Product data sheet Rev. 2.1 — 5 February 2019 Symbol Parameter/Pin Conditions Min Typ Max Unit ID = 100 396 — 486 mV ID = 101 486 — 603 mV ID = 110 603 — 739 mV ID = 111 739 — 905 mV Vth(det)load(sc) (ID) ID resistor short state — 0 — 80 mV Vth(det)load(oc) (ID) ID resistor open state — 905 — 1100 mV Output — 12 — bits Nres(PWM) PWM Resolution Internal — 20 — bits fdata(CAN) CAN data rate MTP reg. 0x60h, bits 2-3 = 00 — 125 — Kbps fdata(CAN) CAN data rate MTP reg. 0x60h, bits 2-3 = 01 — 250 — Kbps fdata(CAN) CAN data rate MTP reg. 0x60h, bits 2-3 = 10 — 500 — Kbps fdata(CAN) CAN data rate MTP reg. 0x60h, bits 2-3 = 11 — 1000 — Kbps VVCC VCC operational range — 4.5 5 5.5 V VVCC(latch)reset VCC under voltage threshold Threshold only used during Vcc ramp up 4 — 4.5 V VIH I/O High level input voltage (TxD, Rxd, A0 – A4) — 0.7 x VCC — VCC + 0.5 V VIL I/O Low level input voltage (TxD, Rxd, VCC V IP(sleep) Sleep mode supply current VCC = 5 V, MLC address = 11111 (31), Tj<125 °C 0.7 0.9 1.35 mA CTXD TXD pin capacitance — TXD1 and TXD2[1] — 1.5 2 pF CRXD RXD pin capacitance RXD1 and RXD2[1] — 1.5 2 pF ICC MLC supply current Vcc = 5 V, MLC address = 11111 (31), Charge pump idle. Tj = 150 °C — 7.8 10 mA ICp Current consumption of the charge pump Charge pump toggling with no switching. Tj = 150 °C. VCC = 5 V 0.3 0.36 mA ICAN Current consumption due to full CAN communication 1 mA IAx Pins A0 to A4 current consumption Pin grounded. Vcc = 5 V[2] 63 80 109 µA VUVLO Under voltage Lockout level Threshold only used during Vcc ramp down 3.9 4.3 4.5 V Vhys(det)uv VCC under voltage hysteresis — 30 100 120 mV
calculated with the formula.
18 Dynamic characteristics
Table 50. Dynamic characteristics
19 Packaging
19.1 Package mechanical dimensions
Table 51. Package Outline
NXP Semiconductors ASL5xxxyHz Matrix LED Controller (MLC) Product data sheet Rev. 2.1 — 5 February 2019
NXP Semiconductors ASL5xxxyHz Matrix LED Controller (MLC) Product data sheet Rev. 2.1 — 5 February 2019
NXP Semiconductors ASL5xxxyHz Matrix LED Controller (MLC) Product data sheet Rev. 2.1 — 5 February 2019
NXP Semiconductors ASL5xxxyHz Matrix LED Controller (MLC) Product data sheet Rev. 2.1 — 5 February 2019
Figure 12. Package outline – HVQFN package
NXP Semiconductors ASL5xxxyHz Matrix LED Controller (MLC) Product data sheet Rev. 2.1 — 5 February 2019
NXP Semiconductors ASL5xxxyHz Matrix LED Controller (MLC) Product data sheet Rev. 2.1 — 5 February 2019
NXP Semiconductors ASL5xxxyHz Matrix LED Controller (MLC) Product data sheet Rev. 2.1 — 5 February 2019
NXP Semiconductors ASL5xxxyHz Matrix LED Controller (MLC) Product data sheet Rev. 2.1 — 5 February 2019
Figure 13. Package outline – HLQFP package
Table 52. Revision history
NXP Semiconductors ASL5xxxyHz Matrix LED Controller (MLC) Product data sheet Rev. 2.1 — 5 February 2019
21 Legal information
21.1 Data sheet status
Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term 'short data sheet' is explained in section "Definitions". [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.
21.2 Definitions
Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet.
21.3 Disclaimers
Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Suitability for use in automotive applications — This NXP Semiconductors product has been qualified for use in automotive applications. Unless otherwise agreed in writing, the product is not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected
NXP Semiconductors ASL5xxxyHz Matrix LED Controller (MLC) Product data sheet Rev. 2.1 — 5 February 2019 to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions.
21.4 Trademarks
Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners.
NXP Semiconductors ASL5xxxyHz Matrix LED Controller (MLC) Product data sheet Rev. 2.1 — 5 February 2019 Tables Tab. 4. Curve selection, auto-bit, shift value, start/ stop positions and delay factor (Read/Write) ... 17 Tab. 6. PWM-Feedback registers (only Read Tab. 7. Immediate OFF commands. Set duty cycle Tab. 8. Start commands for each channel (Read/ Tab. 9. Possible identification resistors for Tab. 11. CLEAR - CLEAR control register (address Tab. 12. CLEAR - CLEAR control register (address Tab. 13. Open Circuit and Short Circuit registers Tab. 14. NTC - NTC control register (address 39h) bit Tab. 15. NTC - NTC control register (address 39h) bit Tab. 16. ID - ID control register (address 3Ah) bit Tab. 17. ID - ID control register (address 3Ah) bit Tab. 18. Internal Status - Internal status control Tab. 19. Internal Status - Internal status control Tab. 21. OC threshold selection and CPFSx selection Tab. 22. LHM - Limp Home mode control register Tab. 23. LHM - Limp Home mode control register Tab. 26. Standard-ID and the synchronization Tab. 38. Phase shifting sequence in the different Tab. 39. Limp Home mode selection (58h, 59h, 5Ah Tab. 40. Short circuit timer (blanking time after duty Tab. 42. Open circuit (OC) threshold selection (58h, Tab. 44. Scaling factor selection (5Ch, 5Dh, 5Eh and Tab. 45. Overtemperature warning (OTW_x) Figures Fig. 1. Application diagram for the ASL5xxxyHz Fig. 5. Single LED driving configuration application Fig. 6. Multiple strings with segment driving Fig. 8. Blocks of switches can be assigned to phase Fig. 9. Example PWM Polynomial curves (Default Fig. 10. Typical NTC resistance vs. temperature in
NXP Semiconductors ASL5xxxyHz Matrix LED Controller (MLC) Please be aware that important notices concerning this document and the product(s) described herein, have been included in section 'Legal information'. © NXP B.V. 2019. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 5 February 2019
Contents
8.1 Integrated switches for single or multiple
8.2 LED current capability and power dissipation ...13