ARM1176 FUJITSU | Alldatasheet
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Technical content
ARM1176 PROTOTYPING KIT significantly reducing SoC development time by around 50%
Description
This prototyping kit consists primarily of an evaluation board equipped with a 90nm platform chip incorporating four ARM ® cores: 2 X ARM1176JZF-S, 1 X ARM926EJ-S and 1X ARM946E-S. The board also includes a Virtex 5 FPGA for loading user logic and for evaluation. In addition to the platform chip and the FPGA (which contains a reference design) the design kit includes a sample program, a logical simulation model, and the manual. Since a dummy module (including the bus structure) is installed in the FPGA reference design, customers can develop their SoC with the ARM1176JZF-S simply by replacing it with their own module. Therefore, prior to completion of the ARM1176-SoC, it is possible to evaluate the developed functional user logic and the driver, in order to improve the speed performance of the customer-developed SoC, resulting in a faster system-LSI design process. ARM1176 core block A D M A R WI P L2CC Configuration ARM1176 core block B D M A R W I PL2CC Configuration ARM926 core block ARM946 core block AMBA 3 interconnect (32-bit) AMBA 3 interconnect (32-bit) AMBA 3 interconnect (32-bit) AMBA 3 interconnect (32-bit) VIC TZIC Ext. IRC WDT CIM Timer VIC TZIC Ext. IRC WDT CIM Timer VIC TZIC Ext. IRC WDT CIM Timer VIC TZIC Ext. IRC WDT CIM Timer Ether DDR EXTAXI DAP XDMAC 8ch AMBA 3 interconnect (64-bit) DMC DDR EXTAXI SRAM 64kB MEMCS SRAM 64kB Ether External AXI (master) External AXI (slave) Mobile DDR Flash SRAM TZMA AMBA 3 interconnect (32-bit) XDMAC Reg.IPCU Ether Reg. APB (32-bit) DLLCGlobal TimerCRG11MEMCS Reg. MRBCGPIO 32ch UART 3chMulti-core Control DMC Reg. Clock & Reset JTAG TZPC Block diagram of ARM1176 Prototyping Kit. SoC Development SoC equipped with ARM1176JZF-S
ASK FUJITSU MICROELECTRONICS EUROPE Contact us on +49 (0) 61 03 69 00 or visit http://emea.fujitsu.com/microelectronics Key Specifications of the ARM1176 Prototyping Kit Evaluation Board LSI ARM processors evaluation LSI and FPGA External Bus 64-bit External AXI (*1) (DDR, max. 100MHz) Memory Flash memory 32MB Mobile DDR SDRAM 128MB External Ethernet, UART, ICE Interface LSI used to evaluate Multi-core ARM1176JZF-S (max. 500MHz), ARM processor processor ARM926EJ-S (max. 400MHz), ARM946E-S (max. 400MHz) Process CMOS 90nm technology low power-consumption process Package FCBGA (*2) 1156 (35 x 35mm) Power 1.2W (ARM1176JZF-S: operating consumption at 500MHz, typ.) Other FPGA reference design, sample program, simulation model, user’s manual (*1) AXI: Advanced eXtensible Interface. A high-speed bus conforming to ARM’s AMBA 3.0 specification. Used as processor bus for ARM1176JZF-S (*2) FCBGA: A multi-pin package that includes flip-chip bonding technologies. (*3) AMBA: Advanced Microcontroller Bus Architecture. An industry standard SoC (System-on-Chip) on-chip Bus from ARM. ARM, ARM Limited, ARM1176JZF-S, ARM926EJ-S, ARM946E-S and AMBA are registered trademarks or trademarks of ARM Limited. HapsTrak is a trademark of Synplicity, Inc. All other company or product names herein are the property of their respective owners. Information in this fact sheet is accurate at time of publication and is subject to change without prior notice. Evaluation board.
Features
Verification can be performed in near real conditions Performance of the external AXI bus - which connects the evaluation LSI for ARM processors on the evaluation board with the FPGA loaded with the customer’s logic circuit – was improved by a factor of 8 to 16 compared to previously available products. This makes it possible for customers to verify their own logic under conditions that closely resemble the resulting system LSI. Due to the fact that system LSIs for still images or video processing take a considerable amount of time to verify using logic simulation, practical testing that resembles the actual system LSI environment can shorten the development lead time. FPGA reference design helps shorten LSI development lead time Because the FPGA reference design includes dummy modules that comply with industry-standard advanced microcontroller bus architecture (AMBA) (*3), customers can simply replace the dummy modules with their own modules to easily build a prototype design of a system LSI based on the ARM1176JZF-S. Using this FPGA, customers can verify their custom logic and develop device drivers before the system LSI has been fabricated, thereby reducing the development lead time. The evaluation board is compatible with the HapsTrak specification of the prototyping board from Synplicity , with an expandable FPGA domain.