AR2003FV
Document overview
- Manufacturer or author: Diodes Incorporated
- PDF pages: 15
Technical content
Features
Primary-Side or Secondary-side Active/Synchronous Rectification, Optimized for Systems with Dynamic Voltage Scaling Capabilities Frequency of Operation up to 600kHz Suitable for Discontinuous (DCM), Continuous (CCM) and Critical (CrCM) Conduction Mode Minimum On-time and Off-time to Blanking Turn-on/off Oscillations Light Load Detection and Sleep Mode Drain Voltage Rating of 200V Recommended Operating Voltage from 4.5V up to 21V Low Component Count. Low Under Voltage Lockout Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2) Halogen and Antimony Free. “Green” Device (Note 3) Pin Assignments (Top View) VD AGND TON NC TOFF/EN SFB OVS NC VS VD VCC GND DGATE SYNC GATE V-DFN3535-14
Applications
USB PD Adaptor AC-DC Battery Charger Fly-back Conversion PC Power Supply SMPS Power Adaptors Auxiliary Power Supplies PoE Power Devices Notes: 1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant. 2. See http://www.diodes.com/quality/lead_free.html for more information about Diodes Incorporated’s definitions of Hal ogen- and Antimony-free, "Green" and Lead-free. 3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and <1000ppm antimony compounds.
AR2003FV 2 of 15 December 2014 Document number: DS37473 Rev. 3 - 2 www.diodes.com © Diodes Incorporated AR2003FV Typical Applications Circuit Active Rectifier AR2003FV PWM IC Opto Coupler VCC OVS VD SFB DGATE VS VCC GATE Secondary-side Synchronous Rectification C C VCC E ISENSE VSENSE GND VD VCC VS GND AR2003FV TON EN/TOFF OVS GATE VCC Primary-side Synchronous Rectification
AR2003FV 3 of 15 December 2014 Document number: DS37473 Rev. 3 - 2 www.diodes.com © Diodes Incorporated AR2003FV Pin Descriptions Pin Number Pin Name Function 1, 7 NC Not Connected
2 TON Minimum On-time Setting Pin
3 AGND This is the ground reference for all internal comparators and thresholds.
4 TOFF/EN
Enable Pin/ Minimum Off-time This pin combines the functions of setting the programmable minimum off -time as well as acting as the enable pin. The device enters Under Voltage Lock Out (UVLO) mode when VCC falls below the UVLO threshold. At this point the TOFF/EN pin is internally shorted to ground through a resistor. The internal current source (used for setting TOFF) is powered down. Once the UVLO threshold is exceeded, the internal resistance is removed and the current source is activated. If the voltage applied to the TOFF/EN pin exceeds the VENON threshold then the device is in Active Mode. If the voltage drops below the VENOFF threshold then the device is in Sleep Mode.
5 SFB
Output pin of internal feedback resistor which is connected to VCC. It is sent to TL431 (or its compatible) to drive the opto -coupler and provide feedback voltage to primary side controller to realize Secondary Synchronous Rectification. 6 OVS Output voltage (VCC) select pin, work together with SFB to select output voltage in 5V or 12V. 8 VS This is the connection to internal MOSFET Source. VS is also connected to GND. 9, VD pad VD This is a connection to the internal MOSFET Drain. The pin needs to be connected as closely as possible to the transformer used in the application, to minimize the effects of parasitic inductance on the performance of the device. The device requires that VD has a voltage greater than 1.5V and that the T OFF timer has expired before the MOSFET is able to be activated. Once these conditions are met and the voltage internally sensed on the VD pin is 150mV lower than the VS pin, the internal MOSFET is turned on and the TON minimum on time period is started. The MOSFET will remain on for at least the length of the minimum on time. The only thing that can override this is if a pulse is detected on the SNYC pin. After the TON period, the MOSFET remains on until the VD to VS voltage has reached to the V THOFF threshold, at which point the internal MOSFET is turned off. As mentioned before, if the V THOFF threshold is reached before the TON period has expired, the device will enter the Light Load Mode. Under this mode, the MOSFET will not be turned on the next switching cycle. When the drain voltage has increased to 1.5V , the TOFF timer is triggered, durin g which the MOSFET is prevented from turning on.
10 GATE
Connect GATE to the gate of the controlled MOSFET through a small series resistor using short PC board tracks to achieve optimal switching performance. The GATE output can achieve > 2-A peak source current when High and >4-A peak sink current when Low into a large N-channel power MOSFET.
11 SYNC
If a falling edge is sensed on this pin, the internal MOSFET is immediately turned off, irrespective of the sensed drain to source voltage or the state of the TON timer. This characteristic allows the device to be easily used in a Continuous Conduction Mode (CCM) system. The SYNC pin needs to be connected to a suitable control signal on the primary side of the convertor, using a high voltage isolation cap, t ransformer or other suitable means. 12 DGATE During Over Voltage Protection, DGATE will drive external MOSFET to pull down the output voltage so that Primary side controller will start the Short Circuit Protection handling. 13 GND This is the reference potential for all internal comparators and thresholds.
14 VCC
VCC supplies all the internal circuitry of the device. A DC supply is required to be connected to this pin. It is required that a 10µ F or larger capacitor is placed between this pin and GND, as close to the pins as possible. The device will not function until the V CC has risen above the UVLO threshold. The device can safely be turned off by bringing V CC below the UVLO threshold (minus the UVLO threshold hysteresis). If V CC drops below the UVLO threshold (minus UVLO threshold hysteresis), the MOSFET is turned o ff and the TOFF/EN pin is internally connected to GND.
AR2003FV 4 of 15 December 2014 Document number: DS37473 Rev. 3 - 2 www.diodes.com © Diodes Incorporated AR2003FV Functional Block Diagram SFB VS OVS TOFF/EN TON DGATE VCC SYNC GND VD GATE Enable Control Off Timer General Control Logic & Exception Handling On Timer Driver UVLO Vref OVP Vref AVDD 1.5V VTHOFF VTHON AVDD-2V Rupper Rlower LDO AVDDAGND
AR2003FV 5 of 15 December 2014 Document number: DS37473 Rev. 3 - 2 www.diodes.com © Diodes Incorporated AR2003FV Absolute Maximum Ratings (Note 4) Symbol Parameter Rating Unit VCC Input Voltage Range VCC -0.3 to 24 V VD Input Voltage Range VD -1 to 200 V VS Input Voltage Range VS -1 to 1 V TOFF/EN, TON, OVS, SYNC Input Voltage Range Other -0.3 to 6 V TJ Operating Junction Temperature -40 to +150 °C TL Lead Temperature + 260 °C TST Storage Temperature -65 to +150 °C ESD Human Body Model, JESD22-A114 2 kV Charged Device Model, JESD22-C101 0.5 Note 4: These are stress ratings only. Operation outside the absolute maximum ratings may cause device failure. Operation at the absolute maximum rating for extended periods may reduce device reliability. Package Thermal Data (@TA = +25° C, unless otherwise specified) Symbol Parameter Rating Unit PD Power Dissipation (Note 5) 0.67 W RθJA Thermal Resistance, Junction to Ambient Air (Note 6) 36 ° C/W RθJC Thermal Resistance, Junction to Case (Note 7) 21 ° C/W Notes: 5. Device mounted on FR-4 PCB, 2oz with minimum recommended pad layout. 6. Device mounted on 25mm x 25mm 2oz copper board. 7. Device mounted on 50mm x 50mm 2oz copper board. Recommended Operating Conditions Symbol Parameter Min Max Unit VCC Supply Voltage Range 4.5 21 V VDS Voltage Cross Drain and Source -1 200 fSW Switching Frequency 20 600 kHz TJ Operating Junction Temperature Range -40 +125 °C RTOFF TOFF Resistor Value 85 200 kΩ RTON TON Resistor Value 8.25 100 kΩ CVCC VCC Bypass Capacitor 10 – μF TWsync Sync Pulse Width 20 – nS
AR2003FV 6 of 15 December 2014 Document number: DS37473 Rev. 3 - 2 www.diodes.com © Diodes Incorporated AR2003FV Electrical Characteristics (@TA = +25° C, unless otherwise specified.) Symbol Parameter Conditions Min Typ Max Unit VAVDD Internal Regulator Output VCC = 5.5V – 4.5 – V VCC = 12V – 4.7 – V ICCSTART Supply Current (Under Voltage) VCC = 2.6V – 160 220 µA ICCSTANDBY Supply Current (Disabled) VCC = 5.5V, REN/OFF = 0Ω – 380 500 VCC = 12V, REN/OFF = 0Ω – 450 600 ICCON Supply Current (Enabled) VCC = 5.5V, REN/OFF = 100kΩ, Cgate=0. – 1.5 2 mA VCC = 12V, REN/OFF = 100kΩ, Cgate=0. – 1.8 2.5 VCC = 5.5V, fsw=100kHz, Cgate=3300pf – 3.2 4.2 VCC = 12V, fsw=100kHz, Cgate=3300pf – 5 7 VEN-ON TOFF/EN Turn-on Threshold, Rising TOFF/EN driven, VTON > 0.6V 1.31 1.4 1.49 V VEN-OFF TOFF/EN Turn-off Threshold, Falling TOFF/EN driven, VTON < 0.2V 0.55 0.6 0.65 IEN-START TOFF/EN Input Current, Disabled RTOFF=50K -21.5 -20 -18.5 µA IEN-ON TOFF/EN Input Current, Enabled RTOFF=100K -10.7 -10 -9.3 Under-Voltage Lockout (UVLO) UVLOTH VCC Under Voltage Lockout Threshold Rising – 2.8 3.0 3.20 V UVLOHYS VCC Under Voltage Lockout Threshold Hysteresis – – 200 – mV MOSFET Voltage Sensing VTHARM Gate Re-arming Threshold VD to GND, Rising 1.3 1.5 1.7 V VTHON Gate Turn-on Threshold (VD-VS) falling, VS = 0V -220 -150 -80 mV VTHOFF HV Gate Turn-off Threshold (VD-VS) rising, VS = 0V, VCC ≥ 4.2V -6 -4 -2 mV VTHOFF LV Gate Turn-off Threshold VD-VS) rising, VS = 0V, VCC < 4.2V -30 -20 -10 TDON Gate Turn-on Propagation Delay From VTHON to Gate > 1V – 30 50 ns TDOFF Gate Turn Off Propagation Delay From VTHOFF to Gate < 4V – 30 60 ns Minimum On Time TON-LR Minimum On Time at Low Resistance RTON = 8.25KΩ 0.26 0.34 0.42 µs TON-HR Minimum On Time at High Resistance RTON = 100KΩ 2.25 3 3.75 µs Minimum Off Time TOFF-LR Minimum Off Time at Low Resistance RTOFF = 100KΩ 0.8 1.4 2 µs TOFF-HR Minimum Off Time at High Resistance RTOFF = 200KΩ 7.5 10 12.5 µs TOFF-LV Minimum Off Time at Low Voltage VEN/TOFF=1V 0.8 1.4 2 µs TOFF-HV Minimum Off Time at High Voltage VEN/TOFF=2V 7.5 10 12.5 µs TOFF-OV Minimum Off Time at Over Voltage 2V<VEN/TOFF<VAVDD 7.5 10 12.5 µs
AR2003FV 7 of 15 December 2014 Document number: DS37473 Rev. 3 - 2 www.diodes.com © Diodes Incorporated AR2003FV Electrical Characteristics (@TA = +25° C, unless otherwise specified.) (Cont.) Symbol Parameter Conditions Min Typ Max Unit Over Voltage Protection VOVP0H Output Over Voltage High Threshold when OVS = 0 – – 6 – V VOVP0L Output Over Voltage Low Threshold when Synchronization VTHSYNC SYNC Falling Threshold Gate Output from High to Low VAVDD-2.4 VAVDD-2.0 VAVDD-1.6 V TSDLY SYNC Propagation Delay (Note 8) SYNC falling to Gate Falling 10%, 4.5V < VCC < 5.5V – 40 70 ns RSYNC SYNC Pull Up Resistance (Note 8) Internal Resistance from SYNC Gate Driver RGUP Gate Pull up Resistance Enabled Igate=-100mA – 2.3 4 Ω RGDN Gate Pull Down Resistance Enabled Igate=100mA – 1.1 2 VOHG Gate Output High Voltage Igate=-100mA, VCC=5V 4.7 -- – V Igate=100mA, VCC>10V 9.5 -- – VOLG Gate Output Low Voltage Igate=100mA, VCC=0V – -- 0.3 Tfgate Gate Fall Time 4V to 1V, Cgate = 3300pf – 14 30 ns 10V to 1V, Cgate=3300pf – 20 35 Trgate Gate Rise Time 1V to 4V, Cgate = 3300pf – 16 35 1V to 10V, Cgate = 3300pf – 25 40 TDIS Disable Delay (note 8) EN falling to Gate falling – 160 200 Exception Handling Tover Over Temperature – – +150 – °C Trecover Temperature to Recover from Over Temperature Exception – – +125 – °C Tdgate Delay of Turn On Pull Down MOSFET Cdgate=400pf – 1.5 – uS Note 8: Guaranteed by design.
AR2003FV 11 of 15 December 2014 Document number: DS37473 Rev. 3 - 2 www.diodes.com © Diodes Incorporated AR2003FV Modes of Operation General Description AR2003FV is an Active/Synchronous Rectifier which can work with many different primary side controllers. AR2003FV can be used in both SSR and PSR systems. AR2003FV has preset of internal feedback resistor that can reduce external BOM for 5V or 12V system. UVLO MODE When VCC does not reach UVLOTH, or falls blow UVLOTH - UVLOHYS, AR2003FV will be in UVLO MODE. In this mode, AR2003FV will turn off external MOSFET, and TOFF/EN pin will internally short to GND. VCC current will be ICCSTART. Sleep Mode Sleep Mode is a low-power operating mode similar to UVLO Mode, except that this mode is entered by forcing V EN below the VEN-OFF threshold via external control. Many internal circuits are turned off to reduce power consumption in this model to reduce device operating losses. External control overrides any internal timing conditions, and immediately forces the GATE output lo w and enters Sleep Mode. VCC current is reduced to ICCSTANDBY level. As VEN is restored to above the VEN-ON threshold, the device exits Sleep Mode into Light-Load Mode after a delay of several μs, allowing re-powered internal circuits to settle. Active Mode This is the normal operation mode when inductor current is large enough and synchronous conduction time is longer than TON. AR MOSFET will be turned on and off according to VD-VS, TON and TOFF setting and SYNC pin. Light-Load Mode When Inductor current is small and synchronous conduction time is less than TON, the AR MOSFET will be kept OFF to reduce switching power loss. Voltage across body diode of AR MOSFET is continuously monitored. When the MOSFET body -diode conduction time is more than TON, the device will be back to Active mode again. Over Voltage Protection Over Voltage mostly likely was an indication of optical coupler short. Therefore, just reporting output error information is not enough. AR2003FV will drive an external FET to create a short situation so that primary side can be set to whole system to restart. Over Temperature Protection (Only for Secondary-side Synchronous Rectification Application) When AR2003FV is over heated, AR2003FV will light up the optical coupler to let the primary side deliver very little or no energy so that the whole system will cool down. Hysteresis is set to +25° C. Usually, VCC might drop blow UVLOTH - UVLOHYS (around 2.8V) due to system load. AR2003FV will enter UVLO mode, and system might restart again. If AR2003FV is over heated again in short time, V CC might be kept around 2.8V. The primary side controller might treat this event as over current or short current, and enters its protection mode. Over Current Protection Over Current Protection is not implemented in AR2003FV. Over Current Protection will be carried out in Primary side. Short Current Protection Short Current Protection is not implemented in AR2003FV. Short Current Protection handling will be carried out in Primary side.
AR2003FV 12 of 15 December 2014 Document number: DS37473 Rev. 3 - 2 www.diodes.com © Diodes Incorporated AR2003FV
Application Information
The Ton period (minimum on-time) is programmed by adding a resistor from TON pin to ground. In the application, it’s likely that when the MOSFET is turned on there will be some ringing generated due to parasitic within the system. The minimum on time will stop the devic e reacting to this ringing, by blanking out any signal received from the Drain to Source (V D-VS) comparator once the device is initially triggered. This will keep the MOSFET turned on for duration of the minimum on-time, irrespective of the VD-VS voltage during this period. If VD-VS reaches the gate turn-off threshold within the minimum on -time period, the device will change into Light Load Mode for the next switching cycle. If the load conditions of the system change and the MOSFET turn-off threshold is once again reached once the minimum on-time is over, the device reverts to its nominal mode of operation. TON (μs) = 0.028μs * RTON (KΩ) + 0.1μs, 0.24μs < TON < 4.3μs, 5KΩ < RTON <150KΩ Enabling and OFF Timer Programming When VCC < UVLO, TOFF/EN is internally connected to ground through a resistor. If VCC rises above UVLO, the chip is in the Sleep Mode, a current source will deliver 20µ A (IEN-START) to TOFF/EN pins. If RTOFF > 70KΩ, VTOFF/EN will over 1.4V (VEN-ON), AR2003FV will enter Active Mode. And the internal current source will switch to deliver 10µ A (IEN-ON) to TOFF/EN pin. User can program the minimum off-time by choosing proper value for RTOFF. TOFF (µ s) = 0.083µ s* (RTOFF (KΩ)-81KΩ), valid for 85KΩ < RTOFF < 200KΩ User can also program OFF timer by control the VTOFF/EN. TOFF (µ s) = 0.083µ s* (VTOFF/EN-0.81V), valid for 0.85V < VTOFF/EN < 2V The minimum off -time is the minimum time ; the internal MOSFET will be turned off once V THOFF turn off threshold is reached. This avoids the MOSFET accidentally being retriggered by ringing after turn off. Minimum On Time >The time from VDS fall under VTHON to VDS ringing voltage < VTHOFF Check with no load waveform Maximum On Time < The time from VDS fall under VTHON to VDS =VTHOFF Check with no load waveform Minimum Off Time > The time from VDS > VTHARM to VDS ringing negative voltage higher than VTHON after turn off Check with no load waveform Maximum Off Time < The time from VDS=VTHARM to VDS drop from VCC level Check with maximum load waveform No load mode VDS waveform Minimum on time Maximum on time Minimum off time Maxima off time T FSW VDS=VTHOFF VDS=VTHON =-150mV VDS=VTHARM=1.5V VDS=VTHARM=1.5V Maximum load mode VDS waveform VDS=VTHON=-150mV
AR2003FV 13 of 15 December 2014 Document number: DS37473 Rev. 3 - 2 www.diodes.com © Diodes Incorporated AR2003FV Application Information (Cont.) SYNC Input Circuit SYNC pin is internally pulled up to internal AVDD (4.2V to 5V) through a 2KΩ resistor. If a falling edge of more than 2V is detected, the external MOSFET will be turned off by AR2003FV. If the amplitude of SYNC signal is larger than 4.2V, an external resistor should be used to limit the input current less than 2mA. Ordering Information (Note 9) Part Number Marking Reel size (inches) Tape width (mm) Quantity per reel AR2003FV-13 AR2003 13 12 3,000 Note 9: For packaging details, go to our website at http://www.diodes.com /products/packages.html. Marking Information AR2003
AR2003FV 14 of 15 December 2014 Document number: DS37473 Rev. 3 - 2 www.diodes.com © Diodes Incorporated AR2003FV Package Outline Dimensions (All dimensions in mm.) Please see AP02002 at http://www.diodes.com/datasheets/ap02002.pdf for latest version. (1 ) Package Type: V-DFN3535-14 Suggested Pad Layout Please see AP02001 at http://www.diodes.com/datasheets/ap02001.pdf for the latest version. (1 ) Package Type: V-DFN3535-14 Dimensions Value (in mm) C 0.500 C1 1.500 G 0.250 G1 0.250 X 0.350 X1 0.600 X2 2.100 X3 2.350 Y 0.600 Y1 0.350 Y2 2.100 Y3 3.800 A Seating Plane D E b (Pin #1 ID) L e Z C Y X G V-DFN3535-14 Dim Min Max Typ A 0.75 0.85 0.80 A1 0.00 0.05 0.02 A3 - - 0.15 b 0.20 0.30 0.25 D 3.45 3.55 3.50 D2 1.90 2.10 2.00 E 3.45 3.55 3.50 E2 1.90 2.10 2.00 e - - 0.50 e1 - - 1.50 L 0.35 0.45 0.40 Z - - 0.625 All Dimensions in mm
AR2003FV 15 of 15 December 2014 Document number: DS37473 Rev. 3 - 2 www.diodes.com © Diodes Incorporated AR2003FV IMPORTANT NOTICE DIODES INCORPORATED MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARDS TO THIS DOCUMENT, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION). Diodes Incorporated and its subsidiaries reserve the right to make modifications, enhancements, improvements, corrections or other c hanges without further notice to this document and any product described herein. Diodes Incorporated does not assume any liability arising out of the application or use of this document or any product described herein; neither does Diodes Incorporated convey any license unde r its patent or trademark rights, nor the rights of others. Any Customer or user of this document or products described herein in such applications shall assume all risks of such use and will agree to hold Diodes Incorporated and all the companies whose products are represented on Diod es Incorporated website, harmless against all damages. Diodes Incorporated does not warrant or accept any liability whatsoever in respect of any products purchased through unauthorized sales channel. Should Customers purchase or use Diodes Incorporated products for any unintended or unauthorized application, Customers shall indemnify and hold Diodes Incorporated and its representatives harmless against all claims, damages, expenses, and attorney fees arising ou t of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized application. Products described herein may be covered by one or more United States, international or foreign patents pending. Product nam es and markings noted herein may also be covered by one or more United States, international or foreign trademarks. This document is written in English but may be translated into multiple languages for reference. Only the English version of this do cument is the final and determinative format released by Diodes Incorporated. LIFE SUPPORT Diodes Incorporated products are specifically not authorized for use as critical components in life support devices or systems without the express written approval of the Chief Executive Officer of Diodes Incorporated. As used herein: A. Life support devices or systems are devices or systems which: 1. are intended to implant into the body, or 2. support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided i n the labeling can be reasonably expected to result in significant injury to the user. B. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or to affect its safety or effectiveness. Customers represent that they have all necessary expertise in the safety and regulatory ramifications of their life support devices or systems, and acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and any use of Diodes Incorporated products in such safety -critical, life support devices or systems, notwithstanding any devices - or systems -related information or support that may be provided by Diodes Incorporated. Further, Cus tomers must fully indemnify Diodes Incorporated and its representatives against any damages arising out of the use of Diodes Incorporated products in such safety-critical, life support devices or systems. Copyright © 2014, Diodes Incorporated www.diodes.com