APT9F100B MICROSEMI | Alldatasheet

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Technical content

Thermal and Mechanical Characteristics G D S Single die FREDFET Unit A V mJ A Unit W °C/W oz g in·lbf N·m Ratings ±30 574 Min Typ Max 337 0.37 0.15 -55 150 300 0.22 6.2 1.1 Parameter Continuous Drain Current @ T C = 25°C Continuous Drain Current @ TC = 100°C Pulsed Drain Current 1 Gate-Source Voltage Single Pulse Avalanche Energy 2 Avalanche Current, Repetitive or Non-Repetitive Characteristic Total Power Dissipation @ TC = 25°C Junction to Case Thermal Resistance Case to Sink Thermal Resistance, Flat, Greased Surface Operating and Storage Junction Temperature Range Soldering Temperature for 10 Seconds (1.6mm from case) Package Weight Mounting Torque ( TO-247 Package), 6-32 or M3 screw Symbol I D IDM VGS EAS IAR Symbol PD RθJC RθCS TJ,TSTG TL WT Torque TYPICAL APPLICATIONS

  • ZVS phase shifted and other full bridge
  • Half bridge
  • PFC and other boost converter
  • Buck converter
  • Single and two switch forward
  • Flyback

FEATURES

  • Fast switching with low EMI
  • Low t rr for high reliability
  • Ultra low C rss for improved noise immunity
  • Low gate charge
  • Avalanche energy rated
  • RoHS compliant TO-247 D3PAK APT9F100B APT9F100S 1000V, 9A, 1.6Ω Max, trr ≤200ns APT9F100B APT9F100S POWER MOS 8® is a high speed, high voltage N-channel switch-mode power MOSFET. This 'FREDFET' version has a drain-source (body) diode that has been opti- mized for high reliability in ZVS phase shifted bridge and other circuits through reduced t rr, soft recovery, and high recovery dv/dt capability. Low gate charge, high gain, and a greatly reduced ratio of Crss/Ciss result in excellent noise immunity and low switching loss. The intrinsic gate resistance and capacitance of the poly-silicon gate structure help control di/dt during switching, resulting in low EMI and reliable paralleling, even when switching at very high frequency. 050-8169 Rev B 05-2009

Static Characteristics T J = 25°C unless otherwise specifi ed Dynamic Characteristics T J = 25°C unless otherwise specifi ed Source-Drain Diode Characteristics 1 Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature. 2 Starting at TJ = 25°C, L = 53mH, RG = 25Ω, IAS = 4A. 3 Pulse test: Pulse Width < 380μs, duty cycle < 2%. 4 Co(cr) is defi ned as a fi xed capacitance with the same stored charge as COSS with VDS = 67% of V(BR)DSS. 5 C o(er) is defi ned as a fi xed capacitance with the same stored energy as COSS with VDS = 67% of V(BR)DSS. To calculate Co(er) for any value of V DS less than V(BR)DSS, use this equation: Co(er) = -3.43E-8/VDS^2 + 1.44E-8/VDS + 5.38E-11. 6 RG is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452) Microsemi reserves the right to change, without notice, the specifi cations and information contained herein. G D S Unit V V/°C Ω V mV/°C μA nA Unit S pF nC ns Unit A V ns μC A V/ns Min Typ Max 1000 1.15 1.28 1.6 2.5 4 5 -10 250 1000 ±100 Min Typ Max 1.3 172 200 286 345 .67 1.5 Min Typ Max 10.0 2606 219 Test Conditions VGS = 0V, ID = 250μA Reference to 25°C, ID = 250μA VGS = 10V, ID = 5A VGS = VDS, ID = 1mA V DS = 1000V T J = 25°C V GS = 0V T J = 125°C VGS = ±30V Test Conditions MOSFET symbol showing the integral reverse p-n junction diode (body diode) I SD = 5A, TJ = 25°C, VGS = 0V T J = 25°C T J = 125°C ISD = 5A 3 T J = 25°C di SD/dt = 100A/μs T J = 125°C V DD = 100V T J = 25°C T J = 125°C ISD ≤ 5A, di/dt ≤1000A/μs, VDD = 500V, TJ = 125°C Test Conditions VDS = 50V, ID = 5A VGS = 0V, VDS = 25V f = 1MHz VGS = 0V, VDS = 0V to 670V VGS = 0 to 10V, ID = 5A, VDS = 500V Resistive Switching VDD = 670V, ID = 5A RG = 10Ω 6 , VGG = 15V Parameter Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coeffi cient Drain-Source On Resistance 3 Gate-Source Threshold Voltage Threshold Voltage Temperature Coeffi cient Zero Gate Voltage Drain Current Gate-Source Leakage Current Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) 1 Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current Peak Recovery dv/dt Parameter Forward Transconductance Input Capacitance Reverse Transfer Capacitance Output Capacitance Effective Output Capacitance, Charge Related Effective Output Capacitance, Energy Related Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-On Delay Time Current Rise Time Turn-Off Delay Time Current Fall Time Symbol VBR(DSS) ∆VBR(DSS)/∆TJ RDS(on) VGS(th) ∆VGS(th)/∆TJ IDSS IGSS Symbol IS ISM VSD trr Qrr Irrm dv/dt Symbol gfs Ciss Crss Coss Co(cr) Co(er) Qg Qgs Qgd td(on) tr td(off) tf 050-8169 Rev B 05-2009 APT9F100B_S