APT42F50B MICROSEMI | Alldatasheet

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Thermal and Mechanical Characteristics G D S Single die FREDFET Unit A V mJ A Unit W °C/W oz g in·lbf N·m Ratings 135 ±30 930 Min Typ Max 624 0 .20 0.15 -55 150 300 0 .22 6.2 1.1 Parameter Continuous Drain Current @ TC = 25°C Continuous Drain Current @ TC = 100°C Pulsed Drain Current 1 Gate-Source Voltage Single Pulse Avalanche Energy 2 Avalanche Current, Repetitive or Non-Repetitive Characteristic Total Power Dissipation @ TC = 25°C Junction to Case Thermal Resistance Case to Sink Thermal Resistance, Flat, Greased Surface Operating and Storage Junction Temperature Range Soldering Temperature for 10 Seconds (1.6mm from case) Package Weight Mounting Torque ( TO-247 Package), 6-32 or M3 screw Symbol ID IDM VGS EAS IAR Symbol PD RθJC RθCS TJ,TSTG TL WT Torque TYPICAL APPLICATIONS

  • ZVS phase shifted and other full full bridge
  • Half bridge
  • PFC and other boost converter
  • Buck converter
  • Single and two switch forward
  • Flyback

FEATURES

  • Fast switching with low EMI
  • Low t rr for high reliability
  • Ultra low C rss for improved noise immunity
  • Low gate charge
  • Avalanche energy rated
  • RoHS compliant TO-247 D3PAK APT42F50B APT42F50S 600V, 42A, 0.14Ω Max, trr, ≤250ns APT42F50B APT42F50S Power MOS 8™ is a high speed, high voltage N-channel switch-mode power MOSFET. This 'FREDFET' version has a drain-source (body) diode that has been optimized for high reliability in ZVS phase shifted bridge and other circuits through reduced trr, soft recovery, and high recovery dv/dt capability. Low gate charge, high gain, and a greatly reduced ratio of Crss/Ciss result in excellent niose immunity and low switching loss. The intrinsic gate resistance and capacitance of the poly-silicon gate structure help control di/dt during switching, resulting in low EMI and reliable paralleling, even when switching at very high frequency. Microsemi Website - http://www.microsemi.com 050-8084 Rev A 9-2006

Static Characteristics TJ = 25°C unless otherwise specified Dynamic Characteristics TJ = 25°C unless otherwise specified Source-Drain Diode Characteristics 1 Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature. 2 Starting at TJ = 25°C, L = 4.22mH, RG = 4.7Ω, IAS = 21A. 3 Pulse test: Pulse Width < 380µs, duty cycle < 2%. 4 Co(cr) is defined as a fixed capacitance with the same stored charge as COSS with VDS = 67% of V(BR)DSS. 5 C o(er) is defined as a fixed capacitance with the same stored energy as COSS with VDS = 67% of V(BR)DSS. To calculate Co(cr) for any value of V DS less than V(BR)DSS, use this equation: Co(er) = -1.84E-7/VDS^2 + 3.75E-8/VDS + 1.05E-10. 6 RG is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452) Microsemi reserves the right to change, without notice, the specifications and information contained herein. G D S Unit V V/°C Ω V mV/°C µA nA Unit S pF nC ns Unit A V ns µC A V/ns Min Typ Max 500 0 .60 0.11 0.14 3 4 5 -10 100 500 ±100 Min Typ Max 135 1.0 250 525 Min Typ Max 6810 735 425 215 170 Test Conditions VGS = 0V, ID = 250µA Reference to 25°C, ID = 250µA VGS = 10V, ID = 21A VGS = VDS, ID = 1mA VDS = 500V T J = 25°C VGS = 0V T J = 125°C VGS = ±30V Test Conditions MOSFET symbol showing the integral reverse p-n junction diode (body diode) ISD = 21A, TJ = 25°C, VGS = 0V TJ = 25°C TJ = 125°C ISD = 21A 3 T J = 25°C diSD/dt = 100A/µs T J = 125°C TJ = 25°C TJ = 125°C ISD ≤ 21A, di/dt ≤1000A/µs, VDD = 400V, TJ = 125°C Test Conditions VDS = 50V, ID = 21A VGS = 0V, VDS = 25V f = 1MHz VGS = 0V, VDS = 0V to 333V VGS = 0 to 10V, ID = 21A, VDS = 250V Resistive Switching VDD = 333V, ID = 21A RG = 4.7Ω 6 , VGG = 15V Parameter Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Drain-Source On Resistance 3 Gate-Source Threshold Voltage Threshold Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Source Leakage Current Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) 1 Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current Peak Recovery dv/dt Parameter Forward Transconductance Input Capacitance Reverse Transfer Capacitance Output Capacitance Effective Output Capacitance, Charge Related Effective Output Capacitance, Energy Related Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-On Delay Time Current Rise Time Turn-Off Delay Time Current Fall Time Symbol VBR(DSS) ∆VBR(DSS)/∆TJ RDS(on) VGS(th) ∆VGS(th)/∆TJ IDSS IGSS Symbol IS ISM VSD trr Qrr Irrm dv/dt Symbol gfs Ciss Crss Coss Co(cr) Co(er) Qg Qgs Qgd td(on) tr td(off) tf 050-8084 Rev A 9-2006 AP42F50B_S