AP68255Q

AP68255Q DIODES | Alldatasheet

Document overview

• Manufacturer or author: Provided By alldatasheet.com(free datasheet download site)
• PDF pages: 18

Technical content

Features

• Qualified for Automotive Applications
• AEC-Q100 Qualified with the Following Results ▪ Device Temperature Grade 1: -40°C to +125°C TA ▪ Device HBM ESD Classification Level 1C ▪ Device CDM ESD Classification Level C5
• Functional Safety-Capable ISO26262 – Documentation Available to Aid Functional Safety System Design
• VIN 5.5V to 80V
• 1.2V ±1.5% VREF
• Continuous Output Current – AP68255Q: 2.5A – AP68355Q: 3.5A
• VOUT Adjustable from 1.2V to 50V
• Overcurrent Protection (OCP)
• Thermal Protection
• Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2)
• Halogen and Antimony Free. “Green” Device (Note 3)
• The AP68255Q/AP68355Q are suitable for automotive applications requiring specific change control; these parts are AEC-Q100 qualified, PPAP capable, and manufactured in IATF 16949 certified facilities. https://www.diodes.com/quality/product-definitions/ Pin Assignments

Applications

• General-purpose point-of-load DC/DC power conversion
• Automotive infotainment
• Telecommunication systems
• Distributed power systems
• Home audio devices
• Consumer electronics
• Network systems
• FPGA, DSP, and ASIC supplies
• Green electronics Notes: 1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS), 2011/65/EU (RoHS 2) & 2015/863/EU (RoHS 3) compliant . 2. See https://www.diodes.com/quality/lead-free/ for more information about Diodes Incorporated’s definitions of Halogen - and Antimony-free, "Green" and Lead-free. 3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and <1000ppm antimony compounds. SW BST GND VIN EN NC NC FB EPAD SO-8EP

© 2025 Copyright Diodes Incorporated. All Rights Reserved. ground plane for proper electrical/thermal operations. turn it off. Leave floating for automatic startup. The EN has a precision threshold of 1.25V for programing the UVLO. See Enable section for more details. NC 4, 6 Connect these NC pins to EPAD. the output voltage to this pin. The feedback regulation voltage is 1.2V. See “Setting the Output Voltage”. greater capacitor from SW to BST to power the high-side switch. from SW to the output load. Note that a capacitor is required from SW to BST to power the high-side switch. proper operation and optimized thermal performance. Figure 3. Functional Block Diagram

Document number: DS47151 Rev. 2 - 2 4 of 18 www.diodes.com September 2025 © 2025 Copyright Diodes Incorporated. All Rights Reserved. AP68255Q/AP68355Q Absolute Maximum Ratings (@ TA = +25° C, unless otherwise specified.) (Note 4) Symbol Parameter Rating Unit VIN Supply Voltage -0.3 to +110 V VSW Switch Node Voltage -1.0 to VIN +0.3 (DC) V VSW Switch Node Voltage -2.5 to VIN +5 (ns) V VBST Bootstrap Voltage VSW -0.3 to VSW +6.0 V VEN Enable/UVLO Voltage -0.3V to +6.0 V VFB Feedback Voltage -0.3V to +6.0 V TST Storage Temperature -65 to +150 °C TJ Junction Temperature +150 °C TL Lead Temperature +300 °C ESD Susceptibility (Note 5) HBM Human Body Model ± 1000 V CDM Charged Device Model ±1500 V Notes: 4. Stresses greater than the 'Absolute Maximum Ratings' specified above can cause permanent damage to the device. These are stress ratings only; functional operation of the device at these or any other conditions exceeding those indicated in this specification is not im plied. Device reliability can be affected by exposure to absolute maximum rating conditions for extended periods of time. 5. Semiconductor devices are ESD sensitive and can be damaged by exposure to ESD events. Suitable ESD precautions should be taken when handling and transporting these devices. Package Thermal Information (Note 6) Symbol Parameter Rating Unit RθJA Junction-to-Ambient Thermal Resistance SO-8EP 39 ° C/W RJC(top) Junction-to-Case (Top) Thermal Resistance SO-8EP 13 ° C/W RθJB Junction-to-Board Thermal Resistance SO-8EP 13 ° C/W ψJT Junction-to-Top Characterization Parameter SO-8EP 4.5 ° C/W ψJB Junction-to-Board Characterization Parameter SO-8EP 12.5 ° C/W RJC(bot) Junction-to-Case (Bottom) Thermal Resistance SO-8EP 3.5 ° C/W Note: 6. Device mounted on FR-4 substrate, 1” sq. PC board, 2oz copper, with minimum recommended pad layout. Recommended Operating Conditions (@TA = +25° C, unless otherwise specified.) (Note 7) Symbol Parameter Min Max Unit VIN Supply Voltage 5.5 80 V TJ Operating Junction Temperature Range -40 +150 °C Note: 7. The device function is not guaranteed outside of the recommended operating conditions.

Document number: DS47151 Rev. 2 - 2 5 of 18 www.diodes.com September 2025 © 2025 Copyright Diodes Incorporated. All Rights Reserved. AP68255Q/AP68355Q Electrical Characteristics (TA = +25° C, VIN = 48V, unless otherwise specified. Min/Max limits apply across the recommended junction temperature range, -40° C to +150° C, and input range from 5.5V to 80V, unless otherwise specified.) Symbol Parameter Test Conditions Min Typ Max Unit UVLO VIN Power On Reset Threshold — 4.7 5.0 5.3 V Hysteresis — — 440 — mV ISHDN Shutdown Supply Current VEN = 0V, VEN_LDO = 0V — 5.6 20 µA IQ Supply Current (Quiescent) VEN = Open, VEN_LDO = 0V, VBIAS = 0V, VBST - VSW = 5V, Non-Switching — 140 240 μA RDS(ON)1 High-Side Switch On-Resistance — — 500 950 mΩ ILIMIT HS Peak Current Limit VIN > 9V, AP68255Q 3.0 4.0 5.5 A VIN > 9V, AP68355Q 4.0 5.0 6.5 A ISW_LKG Switch Leakage Current VEN = 0V, VSW = 0V, VIN = 80V — — 5 μA fSW Oscillator Frequency — 260 300 340 kHz tOFF Minimum Off-Time — — 200 260 ns DMAX Maximum Duty Cycle (Note 8) — — 93 — % VFB Feedback Voltage — 1.182 1.200 1.218 V tSS Soft-Start Period — — 4 — ms VEN_TH EN Rising Threshold — — 1.25 — V Hysteresis — — 10 — mV IEN_L EN Pull-Up Current VEN = 0V — 0.3 — μA IEN_H EN Pull-Up Current VEN = 1.5V — 2.1 — μA VOVP % of VFB Rising Edge — 120 — % — — 115 — % TSHDN Thermal Shutdown (Note 8) — — +160 — °C THYS Thermal Hysteresis (Note 8) — — +20 — °C Note: 8. Compliance to the datasheet limits is assured by one or more methods: production test, characterization, and/or design.

Document number: DS47151 Rev. 2 - 2 10 of 18 www.diodes.com September 2025 © 2025 Copyright Diodes Incorporated. All Rights Reserved. AP68255Q/AP68355Q

Application Information

Pulse Width Modulation (PWM) Operation The AP68255Q/AP68355Q device is a 5.5V-to-80V input, 2.5A/3.5A output, EMI friendly, fully integrated non-synchronous buck converter. Refer to the block diagram in Figure 3. The device employs constant on-time control to provide fast transient response and easy loop stabilization. At the beginning of each cycle, the one -shot pulse turns on the high -side power MOSFET, Q1, for a fixed on -time, tON. This one-shot on-pulse timing is calculated by the converter’s input voltage and output voltage to maintain a pseudo -fixed frequency over the input voltage range. When Q1 is on, the inductor current rises linearly and the device charges the output capacitor. Q1 turns off after the fixed on -time expires, and the free-wheeling power Diode, D1, conducts. Once the output voltage drops below the output regulation, the one-shot timer is then reset and Q1 turns on again. The on-time is inversely proportional to the input voltage and directly proportional to the output voltage. It is calculated by the following equation: 𝐭𝐎𝐍 = 𝐕𝐎𝐔𝐓 𝐕𝐈𝐍 ∙ 𝐟𝐒𝐖 Eq. 1 Where:

• VIN is the input voltage
• VOUT is the output voltage
• fSW is the switching frequency The off-time duration is t OFF and starts after the on -time expires. The off-time expires when the feedback voltage decreases below the reference voltage, which then triggers the on-time duration to start again. The minimum off-time is 200ns typically. Power Diode Selection The AP68255Q/AP68355Q requires an external free-wheeling diode between SW and GND. The diode must have a reverse voltage rating equal to or greater than VIN maximum, preferably +25% higher. The peak current rating of the diode must be greater than the maximum peak inductor current. Schottky diodes are good choice for the power diode due to their low -forward voltage property , but careful consideration of its reverse leakage current. Enable and Disable When disabled, the device shutdown supply current is only 5.6μA. When applying a voltage greater than the EN logic high threshold (typical 1.22V, rising), the AP68255Q/AP68355Q enables all functions, and the device initiates the soft-start phase. An internal 0.3µ A pullup current source connected from the internal LDO-regulated VCC to the EN pin guarantees that if EN is left floating, the device is still automatically enabled once the voltage reaches the EN logic high threshold. The AP68255Q/AP68355Q has a built-in 4ms soft-start time to prevent output voltage overshot and inrush current. When the EN voltage falls below its logic low threshold (typical 1.24V, falling), the internal SS voltage discharges to ground and device operation is disabled. The EN pin can also be used to program the undervoltage lockout thresholds. Undervoltage lockout is implemented to prevent the IC from insufficient input voltages. The AP68255Q/AP68355Q device has a UVLO comparator that monitors the input voltage and the internal bandgap reference. The AP68255Q/AP68355Q is disabled if the input voltage falls below 3.6V. In this UVLO event, both the high-side and low-side power MOSFETs turn off. Some applications may desire higher VIN UVLO threshold voltages than is provided by the default setup. A 1.8µA hysteresis pullup current source on the EN pin along with an external resistive divider (R3 and R4) configures the VIN UVLO threshold voltages as shown in Figure 24. EN ON1.25V 0.3µA 20k 1.8µA VIN

Figure 24. Programming UVLO

Document number: DS47151 Rev. 2 - 2 11 of 18 www.diodes.com September 2025 © 2025 Copyright Diodes Incorporated. All Rights Reserved. AP68255Q/AP68355Q Application Information (continued) The resistive divider resistor values are calculated by: 𝐑𝟑 = 𝑽𝑶𝑵 − 𝑽𝑶𝑭𝑭 𝟐. 𝟏𝛍𝐀 Eq. 3 𝐑𝟒 = 𝐑𝟑 𝟎. 𝟖 ∙ 𝑽𝑶𝑵 − 𝟏 Eq. 4 Where:

• VON is the rising edge VIN voltage to enable the regulator and is greater than 5.3V
• VOFF is the falling edge VIN voltage to disable the regulator and is greater than 4.9V Current Limit Protection To reduce the total power dissipation and to protect the application, the AP68255Q/AP68355Q has cycle-by-cycle current limiting implementation. The voltage drops across the internal high-side MOSFET is sense and compared with the internally set current limit threshold. This voltage drop is sensed at about 200ns after the HS turns on. When the peak inductor current exceeds the current limit threshold, current limit protection activates. The device enters frequency foldback to help maintain output overcurrent threshold. This protection mode greatly reduces the power dissipated on the IC and reduces thermal stress to help protect the device. The AP68255Q/AP68355Q will reinitiate soft-start when the overcurrent situation is resolved. Thermal Shutdown If the junction temperature of the device reaches the thermal shutdown limit of +160° C, the AP68255Q/AP68355Q shuts down both its high-side and low-side power MOSFETs. When the junction temperature r educes to the required level ( +137° C typical), the device initiates a normal power-up cycle with soft-start. Power Derating Characteristics To prevent the regulator from exceeding the maximum recommended operating junction temperature, some thermal analysis is required. The regulator’s temperature rise is given by: 𝐓𝐑𝐈𝐒𝐄 = 𝐏𝐃 ∙ (𝛉𝐉𝐀) Eq. 4 Where:
• PD is the power dissipated by the regulator
• θJA is the thermal resistance from the junction of the die to the ambient temperature The junction temperature, TJ, is given by: 𝐓𝐉 = 𝐓𝐀 + 𝐓𝐑𝐈𝐒𝐄 Eq. 5 Where:
• TA is the ambient temperature of the environment

© 2025 Copyright Diodes Incorporated. All Rights Reserved. temperature of +150° C when considering the thermal design. Figure 25 shows a typical derating curve versus ambient temperature. Figure 25. Output Current Derating Curve vs. Ambient Temperature, VIN = 48V

Document number: DS47151 Rev. 2 - 2 14 of 18 www.diodes.com September 2025 © 2025 Copyright Diodes Incorporated. All Rights Reserved. AP68255Q/AP68355Q Application Information (continued) Inductor Calculating the inductor value is a critical factor in designing a buck converter. For most designs, the following equation can be used to calculate the inductor value: 𝐿 = 𝑉OUT ⋅ (𝑉IN − 𝑉OUT) 𝑉IN ⋅ ΔI𝐿 ⋅ 𝑓SW Where ΔI𝐿 is the inductor ripple current and fSW is the buck converter switching frequency. Choose the inductor ripple current to be 30% to 40% of the maximum load current. The maximum inductor peak current is calculated from: 𝐼𝐿(MAX) = 𝐼LOAD + ΔI𝐿 Peak current determines the required saturation current rating, which influences the size of the inductor. Saturating the inductor decreases the converter efficiency while increasing the temperatures of the inductor and the internal MOSFETs. Hence choosing an i nductor with appropriate saturation current rating is important. An inductor with a DC current rating of at least 25% higher than the maximum load current is recommended for most applications. For highest efficiency, the inductor’s DC resistance should be as low as possible. Use a larger inductance for improved efficiency under light load conditions. Output Capacitor The output capacitor keeps the output voltage ripple small, ensures feedback loop stability and reduces the overshoot of the output voltage. The output capacitor is a basic component for the fast response of the power supply. In fact, during load transient , for the first few microseconds it supplies the current to the load. The converter recognizes the load transient and sets the duty cycle to maximum, but the cur rent slope is limited by the inductor value. ESR of the output capacitor dominates the output voltage ripple. The amount of ripple can be approximate from the equation below: Voutcapacitor = ΔIL ∗ (ESR + 1 8fSW𝐶𝑂 An output capacitor with ample capacitance and low ESR is the best option. For most applications, a 22µ F ceramic capacitor will be sufficient. 𝐶𝑜 = 𝐿(𝐼out + ΔIL 2 )2 (Δ V + 𝑉out)2 − 𝑉out Where ΔV is the maximum output voltage overshoot. Diode Selection The AP68255Q/AP68355Q is a non-synchronous buck regulator which means it requires an external diode across SW to GND. The diode must have a reverse voltage rating equal to or greater than VIN. The current rating of the diode should be higher than the peak current of the inductor. The PDS5100Q, SDT5A100P5, and SDT8A120P5 Schottky diodes are good choices. Bootstrap The internal driver of the HS FET is equipped with a BST undervoltage detection (UV) circuit. If the voltage difference between BST and SW falls below 2V, the UV detection circuit allows a small 10Ω LS FET on for 400ns to recharge the bootstrap capacitor.

© 2025 Copyright Diodes Incorporated. All Rights Reserved.

1. The AP68255Q/AP68355Q is a high switching frequency converter. Hence, attention must be paid to the switching currents interference in the

and bottom layers is recommended.

1. Place the input capacitors as closely across VIN and GND as possible.
2. Place the inductor as close to SW as possible.
3. Place the output capacitors as close to GND as possible.
4. Place the feedback components as close to FB as possible.
5. If using four or more layers, use at least the 2nd and 3rd layers as GND to maximize thermal performance.
6. Add as many vias as possible around both the GND pin and under the GND plane for heat dissipation to all the GND layers.
7. Add as many vias as possible around both the VIN pin and under the VIN plane for heat dissipation to all the VIN layers.
8. See Figure 28 for more details.

Figure 28. PC Board Layout

Document number: DS47151 Rev. 2 - 2 16 of 18 www.diodes.com September 2025 © 2025 Copyright Diodes Incorporated. All Rights Reserved. AP68255Q/AP68355Q Ordering Information (Note 9) AP68 xx 5Q xx - 13 PackingPackage SP : SO-8EP 13 : Tape & Reel Output Current 25 : 2.5A 35 : 3.5A Orderable Part Number Output Current Package Code Package Identification Code Packing Qty. Carrier AP68255QSP-13 2.5A SP SO-8EP 68255Q 4000 13” Tape and Reel AP68355QSP-13 3.5A SP SO-8EP 68355Q 4000 13” Tape and Reel Note: 9. For packaging details, go to our website at https://www.diodes.com/design/support/packaging/diodes-packaging/. Marking Information SO-8EP 68x55Q (Top View) YY WW X X E Logo WW : Week : 01~52; 52 YY : Year : 19, 20, 21~ X X : Internal Code 8 7 6 5 1 2 3 4 represents 52 and 53 week E : SO-8EP Marking ID Identification Code 68255Q: 2.5A 68355Q: 3.5A YY: Year: 25, 26, 27~ WW: Week: 01 to 52;

52 Represents 52 and 53 Week

Document number: DS47151 Rev. 2 - 2 17 of 18 www.diodes.com September 2025 © 2025 Copyright Diodes Incorporated. All Rights Reserved. AP68255Q/AP68355Q Package Outline Dimensions Please see http://www.diodes.com/package-outlines.html for the latest version. SO-8EP SO-8EP Dim Min Max Typ A 1.40 1.50 1.45 A1 0.00 0.13 - b 0.30 0.50 0.40 C 0.15 0.25 0.20 D 4.85 4.95 4.90 E 3.80 3.90 3.85 E0 3.85 3.95 3.90 E1 5.90 6.10 6.00 e - - 1.27 F 2.75 3.35 3.05 H 2.11 2.71 2.41 L 0.62 0.82 0.72 N - - 0.35 Q 0.60 0.70 0.65 All Dimensions in mm Suggested Pad Layout Please see http://www.diodes.com/package-outlines.html for the latest version. SO-8EP Dimensions Value (in mm) C 1.270 X 0.802 X1 3.502 X2 4.612 Y 1.505 Y1 2.613 Y2 6.500 Mechanical Data

• Moisture Sensitivity: Level 1 per J-STD-020
• Terminals: Finish – Matte Tin Plated Leads, Solderable per MIL-STD-202, Method 208
• Weight: 0.081 grams (Approximate) b e E1A 9° ( All side) 4° ±3° C Q N 45° R 0.1 D E L Seating Plane Gauge Plane F H EXPOSED PAD C X Y

Document number: DS47151 Rev. 2 - 2 18 of 18 www.diodes.com September 2025 © 2025 Copyright Diodes Incorporated. All Rights Reserved. AP68255Q/AP68355Q IMPORTANT NOTICE 1. DIODES INCORPORATED (Diodes) AND ITS SUBSIDIARIES MAKE NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARDS TO ANY INFORMATION CONTAINED IN THIS DOCUMENT, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICUL AR PURPOSE OR NON -INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION). 2. The Information contained herein is for informational purpose only and is provided only to illustrate the operation of Diodes ’ products described herein and application examples. Diodes does not assume any liability arising out of the application or use of this document or any product described herein. This document is intended for skilled and technically trained engineering customers and users who design with Diodes’ products. Diodes’ products may be used to facilitate safety-related applications; however, in all instances customers and users are responsible for (a) selecting the appropriate Diodes products for their applications, (b) evaluating the suitability of Diodes’ products for their intended applications, (c) ensuring their applications, which in corporate Diodes’ products, comply the applicable legal and regulatory requirements as well as safety and functional - safety related standards, and (d) ensuring they design with appropriate safeguards (including testing, validation, quality co ntrol techniqu es, redundancy, malfunction prevention, and appropriate treatment for aging degradation) to minimize the risks associated with their applications. 3. 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