AP62200 DIODES | Alldatasheet
Document overview
- Manufacturer or author: Diodes Incorporated
- PDF pages: 23
Technical content
Features
VIN: 4.2V to 18V Output Voltage (VOUT): 0.8V to 7V 2A Continuous Output Current 0.8V ± 1% Reference Voltage (TA = +25° C) AP62200 and AP62201 0.763V ± 1% Reference Voltage (TA = +25° C) AP62200T 135μA Low Quiescent Current (Pulse Frequency Modulation) 750kHz Switching Frequency (VIN = 12V, VOUT = 5V) Up to 84% Efficiency at 5mA Light Load Proprietary Gate Driver Design for Best EMI Reduction Protection Circuitry Undervoltage Lockout (UVLO) Cycle-by-Cycle Valley Current Limit Thermal Shutdown Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2) Halogen and Antimony Free. “Green” Device (Note 3) For automotive applications requiring specific change control (i.e. parts qualified to AEC-Q100/101/200, PPAP capable, and manufactured in IATF 16949 certified facilities), please contact us or your local Diodes representative. https://www.diodes.com/quality/product-definitions/ Pin Assignments 3 4 6GND SW VIN FB EN BST TSOT26 (Standard) (Top View) 3 4 6 FB EN BSTGND SW VIN SOT563 (Standard) (Top View)
Applications
5V and 12V Distributed Power Bus Supplies Flat Screen TV Sets and Monitors White Goods and Small Home Appliances FPGA, DSP, and ASIC Supplies Home Audio Network Systems Gaming Consoles Consumer Electronics General Purpose Point of Load Notes: 1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS), 2011/65/EU (RoHS 2) & 2015/863/EU (RoHS 3) compliant. 2. See https://www.diodes.com/quality/lead-free/ for more information about Diodes Incorporated’s definitions of Halogen - and Antimony-free, "Green" and Lead-free. 3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and <1000ppm antimony compounds.
the switching of the IC. See Input Capacitor section for more details. filter from SW to the output load. capacitor is recommended from BST to SW to power the high-side driver. the UVLO. See Enable section for more details. Setting the Output Voltage section for more details. Figure 4. Functional Block Diagram
Document number: DS41957 Rev. 4 - 2 4 of 23 www.diodes.com January 2021 © Diodes Incorporated AP62200/AP62201/AP62200T Absolute Maximum Ratings (Note 4) (@ TA = +25° C, unless otherwise specified.) Symbol Parameter Rating Unit VIN Supply Pin Voltage -0.3 to +20.0 (DC) V -0.3 to +22.0 (400ms) VSW Switch Pin Voltage -1.0 to VIN + 0.3 (DC) V -2.5 to VIN + 2.0 (20ns) VBST Bootstrap Pin Voltage VSW - 0.3 to VSW + 6.0 V VEN Enable/UVLO Pin Voltage -0.3 to +6.0 V VFB Feedback Pin Voltage -0.3 to +6.0 V TSTG Storage Temperature -65 to +150 °C TJ Junction Temperature +160 °C TL Lead Temperature +260 °C ESD Susceptibility (Note 5) HBM Human Body Model ±2000 V CDM Charged Device Model ±500 V Notes: 4. Stresses greater than the Absolute Maximum Ratings specified above can cause permanent damage to the device. These are stress ratings only; functional operation of the device at these or any other conditions exceeding those indicated in this specification is not im plied. Device reliability can be affected by exposure to absolute maximum rating conditions for extended periods of time. 5. Semiconductor devices are ESD sensitive and can be damaged by exposure to ESD events. Suitable ESD precautions should be taken when handling and transporting these devices. Thermal Resistance (Note 6) Symbol Parameter Rating Unit θJA Junction to Ambient SOT563 (Standard) 110 ° C/W TSOT26 (Standard) 70 θJC Junction to Case SOT563 (Standard) 8 ° C/W TSOT26 (Standard) 12 Note: 6. Test condition for SOT563 (Standard)/TSOT26 (Standard): Device mounted on FR-4 substrate, two-layer PCB, 2oz copper, with minimum recommended pad layout. Recommended Operating Conditions (Note 7) (@ TA = +25°C, unless otherwise specified.) Symbol Parameter Min Max Unit VIN Supply Voltage 4.2 18.0 V VOUT Output Voltage 0.8 7.0 V TA Operating Ambient Temperature -40 +85 °C TJ Operating Junction Temperature -40 +125 °C Note: 7. The device function is not guaranteed outside of the recommended operating conditions.
Document number: DS41957 Rev. 4 - 2 5 of 23 www.diodes.com January 2021 © Diodes Incorporated AP62200/AP62201/AP62200T Electrical Characteristics (@ TJ = +25° C, VIN = 12V, unless otherwise specified. Min/Max limits apply across the recommended operating junction temperature range, -40° C to +125° C, and input voltage range, 4.2V to 18V, unless otherwise specified.) Symbol Parameter Conditions Min Typ Max Unit ISHDN Shutdown Supply Current VEN = 0V — 1.3 — μA IQ Quiescent Supply Current AP62200/AP62200T: VFB = 0.85V — 135 — μA AP62201: VFB = 0.85V — 270 — μA POR VIN Power-on Reset Rising Threshold — — 3.90 4.15 V UVLO VIN Undervoltage Lockout Falling Threshold — — 3.6 — V RDS(ON)1 High-Side Power MOSFET On-Resistance (Note 8) — — 90 — mΩ RDS(ON)2 Low-Side Power MOSFET On-Resistance (Note 8) — — 65 — mΩ IVALLEY_LIMIT LS Valley Current Limit (Note 8) From source to drain 2.0 2.4 2.8 A fSW Oscillator Frequency VOUT = 5V, CCM — 750 — kHz tON_MIN Minimum On-Time — — 90 — ns tOFF_MIN Minimum Off-Time — — 220 — ns VFB Feedback Voltage AP62200/AP62201: TA = +25° C, CCM 0.792 0.800 0.808 V AP62200/AP62201: CCM 0.784 0.800 0.816 V AP62200T: TA = +25° C, CCM 0.755 0.763 0.770 V AP62200T: CCM 0.747 0.763 0.778 V VEN_H EN Logic High Threshold — — 1.20 1.25 V VEN_L EN Logic Low Threshold — 1.04 1.10 — V IEN EN Input Current VEN = 1.5V — 7.0 — μA VEN = 1V 1.0 1.5 2.0 μA tSS Soft-Start Time — — 2.5 — ms TSD Thermal Shutdown (Note 8) — — +160 — °C THys Thermal Shutdown Hysteresis (Note 8) — — +20 — °C Note: 8. Compliance to the datasheet limits is assured by one or more methods: production test, characterization, and/or design.
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Application Information
1 Pulse Width Modulation (PWM) Operation
The AP62200/AP62201/AP62200T device is a 4.2V -to-18V input, 2A output, EMI friendly, fully integrated synchronous buck converter. Refer to the block diagram in Figure 4. The device employs constant on-time control to provide fast transient response and easy loop stabilization. At the beginning of each cycle, the one-shot pulse turns on the high-side power MOSFET, Q1, for a fixed on-time, tON. This one-shot on-pulse timing is calculated by the converter’s input voltage and output voltage to maintain a pseudo-fixed frequency over the input voltage range. When Q1 is on, the inductor current rises linearly and the device charges the output capacitor. Q1 turns off after the fixed on -time expires, and the low-side power MOSFET, Q2, turns on. Once the output voltage drops below the output regulation, Q2 turns off. The one-shot timer is then reset and Q1 turns on again. The on-time is inversely proportional to the input voltage and directly proportional to the output voltage. It is calculated by the following equation: 𝐭𝐎𝐍 = 𝐕𝐎𝐔𝐓 𝐕𝐈𝐍 ∙ 𝐟𝐒𝐖 Eq. 1 Where: VIN is the input voltage VOUT is the output voltage fSW is the switching frequency The off-time duration is tOFF and starts after the on -time expires. The off-time expires when the feedback voltage decreases below the reference voltage, which then triggers the on-time duration to start again. The minimum off-time is 220ns typical. In order to provide a small output ripple during light load conditions, the AP62201 operates in PWM regardless of output load.
2 Pulse Frequency Modulation (PFM) Operation
The AP62200/AP62200T enters PFM operation at light load con ditions for high efficiency. During light load conditions, the regulator automatically reduces the switching frequency. As the output current decreases, so too does the inductor current. The inductor current, IL, eventually reaches 0A, marking the boundary between Continuous Conduction Mode (CCM) and Discontinuous Condition Mode (DCM). During this time, both Q1 and Q2 are off, and the load current is provid ed only by the output capacitor. When VFB becomes lower than 0.8V for AP62200 or 0.763V for AP62200T, the next cycle begins , and Q1 turns on. Because the AP62200/AP62200T works in PFM during light load conditions, it can achieve power efficiency of up to 84% at a 5mA load condition. Likewise, as the output load increases from light load to heavy load, the switching frequency increases to maintain the regul ation of the output voltage. The transition point between light and heavy load conditions can be calculated using the following equation: 𝐈𝐋𝐎𝐀𝐃 = (𝐕𝐈𝐍 − 𝐕𝐎𝐔𝐓 𝟐𝐋 ) ∙ 𝐭𝐎𝐍 Eq. 2 Where: L is the inductor value The quiescent current of AP62200/AP62200T is 135μA typical under a no-load, non-switching condition.
3 Enable
When disabled, the device shutdown supply current is only 1.3μA. When applying a voltage greater than the EN logic high threshold (typical 1.2V, rising), the AP62200/AP62201/AP62200T enables all functions and the device initiates the soft-start phase. An internal 1.5µ A pull-up current source connected from the internal LDO -regulated VCC to the EN pin guarantees that if EN is left floating, the device still automatically enables once the voltage reaches the EN logic high threshold. The AP62200/AP62201/AP62200T has a built-in 2.5ms soft-start time to prevent output voltage overshoot and inrush current. When the EN voltage falls below its logic low threshold (typical 1.1V, falling ), the internal SS voltage discharges to ground and device operation disables. The EN pin can also be used to program the undervoltage lockout thresholds. See Undervoltage Lockout (UVLO) section for more details.
3 Enable (continued)
4 Electromagnetic Interference (EMI) Reduction with Ringing-Free Switching Node
as the converter’s power efficiency.
5 Adjusting Undervoltage Lockout (UVLO)
falls below 3.6V. In this UVLO event, both the high-side and low-side power MOSFETs turn off. source on the EN pin along with an external resistive divider (R3 and R4) configures the VIN UVLO threshold voltages as shown in Figure 39. Figure 39. Programming UVLO
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6 Overcurrent Protection (OCP)
The AP62200/AP62201/AP62200T has cycle-by-cycle valley current limit protection by sensing the current through the internal low -side power MOSFET, Q2. While Q2 is on, the internal sensing circuitry monitors its conduction current. The overcurrent limit has a corresponding voltage limit, VLIMIT. When the voltage between GND and SW is lower than V LIMIT due to excessive current through Q2, the OCP triggers, and the control ler turns off Q2. During this time, both Q1 and Q2 remain off. A new switching cycle begins only when the voltage between GND and SW rises above VLIMIT. If Q2 consistently hits the valley current limit for 2.5ms, the buck converter enters hiccup mode and s huts down. After 20ms of down time, the buck converter restarts powering up. Hiccup mode reduces the power dissipation in the overcurrent condition. Because the RDS(ON) values of the power MOSFETs increase with temperature, VLIMIT has a temperature coefficient of 0.4%/° C to compensate for the temperature dependency of RDS(ON).
7 Thermal Shutdown (TSD)
If the junction temperature of the device reaches the thermal shutdown limit of +160° C, the AP62200/AP62201/AP62200T shuts down bo th its high-side and low -side power MOSFETs. When the junction temperature reduces to the required level ( +140° C typical), the device initiates a normal power-up cycle with soft-start.
8 Power Derating Characteristics
To prevent the regulator from exceeding the maximum recommended operating junction temperature, some thermal analysis is required. The regulator’s temperature rise is given by: 𝐓𝐑𝐈𝐒𝐄 = 𝐏𝐃 ∙ (𝛉𝐉𝐀) Eq. 6 Where: PD is the power dissipated by the regulator θJA is the thermal resistance from the junction of the die to the ambient temperature The junction temperature, TJ, is given by: 𝐓𝐉 = 𝐓𝐀 + 𝐓𝐑𝐈𝐒𝐄 Eq. 7 Where: TA is the ambient temperature of the environment
8 Power Derating Characteristics (continued)
Figure 41 show typical derating curves versus ambient temperature. Figure 40. Output Current Derating Curve vs. Ambient Temperature, SOT563 (Standard) Package, VIN = 12V Figure 41. Output Current Derating Curve vs. Ambient Temperature, TSOT26 (Standard) Package, VIN = 12V
9 Setting the Output Voltage
voltage accuracy. There is less current consumption in the feedback ne twork for high resistor values , which improves efficiency at light loads . Table 1 shows a list of recommended component selections for common AP62200/AP62201/AP62200T output voltages referencing Figure 1. Consult Diodes Incorporated for other output voltage requirements. Table 1. Recommended Component Selections
10 Inductor
For AP62200/AP62201/AP62200T, choose ∆IL to be 30% to 50% of the maximum load current of 2A. than 50mΩ. Use a larger inductance for improved efficiency under light load conditions.
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11 Input Capacitor
The input capacitor reduces both the surge current drawn from the input supply as well as the switching noise from the device. The input capacitor must sustain the ripple current produced during the on -time of Q1. It must have a low ESR to minimize power dissipation due to the RMS input current. The RMS current rating of the input capacitor is a critical parameter and must be higher than the RMS input current. As a rul e of thumb, select an input capacitor with an RMS current rating greater than half of the maximum load current. Due to large dI/dt through the input capacitor, electrolytic or ceramic capacitors with low ESR should be used. If using a tantalum capacitor, it must be surge protected or else capacitor failure could occur. Using a ceramic capacitor of 10µ F or greater is sufficient for most applications.
12 Output Capacitor
The output capacitor keeps the output voltage ripple small, ensures feedback loop stability, and reduces both the overshoots and undershoots of the output voltage during load transients. During the first few micro seconds of an increasing load transient, the converter recognizes the change from steady-state and sets the off -time to minimum to supply more current to the load. However, the inductor lim its the change to increasing current depending on its inductance. Therefore, the output capacitor supplies the difference in current to the load during this time. Likewise, during the first few microseconds of a decreasing load transient, the converter recognizes the change from steady -state and increases the off -time to reduce the current supplied to the load . However, the inductor limits the change in decreasing current as well. Therefore, the output capacitor absorbs the excess current from the inductor during this time. The effective output capacitance, COUT, requirements can be calculated from the equations below. The ESR of the output capacitor dominates the output voltage ripple. The amount of ripple can be calculated by: 𝐕𝐎𝐔𝐓𝐑𝐢𝐩𝐩𝐥𝐞 = ∆𝐈𝐋 ∙ (𝐄𝐒𝐑 + 𝟏 𝟖 ∙ 𝐟𝐬𝐰 ∙ 𝐂𝐎𝐔𝐓) Eq. 11 An output capacitor with large capacitance and low ESR is the best option. For most applications, a 22µ F to 68µ F ceramic capacitor is sufficient. To meet the load transient requirements, the calculated COUT should satisfy the following inequality: 𝐂𝐎𝐔𝐓 > 𝐦𝐚𝐱 ( 𝐋 ∙ 𝐈𝐓𝐫𝐚𝐧𝐬 ∆𝐕𝐎𝐯𝐞𝐫𝐬𝐡𝐨𝐨𝐭 ∙ 𝐕𝐎𝐔𝐓 , 𝐋 ∙ 𝐈𝐓𝐫𝐚𝐧𝐬 ∆𝐕𝐔𝐧𝐝𝐞𝐫𝐬𝐡𝐨𝐨𝐭 ∙ (𝐕𝐈𝐍 − 𝐕𝐎𝐔𝐓)) Eq. 12 Where: ITrans is the load transient ∆VOvershoot is the maximum output overshoot voltage ∆VUndershoot is the maximum output undershoot voltage
13 Bootstrap Capacitor
To ensure proper operation, a ceramic capacitor must be connected between the BST and SW pins to supply the drive voltage for the high -side power MOSFET. A 100nF ceramic capacitor is sufficient.
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Ordering Information
7 : Tape & Reel0 : AP62200 1 : AP62201 0T : AP62200T PackingProduct Version Z6 : SOT563 (Standard) WU : TSOT26 (Standard) Package Part Number Operation Mode VFB (V) Package Code Tape and Reel Quantity Part Number Suffix AP62200Z6-7 PFM/PWM 0.800 Z6 3000 -7 AP62200WU-7 PFM/PWM 0.800 WU 3000 -7 AP62201Z6-7 PWM Only 0.800 Z6 3000 -7 AP62201WU-7 PWM Only 0.800 WU 3000 -7 AP62200TWU-7 PFM/PWM 0.763 WU 3000 -7 Marking Information SOT563 (Standard)/TSOT26 (Standard) 1 2 3 XX Y W X XX : Identification Code Y : Year 0~9 X : Internal Code ( Top View ) W : Week : A~Z : 1~26 week; a~z : 27~52 week; z represents 52 and 53 week Part Number Package Identification Code AP62200Z6-7 SOT563 (Standard) HA AP62200WU-7 TSOT26 (Standard) HB AP62201Z6-7 SOT563 (Standard) HS AP62201WU-7 TSOT26 (Standard) HT AP62200TWU-7 TSOT26 (Standard) TN
Document number: DS41957 Rev. 4 - 2 21 of 23 www.diodes.com January 2021 © Diodes Incorporated AP62200/AP62201/AP62200T Package Outline Dimensions Please see http://www.diodes.com/package-outlines.html for the latest version. SOT563 (Standard) SOT563 (Standard) Dim Min Max Typ A 0.53 0.60 — b 0.15 0.30 0.20 c 0.10 0.18 0.11 D 1.50 1.70 1.60 E 1.50 1.70 1.60 E1 1.10 1.30 1.20 e 0.50 BSC L 0.10 0.30 0.20 All Dimensions in mm TSOT26 (Standard) TSOT26 (Standard) Dim Min Max Typ A — 1.00 — A1 0.00 0.10 — A2 0.75 0.90 0.80 D 2.70 3.10 2.90 E 2.60 3.00 2.80 E1 1.50 1.70 1.60 b 0.30 0.50 0.44 c 0.11 0.20 0.16 e 0.95 BSC L 0.30 0.50 0.40 L2 0.25 BSC θ 0° 8° 4° All Dimensions in mm b E1E e A c L O P T IO N A ( T O P V IE W ) O P T IO N B ( T O P V IE W ) O P T IO N A ( S ID E V IE W ) O P T IO N B ( S ID E V IE W ) D D E 1 /2 E E /2 e A S e a tin g P la n e0 L G a u g e P la n e c b S e a tin g P la n e O P T IO N A ( T O P V IE W ) O P T IO N B ( T O P V IE W ) O P T IO N A ( S ID E V IE W ) O P T IO N B ( S ID E V IE W )
Document number: DS41957 Rev. 4 - 2 22 of 23 www.diodes.com January 2021 © Diodes Incorporated AP62200/AP62201/AP62200T Suggested Pad Layout Please see http://www.diodes.com/package-outlines.html for the latest version. SOT563 (Standard) Dimensions Value (in mm) C 0.500 C1 1.270 G 0.600 X 0.300 X1 1.300 Y 0.670 Y1 1.940 TSOT26 (Standard) Dimensions Value (in mm) C 0.950 X 0.700 Y 1.000 Y1 3.200 Mechanical Data SOT563 (Standard) Moisture Sensitivity: Level 1 per J-STD-020 Terminals: Finish – Matte Tin Plated Leads, Solderable per MIL-STD-202, Method 208 Weight: 0.003 grams (Approximate) TSOT26 (Standard) Moisture Sensitivity: Level 1 per J-STD-020 Terminals: Finish – Matte Tin Plated Leads, Solderable per MIL-STD-202, Method 208 Weight: 0.013 grams (Approximate) Y C G X C X Y
Document number: DS41957 Rev. 4 - 2 23 of 23 www.diodes.com January 2021 © Diodes Incorporated AP62200/AP62201/AP62200T IMPORTANT NOTICE 1. DIODES INCORPORATED AND ITS SUBSIDIARIES (“DIODES”) MAKE NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARDS TO ANY INFORMATION CONTAINED IN THIS DOCUMENT, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTIC ULAR PURPOSE OR NON -INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION). 2. The Information contained herein is for informational purpose only and is provided only to illustrate the operati on of Diodes products described herein and application examples. Diodes does not assume any liability arising out of the application or use of this document or any product described herein. This document is intended for skilled and technically trained engi neering customers and users who design with Diodes products. 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