AP61204QZ6-7

AP61204Q DIODES | Alldatasheet

Document overview

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Technical content

Features

 AEC-Q100 Qualified for Automotive Applications  Device Temperature Grade 1: -40°C to +125°C TA Range  VIN: 2.4V to 5.5V  Output Voltage (VOUT): 0.6V to VIN  2A Continuous Output Current  0.6V ± 2% Reference Voltage  19μA Low Quiescent Current (Pulse-Frequency Modulation)  2.4MHz Switching Frequency (VIN = 5V, VOUT = 1.8V)  Up to 84% Efficiency at 5mA Light Load  Programmable Operation Mode Through EN  Pulse-Frequency Modulation  Pulse-Width Modulation Regardless of Output Load  Low-Dropout (LDO) Mode  Power-Good Indicator  Protection Circuitry  Undervoltage Lockout (UVLO)  VIN Overvoltage Protection (OVP)  Peak Current Limit  Valley Current Limit  Thermal Shutdown  Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2)  Halogen and Antimony Free. “Green” Device (Note 3)  The AP61204Q is suitable for automotive applications requiring specific change control; this part is AEC-Q100 qualified, PPAP capable, and manufactured in IATF 16949 certified facilities. https://www.diodes.com/quality/product-definitions/ Pin Assignments 3 4 6 PG EN SWVIN GND FB SOT563 AP61204Q

Applications

 Automotive power systems  Automotive infotainment  Automotive instrument clusters  Automotive telematics  Advanced driver assistance systems Notes: 1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS), 2011/65/EU (RoHS 2) & 2015/863/EU (RoHS 3) compliant. 2. See https://www.diodes.com/quality/lead-free/ for more information about Diodes Incorporated’s definitions of Halogen - and Antimony-free, "Green" and Lead-free. 3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and <1000ppm antimony compounds.

© 2024 Copyright Diodes Incorporated. All Rights Reserved. FB 1 Feedback sensing terminal for the output voltage. Connect this pin to the resistive divider of the output. See Setting the Output Voltage section for more details. the switching of the IC. See Input Capacitor section for more details. filter from SW to the output load. regulation limits or during soft-start.

2 GND

5 Shutdown

Figure 4. Functional Block Diagram

Document number: DS45412 Rev. 2 - 2 4 of 21 www.diodes.com January 2024 © 2024 Copyright Diodes Incorporated. All Rights Reserved. AP61204Q Absolute Maximum Ratings (Note 4) (@ TA = +25°C, unless otherwise specified.) Symbol Parameter Rating Unit VIN Supply Pin Voltage -0.3 to +6.5 (DC) V VFB Feedback Pin Voltage -0.3 to VIN + 0.3 V VSW Switch Pin Voltage -1.0 to VIN + 0.3 (DC) V -2.5 to VIN + 2.0 (20ns) VEN Enable Pin Voltage -0.3 to VIN + 0.3 V VPG Power-Good Pin Voltage -0.3 to +6.0 (DC) V TST Storage Temperature -65 to +150 °C TJ Junction Temperature +160 °C TL Lead Temperature +260 °C ESD Susceptibility (Note 5) HBM Human Body Model ±4000 V CDM Charged Device Model ±1500 V Notes: 4. Stresses greater than those listed under Absolute Maximum Ratings can cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to Absolute Maximum Ratings for extended periods can affect device reliability. 5. Semiconductor devices are ESD sensitive and can be damaged by exposure to ESD events. Suitable ESD precautions should be taken when handling and transporting these devices. Thermal Resistance (Note 6) Symbol Parameter JEDEC (Note 6) EVM (Note 7) Unit θJA Junction to Ambient 141 60 °C/W θJC Junction to Case 33 33 °C/W Notes: 6. Test condition for SOT563: device mounted on FR-4 substrate, two-layer PCB, 2oz copper, with minimum recommended pad layout. 7. Device mounted on Diodes Incorporated’s evaluation board. Recommended Operating Conditions (Note 8) (@ TA = +25°C, unless otherwise specified.) Symbol Parameter Min Max Unit VIN Supply Voltage 2.4 5.5 V VOUT Output Voltage 0.6 VIN V TJ Operating Junction Temperature -40 +150 °C Note: 8. The device function is not guaranteed outside of the recommended operating conditions.

Document number: DS45412 Rev. 2 - 2 5 of 21 www.diodes.com January 2024 © 2024 Copyright Diodes Incorporated. All Rights Reserved. AP61204Q Electrical Characteristics (@ TJ = +25°C, VIN = 5V, unless otherwise specified. Min/Max limits apply across the recommended operating junction temperature range, -40°C to +150°C, and input-voltage range, 2.4V to 5.5V, unless otherwise specified.) Symbol Parameter Conditions Min Typ Max Unit ISHDN Shutdown Supply Current VEN = 0V — 0.1 — μA IQ Quiescent Supply Current PFM, VFB = 0.65V — 19 — μA PWM, VFB = 0.65V — 690 — μA POR VIN Power-on Reset Rising Threshold — — 2.3 2.4 V UVLO VIN Undervoltage Lockout Falling Threshold — — 2.2 — V OVPVIN VIN Overvoltage Rising Threshold — — 6.3 — V OVPVIN_HYS VIN Overvoltage Hysteresis — — 300 — mV RDS(ON)1 High-Side Power MOSFET On-Resistance (Note 9) — — 70 — mΩ RDS(ON)2 Low-Side Power MOSFET On-Resistance (Note 9) — — 50 — mΩ IPEAK_LIMIT HS Peak Current Limit (Note 9) From Source to Drain 2.4 3.0 3.6 A IVALLEY_LIMIT LS Valley Current Limit (Note 9) From Source to Drain — 2.6 — A fSW Oscillator Frequency VOUT = 1.8V, CCM 1.9 2.4 2.9 MHz tON_MIN Minimum On-Time — — 70 — ns tOFF_MIN Minimum Off-Time — — 70 — ns VFB Feedback Voltage CCM 0.588 0.600 0.612 V VEN_H EN Logic-High Threshold — — 0.91 — V VEN_L EN Logic-Low Threshold — — 0.83 — V tSS Soft-Start Time — — 0.5 — ms PGUV_FALL Undervoltage Falling Threshold Percent of Output Regulation, Fault — 90 — % PGUV_RISE Undervoltage Rising Threshold Percent of Output Regulation, Good — 95 — % PGOV_RISE Overvoltage Rising Threshold Percent of Output Regulation, Fault — 110 — % PGOV_FALL Overvoltage Falling Threshold Percent of Output Regulation, Good — 105 — % tPG_RD Power-Good Falling Delay Time — — 40 — μs VPG_OL Power-Good Output Logic Low IPG = -1mA — — 0.4 V RPG Power-Good Pullup Resistor — — 5 — MΩ TSD Thermal Shutdown (Note 9) — — +160 — °C THys Thermal Shutdown Hysteresis (Note 9) — — +30 — °C Note: 9. Compliance to the datasheet limits is assured by one or more methods: production test, characterization, and/or design.

Document number: DS45412 Rev. 2 - 2 13 of 21 www.diodes.com January 2024 © 2024 Copyright Diodes Incorporated. All Rights Reserved. AP61204Q

Application Information

1 Pulse-Width Modulation (PWM) Operation

The AP61204Q device is an automotive-compliant, 2.4V-to-5.5V input, 2A output, fully integrated synchronous buck converter. Refer to the block diagram in Figure 4. The device employs constant on-time control to provide fast transient response and easy loop stabilization. At the beginning of each cycle, the one-shot pulse turns on the high-side power MOSFET, Q1, for a fixed on-time, tON. This one-shot on-pulse timing is calculated by the converter’s input volt age and output voltage to maintain a pseudo -fixed frequency over the input -voltage range. When Q1 is on, the inductor current rises linearly and the device charges the output capacitor. Q1 turns off after the fixed on-time expires, and the low-side power MOSFET, Q2, turns on. Once the output voltage drops below the output regulation, Q2 turns off. The one-shot timer is then reset and Q1 turns on again. The on- time is inversely proportional to the input voltage and directly proportional to the output voltage. It is calculated by the following equation: 𝐭𝐎𝐍 = 𝐕𝐎𝐔𝐓 𝐕𝐈𝐍 ∙ 𝐟𝐒𝐖 Eq. 1 Where:  VIN is the input voltage  VOUT is the output voltage  fSW is the switching frequency The off-time duration is tOFF and starts after the on -time expires. The off-time expires when the feedback voltage decreases below the reference voltage, which then triggers the on-time duration to start again. The minimum off-time is 70ns typical.

2 Pulse-Frequency Modulation (PFM) Operation

The AP61204Q can be programmed to enter PFM operation at light-load conditions for high efficiency. During light-load conditions, the regulator automatically reduces the switching frequency. As the output current decreases, so too does the inductor current. The inductor current, IL, eventually reaches 0A, marking the boundary between Continuous Conduction Mode (CCM) and Discontinuous Condition Mode (DCM). During this time, both Q1 and Q2 are off, and the load current is provided only by the output capacitor. When VFB becomes lower than 0.6V, the next cycle begins, and Q1 turns on. Because the AP61204Q can work in PFM during light-load conditions, it can achieve power efficiency of up to 84% at a 5mA load condition. Likewise, as the output load increases from light load to heavy load, the switching frequency increases to maintain the regul ation of the output voltage. The transition point between light and heavy-load conditions can be calculated using the following equation: 𝐈𝐋𝐎𝐀𝐃 = (𝐕𝐈𝐍 − 𝐕𝐎𝐔𝐓 𝟐𝐋 ) ∙ 𝐭𝐎𝐍 Eq. 2 Where:  L is the inductor value The quiescent current of AP61204Q is 19μA typical under a no-load, non-switching condition.

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3 Enable

discharges to ground and the device operation is disabled. to achieve this threshold condition. resistive divider to create a difference in voltage between the VIN and EN pins is sufficient to achieve this threshold condition. Figure 40. Example Application Circuit for Forced PWM Operation

4 Power-Good (PG) Indicator

falling edge transition is delayed by 40μs. The PG pin is connected to VIN through an internal 5MΩ pullup resistor.

5 Undervoltage Lockout (UVLO) and Input Overvoltage Protection (OVP)

the output voltage to ground.

Document number: DS45412 Rev. 2 - 2 15 of 21 www.diodes.com January 2024 © 2024 Copyright Diodes Incorporated. All Rights Reserved. AP61204Q Application Information (continued)

6 Overcurrent Protection (OCP)

The AP61204Q has cycle-by-cycle valley current limit protection by sensing the current through the internal low-side power MOSFET, Q2. While Q2 is on, the internal sensing circuitry monitors its conduction current. The overcurrent limit has a corresponding voltage limit, VLIMIT. When the voltage between GND and SW is lower than V LIMIT due to excessive current through Q2, the OCP is triggered, and the controller turns off Q2. During this time, both Q1 and Q2 remain off. A new switching cycle begins only when the voltage between GND and SW rises above VLIMIT. If Q2 consistently hits the valley current limit for 0.6ms, the buck converter enters hiccup mode and shuts down. After 3.4ms of down time, the buck converter restarts powering up. Hiccup mode reduces the power dissipation in the overcurrent condition. The AP61204Q also has cycle -by-cycle peak current limit protection by sensing the current through the internal high -side power MOSFET, Q1, through a similar mechanism as the cycle-by-cycle valley current limit protection. Because the RDS(ON) values of the power MOSFETs increase with temperature, VLIMIT has a temperature coefficient of 0.4%/°C to compensate for the temperature dependency of RDS(ON).

7 Thermal Shutdown (TSD)

If the junction temperature of the device reaches the thermal shutdown limit of +160°C, the AP61204Q shuts down both its high-side and low-side power MOSFETs. When the junction temperature reduces to the required level ( +130°C typical), the device initiates a normal power-up cycle with soft-start.

8 Power Derating Characteristics

To prevent the regulator from exceeding the maximum recommended operating junction temperature, some thermal analysis is requ ired. The regulator’s temperature rise is given by: 𝐓𝐑𝐈𝐒𝐄 = 𝐏𝐃 ∙ (𝛉𝐉𝐀) Eq. 3 Where:  PD is the power dissipated by the regulator  θJA is the thermal resistance from the junction of the die to the ambient temperature The junction temperature, TJ, is given by: 𝐓𝐉 = 𝐓𝐀 + 𝐓𝐑𝐈𝐒𝐄 Eq. 4 Where:  TA is the ambient temperature of the environment For the SOT563 package, the θJA is 141°C/W. The actual junction temperature should not exceed the maximum recommended operating junction temperature of +150°C when considering the thermal design.

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9 Setting the Output Voltage

Table 1 shows a list of recommended component selections for common AP61204Q output voltages referencing Figure 1. Table 1. Recommended Component Selections

10 Inductor

For AP61204Q, choose ∆IL to be 30% to 50% of the maximum load current of 2A. than 30mΩ. Use a larger inductance for improved efficiency under light-load conditions.

Document number: DS45412 Rev. 2 - 2 17 of 21 www.diodes.com January 2024 © 2024 Copyright Diodes Incorporated. All Rights Reserved. AP61204Q Application Information (continued)

11 Input Capacitor

The input capacitor reduces both the surge current drawn from the input supply as well as the switching noise from the device. The input capacitor must sustain the ripple current produced during the on -time of Q1. It must have a low ESR to minimize power dissipation due to the RMS input current. The RMS current rating of the input capacitor is a critical parameter and must be higher than the RMS input current. As a rul e of thumb, select an input capacitor with a RMS current rating greater than half of the maximum load current. Due to large di/dt through the input capacitor, electrolytic or ceramic capacitors with low ESR should be used. If using a tantalum capacitor, it must be surge protected or else capacitor failure could occur. Using a ceramic capacitor of 10µF or greater is sufficient for most applications.

12 Output Capacitor

The output capacitor keeps the output-voltage ripple small, ensures feedback loop stability, and reduces both the overshoots and undershoots of the output voltage during load transients. During the first few micro seconds of an increasing load transient, the converter recognizes the change from steady-state and sets the off-time to minimum to supply more current to the load. However, the inductor limits the change to increasing current depending on its inductance. Therefore, the output capacitor supplies the difference in current to the load during this time. Likewise, during the first few microseconds of a decreasing load transient, the converter recognizes the change from steady-state and increases the off-time to reduce the current supplied to the load . However, the inductor limits the change in decreasing current as well. Therefore, the output capacitor absorbs the excess current from the inductor during this time. The effective output capacitance, COUT, requirements can be calculated from the equations below. The ESR of the output capacitor dominates the output-voltage ripple. The amount of ripple can be calculated by: 𝐕𝐎𝐔𝐓𝐑𝐢𝐩𝐩𝐥𝐞 = ∆𝐈𝐋 ∙ (𝐄𝐒𝐑 + 𝟏 𝟖 ∙ 𝐟𝐒𝐖 ∙ 𝐂𝐎𝐔𝐓) Eq. 8 Output capacitors with large capacitance and low ESR are the best option. For most applications, a total capacitance of 22 µF using ceramic capacitors is sufficient. To meet the load transient requirements, the calculated COUT should satisfy the following inequality: 𝐂𝐎𝐔𝐓 > 𝐦𝐚𝐱 ( 𝐋 ∙ 𝐈𝐓𝐫𝐚𝐧𝐬 ∆𝐕𝐎𝐯𝐞𝐫𝐬𝐡𝐨𝐨𝐭 ∙ 𝐕𝐎𝐔𝐓 , 𝐋 ∙ 𝐈𝐓𝐫𝐚𝐧𝐬 ∆𝐕𝐔𝐧𝐝𝐞𝐫𝐬𝐡𝐨𝐨𝐭 ∙ (𝐕𝐈𝐍 − 𝐕𝐎𝐔𝐓)) Eq. 9 Where:  ITrans is the load transient  ∆VOvershoot is the maximum output overshoot voltage  ∆VUndershoot is the maximum output undershoot voltage

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1. The AP61204Q works at 2A load current so heat dissipation is a major concern in the layout of the PCB. 2oz copper for both the top and bottom
2. Place the input capacitors as closely across VIN and GND as possible.
3. Place the inductor as close to SW as possible.
4. Place the output capacitors as close to GND as possible.
5. Place the feedback components as close to FB as possible.
6. If using four or more layers, use at least the 2nd and 3rd layers as GND to maximize thermal performance.
7. Add as many vias as possible around both the GND pin and under the GND plane for heat dissipation to all the GND layers.
8. Add as many vias as possible around both the VIN pin and under the VIN plane for heat dissipation to all the VIN layers.
9. See Figure 41 for more details.

Figure 41. Recommended AP61204Q PCB Layout

Document number: DS45412 Rev. 2 - 2 19 of 21 www.diodes.com January 2024 © 2024 Copyright Diodes Incorporated. All Rights Reserved. AP61204Q

Ordering Information

Z6: SOT563 AP61204Q XX – X Package 7: Tape & Reel Packing Part Number Package Package Code Packing Qty. Carrier AP61204QZ6-7 SOT563 Z6 3,000 7” Tape and Reel Marking Information SOT563 1 2 3 ( Top View ) XXX Y W X

4 XXX : Identification Code

Y : Year 0~9 X : Internal Code W : Week : A~Z : 1~26 week; a~z : 27~52 week; z represents 52 and 53 week Part Number Package Identification Code AP61204QZ6-7 SOT563 GSQ XXX: Identification Code Y: Year 0 to 9 (ex: 4 = 2024) W: Week: A to Z: week 1 to 26; a to z: week 27 to 52; z represents week 52 and 53 X: Internal Code

Document number: DS45412 Rev. 2 - 2 20 of 21 www.diodes.com January 2024 © 2024 Copyright Diodes Incorporated. All Rights Reserved. AP61204Q Package Outline Dimensions Please see http://www.diodes.com/package-outlines.html for the latest version. SOT563 SOT563 Dim Min Max Typ A 0.55 0.60 -- b 0.15 0.30 0.20 c 0.10 0.18 0.11 D 1.50 1.70 1.60 E 1.55 1.70 1.60 E1 1.10 1.25 1.20 e -- -- 0.50 e1 0.90 1.10 1.00 L 0.10 0.30 0.20 a 8° 9° 7° All Dimensions in mm Suggested Pad Layout Please see http://www.diodes.com/package-outlines.html for the latest version. SOT563 Dimensions Value (in mm) C 0.500 C1 1.270 G 0.600 X 0.300 X1 1.300 Y 0.670 Y1 1.940 Mechanical Data  Moisture Sensitivity: Level 1 per J-STD-020  Terminals: Finish – Matte Tin Plated Leads, Solderable per MIL-STD-202, Method 208  Weight: 0.003 grams (Approximate) b E1E e D A c L R.01 a aa a Y C G X

Document number: DS45412 Rev. 2 - 2 21 of 21 www.diodes.com January 2024 © 2024 Copyright Diodes Incorporated. All Rights Reserved. AP61204Q IMPORTANT NOTICE 1. DIODES INCORPORATED (Diodes) AND ITS SUBSIDIARIES MAKE NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARDS TO ANY INFORMATION CONTAINED IN THIS DOCUMENT, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICUL AR PURPOSE OR NON -INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION). 2. The Information contained herein is for informational purpose only and is provided only to illustrate the operation of Diodes’ products described herein and application examples. Diodes does not assume any liability arising out of the application or use of this document or any product described herein. This document is intended for skilled and technically trained engineering customers and users who design with Diodes’ products. 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