AP3987CT
Document overview
- Manufacturer or author: Diodes Incorporated
- PDF pages: 15
Technical content
Features
- Primary-Side Control for Eliminating Optocoupler
- 10mW No-Load Input Power
- Built-in 650V High-Performance MOSFET
- Flyback Topology in DCM Operation
- Built-in 0.35V Cable Compensation for CV
- Multiple PWM/PFM Control Mode to Improve Audio Noise and Efficiency
- VCS Jitter to Reduce System EMI
- Valley-on for the Higher Efficiency and Better EMI
- Multiple Protections: ▪ Overvoltage Protection (OVP) ▪ Output Short-Circuit Protection (SCP) ▪ Transformer Saturation Protection (TSP) via Primary Peak Current Limitation ▪ Internal and External Overtemperature Protection (OTP)
- Matching AP4341 with Schottky or APR3415CT Series Synchronous Rectifier Solution
- SO-7 Package
- Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2)
- Halogen and Antimony Free. “Green” Device (Note 3)
- For automotive applications requiring specific change control (i.e. parts qualified to AEC-Q100/101/104/200, PPAP capable, and manufactured in IATF 16949 certified facilities), please contact us or your local Diodes representative. https://www.diodes.com/quality/product-definitions/ Notes: 1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS), 2011/65/EU (RoHS 2) & 2015/863/EU (RoHS 3) compliant. 2. See https://www.diodes.com/quality/lead-free/ for more information about Diodes Incorporated’s definitions of Halogen - and Antimony-free, "Green" and Lead-free. 3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm ch lorine (<1500ppm total Br + Cl) and <1000ppm antimony compounds. THE AP3987CT IS NOT RECOMMENDED FOR NEW DESIGNS. PLEASE USE THE AP3190T.
Document number: DS41644 Rev. 3 - 3 2 of 15 www.diodes.com July 2024 © 2024 Copyright Diodes Incorporated. All Rights Reserved. AP3987CT Typical Applications Circuit APR3415CT R10 VCC AREF DRAIN DRAIN GND GND VDET DRISR R11 C6 R8 FR1 D D GND OTP VCC CS 5V/1.5A D1 to D4 R1C3 CY AP3987CT Np Na + + 4 5 C5Ns FB1 C4 + 5V/1.5A Solution with AP3987CT+APR3415CT Pin Descriptions Pin Number Pin Name Function
1 FB The Voltage Feedback from Auxiliary Winding
2 OTP The External Overtemperature Protection
3 VCC Supply Voltage Pin
4 CS Current Sense for Primary Side of Transformer
5, 6 D This pin is connected with an internal power MOSFET’s drain
7 GND This pin is the signal reference ground
Document number: DS41644 Rev. 3 - 3 3 of 15 www.diodes.com July 2024 © 2024 Copyright Diodes Incorporated. All Rights Reserved. AP3987CT Functional Block Diagram Regulator Bias Latch PFM tONS UVLO UVLO CV_CTRL PFM Valley ON R Q S R Q S CC_CTRL FB VCC Cable Compensation Constant Voltage Control Constant Current Control tONS Detector 0.1V VCS_REF COMP EA Peak Current Control & LEB tONS Dynamic Response Pro Dyn CC_CTRL DAC ShutdownLine Compensation CS No Load Detection tDELAY tDELAY NL NL VCS Fast-Recovery LVCC VCS DAC VLOAD VLOAD VREF VCABLE COMP VEM(MAX) VDD Dyn COMPtDELAY Enable 0.1V tONP RCS Short Protection Driver VLINE OTP Hold RCS Short Protection RCS Short Protection Transformer Saturation Protection FB_OVP/VCC OVP Pro Transformer Saturation Protection Transformer Saturation Protection GND7 5,6 D OUT EM CS OTP OTP Auto-recoverySCP/OCkP FB Open Protection RST
Document number: DS41644 Rev. 3 - 3 4 of 15 www.diodes.com July 2024 © 2024 Copyright Diodes Incorporated. All Rights Reserved. AP3987CT Absolute Maximum Ratings (Note 4) Symbol Parameter Rating Unit VCC Supply Voltage -0.3 to 28.5 V VCS Voltage on CS Pin -0.3 to 7.4 V VFB FB Input Voltage -0.7 to 7.4 V BVDSS Drain Voltage (TJ = +25°C) 650 V ID Drain Continuous Current (TJ = +25°C) 2 A TJ Operating Junction Temperature -40 to +150 °C TSTG Storage Temperature -65 to +150 °C TLEAD Lead Temperature (Soldering, 10s) +260 °C — ESD (Charge Device Model) 1000 V — ESD (Human Body Model) 2000 V PD Total Power Dissipation 1 W Note: 4. Stresses greater than those listed under Absolute Maximum Ratings can cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to Absolute Maximum Ratings for extended periods can affect device reliability. Recommended Operating Conditions Symbol Parameter Min Max Unit VCC Supply Voltage — 25 V TOP Operating Temperature Range -40 +85 °C Thermal Impedance (Note 5) Symbol Parameter Value Unit θJA Junction to Ambient 92 °C/W Note: 5. Test condition: Device mounted on FR-4 substrate PC board, 2oz copper, with 1inch2 cooling area.
Document number: DS41644 Rev. 3 - 3 5 of 15 www.diodes.com July 2024 © 2024 Copyright Diodes Incorporated. All Rights Reserved. AP3987CT Electrical Characteristics (@VCC = 15V, TJ = +25°C, unless otherwise specified.) (Note 7) Symbol Parameter Condition Min Typ Max Unit STARTUP AND UVLO SECTION VTH_ST Turn-On Voltage — 11 13 15 V VUVLO Turn-Off Voltage — 5.5 5.9 6.3 V STANDBY CURRENT SECTION IST Turn-On Current VCC = VTH_ST-1V before Startup 0.01 0.2 0.6 μA ICC_OPR Operating Current Static Current 400 550 700 ICC_NL Standby Current At No Load 5 17.5 30 FREQUENCY JITTER SECTION ΔVCS/VCS VCS Modulation NL to Full Load 4.5 5 5.5 % tMOD VCS Modulation Period 366 488 610 μs CURRENT SENSE SECTION VCS_H Peak Current Sense Voltage Reference in Heavy Load 45% to 100% of Full Load (Note 8) 540 600 660 mV VCS_L Peak Current Sense Voltage Reference in Light Load 0% to 8% Full Load (Note 8) 225 250 275 mV RLINE Built-In Line Compensation Resistance @CP (Note 9) 108 120 132 Ω tLEB Leading Edge Blanking — 300 550 800 ns CONSTANT VOLTAGE SECTION VFB Feedback Threshold Voltage Tested @75% of Maximum IOUT 2.505 2.556 2.607 V VCABLE(MAX) Cable Compensation Voltage — — 0.35 — V CONSTANT CURRENT SECTION tONS/tSW Secondary Winding Conduction Duty Tested @VFB = 2V — 4/8 — — VALLEY-ON SECTION tVAL-ON Valid Off Time of Valley-On From the End of tONS 20 27 34 μs DYNAMIC SECTION VTRIGGER Trigger Voltage for Dynamic Function — 40 62.5 85 mV tDELAY Delay Time for Dynamic Function From the End of tONS 95 122 150 μs VUV_H Undervoltage of FB Pin for VCS_H — 2.34 2.39 2.44 V POWER MOSFET SECTION BVDSS Drain-Source Breakdown Voltage (Note 6) @CP Test 650 — — V RDS(ON) On-State Resistance @CP Test — 4 — Ω DRIVER SECTION ISOURCE Peak Driver Source Current @CP Test 18 22 26 mA PROTECTION FUNCTION SECTION VFB(OVP) Overvoltage Protection at FB Pin — 3.5 3.75 4 V VCC(OVP) Overvoltage Protection at VCC Pin — 27 28.5 30 V tONP(MAX) Maximum Turn-On Time — 14 18 22 μs VCS(MIN) Minimum Peak Current Sense Voltage at tONP(MAX) — 135 150 165 mV VEM(MAX) Maximum EM Voltage for Transformer Saturation Protection (Note 10) (Note 7) 1.8 2 2.2 V VFB(SCP) Short-Circuit Protection VFB @ Hiccup 1.83 1.87 1.92 V tSCP Time under VFB(SCP) — 32 51.5 71 ms VOTP External OTP Shutdown Threshold — 0.49 0.52 0.55 V VOTP_REC External OTP Recovery Threshold — 0.58 0.62 0.66 V IOTP External OTP Shutdown Current — 94 102 110 µA TOTP Shutdown Temperature — +135 +145 +155 °C THYS Temperature Hysteresis — +37 +40 +43 °C Notes: 6. The drain-source voltage is 80% of BVDSS in the aging condition. 7. These parameters are not 100% tested, guaranteed by design and characterization. 8. Peak current sense voltage reference without line compensation. 9. Line compensation voltage on CS reference. 10. EM is an internal pin which is connected to the source of power MOSFET inside. AUX LINE1FB LINE REF_CS VRR R35.0VΔ +=
© 2024 Copyright Diodes Incorporated. All Rights Reserved. Therefore, AP3987CT can realize CC mode operation by constant primary peak current and fixed secondary side conduction duty cycle.
- Multiple Segment Peak Current
since switching frequency decreases to audio frequency range, about less than 20kHz. is different, which will be described in next section. At Constant Current (CC) mode, the peak current is still VCS_H when VO > VFB(SCP). If not, the peak current is 2/3* VCS_H. is not less than 50kHz, and no more than 70kHz. Figure 4. Segment Peak Current and Operating Frequency at CV Mode
Document number: DS41644 Rev. 3 - 3 9 of 15 www.diodes.com July 2024 © 2024 Copyright Diodes Incorporated. All Rights Reserved. AP3987CT Operation Description (continued) 6. Operating Frequency For primary-side regulation, the primary current ip(t) is sensed by a current sense resistor R CS (R4 as shown in Typical Applications). The current rises up linearly at a rate of: M IN L )t(V dt )t(dip = (6) As illustrated in Figure 2, when the current ip(t) rises up to IPK, the switch Q1 turns off. The constant peak current is given by: CS CS PK R VI = (7) The energy stored in the magnetizing inductance LM each cycle is therefore: PKMG ILE = (8) So the power transferring from the input to the output is given by: SW PKM fIL2 1P = (9) OOOSW PKP IVPfIL2 (10) Where, fSW is the switching frequency, η is the transferring efficiency. In AP3987CT, the high load mode and light load mode adopt the Frequency Modulation (FM), and the middle load mode uses the Amplitude Modulation (AM). During FM, the peak current IPK is constant, the output power depends on the switching frequency fSW. During AM, the frequency is fixed, VCS_M is varied. Below is the analysis of VCS_M。 The square root equation can be got from the following equation: OOSW CS CS PSW PKP IVfR VL2 1fIL2 1 = (11) So, SWp OO CS CS fL IVR2V = (12) During AM, the frequency is fixed, assume VO and η are constants, then OCS IkV = SWp O CS fL VR2k = ) (13) 7. NL Mode Operation (Typical Application with APR3415CT) At no load and ultra light load, the AP3987CT works at No Load mode (NL mode) and the output voltage is detected by APR3415CT. In order to achieve ultra low standby power at NL mode, the static current is reduced to ICC_NL.
- The conditions of exiting NL mode---VCBC > VCBC(EN) or tOFF < tOFF(EX)
- The conditions of entering NL mode--VCBC < VCBC(EN) and tOFF ≥ tOFF(EN) At NL mode, the internal reference voltage VDD is pulled to ground. For normal NL working state, when the APR3415CT detects the output voltage is lower than its trigger voltage , the APR3415CT VDET pin emits a periodical pulse current. This pulse current will generate a pulse voltage on feedback winding through the transformer coupling. When the FB pin detects this pulse (> VTRIGGER is valid), the AP3987CT re-establishes the VDD and turns on primary switch to provide one energy pulse to supply output terminal and primary VCC voltage.
© 2024 Copyright Diodes Incorporated. All Rights Reserved. power switch turn-on spike current and then achieve the better radiative EMI performance.
- Adjustable Line Compensation
rising slope, and results in different system constant current value. compensation voltage to clear up the primary current gap, so that the excellent line regulation of output current will be achieved. Figure 5. Adjustable Line Compensation Circuit line compensation capability. protection. The fault conditions to trigger these protections are different and protection modes to enter are different after the protections are triggered.
11.1 Protection Mode
The AP3987CT has three protection modes: auto-recovery, fast-recovery and hold. The operation principles are different. is very small, and the time to drop to VOPR(MIN) is very long. It can decrease the average power dissipation at a fault condition.
© 2024 Copyright Diodes Incorporated. All Rights Reserved. does not signal any pulse until the fault condition is removed, and VCC Voltage is hold not lower than LVCC voltage.
11.2 Short-Circuit Protection (SCP)
the output short condition or the output voltage below a certain level, the SCP mode should happen. the SCP and enters hiccup mode. Figure 6. Normal Startup Figure 7. Short-Circuit Protection (SCP) and Hiccup Mode
11.3 Transformer Saturation Protection via Primary Peak Current Limitation
two consecutive pulses exceed the value, the device shuts down and enters into auto-recovery mode.
Document number: DS41644 Rev. 3 - 3 12 of 15 www.diodes.com July 2024 © 2024 Copyright Diodes Incorporated. All Rights Reserved. AP3987CT Operation Description (continued)
11.4 Internal Overtemperature Protection (Internal OTP)
If the IC junction temperature exceeds the threshold TOTP, the AP3987CT shuts down immediately and enters the hold mode. If the junction temperature decreases by hysteresis temperature THYS, the AP3987CT can recover to normal operation. If not, the power system keeps the hold mode.
11.5 External Overtemperature Protection (External OTP)
The AP3987CT provides external Overtemperature Protection (OTP) by connecting a Negative Temperature Coefficient (NTC) resistor from OTP pin to GND. Internally, a current source IOTP is injected to the OTP pin, which generates a voltage proportional to the NTC resistance. At high ambient temperature, the NTC resistance gets lower and results in the OTP pin voltage decreasing. If the OTP pin voltage drops below an internally -set threshold VOTP, then the OTP is triggered, and the AP3987CT shuts down immediately and enters the fast auto recovery mode. The power system will keep fast auto recovery mode until the ambient temperature decreases and OTP pin voltage increases over the voltage VOTP_REC, which the AP3987CT can recover to normal operation. If the OTP pin is not connected to the NTC resistor, the external OTP function will not work and the IC can still work normally with internal OTP.
Ordering Information
13 : 13" Tape & ReelS7 : SO-7 Product Name Part Number Package Temperature Range Marking ID Packing Qty. Carrier AP3987CTS7-13 SO-7 -40°C to +85°C AP3987CT 4000 13” Tape and Reel Marking Information AP3987CT (Top View) YY WW X X Logo WW : Week : 01 to 52; 52 YY : Year (ex: 24 = 2024) X X : Assembly Code represents week 52 and 53 Marking ID 1 2 3 4 567
Document number: DS41644 Rev. 3 - 3 13 of 15 www.diodes.com July 2024 © 2024 Copyright Diodes Incorporated. All Rights Reserved. AP3987CT Package Outline Dimensions (All dimensions in mm(inch).) Please see http://www.diodes.com/package-outlines.html for the latest version. (1) Package Type: SO-7 3.800(0.150) 4.000(0.157) 1.270(0.050) TYP 4.700(0.185) 5.100(0.201) 0.330(0.013) 0.510(0.020) 0.150(0.006) 0.250(0.010) 0.080(0.003) 0.250(0.010) 1.350(0.053) 1.750(0.069) 0.450(0.017) 0.800(0.031)8° 5.800(0.228) 6.200(0.244) 2.54(0.100) TYP 1.250(0.049) 1.500(0.059) Note: Eject hole, oriented hole and mold mark is optional. Option 2 45° 0.350(0.014) TYP Option 1
Document number: DS41644 Rev. 3 - 3 14 of 15 www.diodes.com July 2024 © 2024 Copyright Diodes Incorporated. All Rights Reserved. AP3987CT Suggested Pad Layout Please see http://www.diodes.com/package-outlines.html for the latest version. (1) Package Type: SO-7 ZG E X Y Dimensions Z (mm)/(inch) G (mm)/(inch) X (mm)/(inch) Y (mm)/(inch) E (mm)/(inch) (mm)/(inch)
Document number: DS41644 Rev. 3 - 3 15 of 15 www.diodes.com July 2024 © 2024 Copyright Diodes Incorporated. All Rights Reserved. AP3987CT IMPORTANT NOTICE 1. DIODES INCORPORATED (Diodes) AND ITS SUBSIDIARIES MAKE NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARDS TO ANY INFORMATION CONTAINED IN THIS DOCUMENT, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICUL AR PURPOSE OR NON -INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION). 2. The Information contained herein is for informational purpose only and is provided only to illustrate the operation of Diodes ’ products described herein and application examples. Diodes does not assume any liability arising out of the application or use of this document or any product described herein. This document is intended for skilled and technically trained engineering customers and users who design with Diodes’ products. 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