AND-TFT-64PA-DHB PURDY | Alldatasheet

Document overview

  • Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 6

Technical content

Features

  • 6.4 inch (16 cm) diagonal screen
  • Compatible with NTSC & PAL system
  • Accepts VGA Input (Analog RGB)
  • High brightness CCFL backlight (300 Nits)
  • Slim and compact
  • Operating temperature range -10 to 60° C
  • Storage temperature range -30 to 80° C
  • 12V single power supply (with optional board)
  • RoHS compliant Mechanical Characteristics Absolute Maximum Rating Item Specification Unit Screen Size 6.4 inch (16 cm) diagonal inch Surface Treatment Anti-Glare + WV film – Display Format 320 (W) x 234 (H) dot Active Area 129.6 (W) x97.34 (H) mm Dot Pitch 0.135 (W) x 0.416 (H) mm Pixel Configuration Stripe – Outline Dimensions 156.3 typ. (W) x 120 (H) x 14.3 typ (D) mm Weight TBD ± 10 g Item Symbol Conditions Absolute Maximum Rating Unit Min. Max. Supply Voltage for Source Driver Analog V CC – -0.3 +7.0 V Digital V DD -0.3 +7.0 Supply Voltage for Gate Driver Positive V GH – -0.3 +45 V Negative V GL – -23 +0.3 V V GH V GL +15 +40 V Analog input voltage (V R , V G , V B DD -0.3 +7.3 V Digital input signals – HSY, POLC, CSY , VSY, CLKC PSI, COMPS, VIY -0.5 +5.5 V Digital output signals – -0.5 +5.5 V Storage Temperature – – -30 +80 °C Operation Temperature (defines that contrast, response time & other display optical characteristics are Ta=+25.) – – -20 +70 °C Product specifications contained herein may be changed without prior notice. It is therefore advisable to contact Purdy Electronics before proceeding with the design of equipment incorporating this product.

Purdy Electronics Corporation • 720 Palomar Avenue • Sunnyvale, CA 94085 7-28-99 Electrical Specification Recommended Operating Conditions Item Symbol Conditions Specifications UnitsMin. Typ. Max. Current Consumption for Driver I GH V GH = +17V – TBD TBD mA I GL V GL = -15V – TBD TBD mA I CC V CC = +5V – TBD TBD mA I DD V DD = +5V – TBD TBD mA Lamp voltage V L I L = 6mA – TBD – Vrms Lamp current I L –– 6 – m A Lamp frequency P L The waveform of lamp driving voltage should be as close to a perfect SIN wave as possible TBD TBD TBD KHz Kick-off voltage (25_) V S – – – TBD Vrms Kick-off voltage (0_) V S – – – TBD Vrms Power Con- sumption for LCD Panel – – – TBD – mW for Backlight Lamp – calculated by I L L – TBD – W TOTAL – – – TBD – W Item Symbol Conditions Specifications UnitMin. Typ. Max. Power Supply V CC – +4.5 +5.0 +5.5 V V DD – +4.5 +5.0 +5.5 V V GH V GL AC AC Component of V GL – +6.0 – V P-P V GL DC DC Component of V GL Video Signal R , V G , V B V i AC AC Component STH1, STh2, CPH1, CPH2, CPH3, Q2H, INH, CPV, XOE, DIO1, DIO2 – +4.0 +4.2 V P-P V i DC DC Component – +2.5 – V V COM V COM AC AC Component of V COM – +6.0 – V P-P V COM DC DC Component of V COM +1.6 +1.7 +1.8 V H Level V IH Both NTSC & PAL system Video Signal input waveform is based on 8 steps grayscale. +0.7 V DD –– V L Level V IL –– +0.3 V DD V

Purdy Electronics Corporation • 720 Palomar Avenue • Sunnyvale, CA 94085 7-28-99 Optical Specifications Item Symbol Conditions Specifications UnitMin. Typ. Max. Viewing Angle Horizontal θ CR>10 ± 50 ± 60 – deg Vertical θ (to 12 o’clock) 35 40 – deg θ (to 6 o’clock) 50 55 – deg Contrast Ratio CR at optimized viewing angle* 110 150 – – Response Time Rise Tr θ = 0° –1 5 3 0 m s Fall Tf – 25 50 ms Transmission Ratio T – 7.5 8.0 8.5 % Uniformity * U – 70 75 – % Brightness LUM – – 500 – cd/m White Chromaticity ** x θ = 0° 0.280 0.310 0.340 – y 0.300 0.330 0.360 – Tc TBD TBD TBD – Lamp Life Time +25°C – +25°C 10,000 – – hr Input/Output Connector LCD Connector: 6200-20P (Molex) FFC Up Connector

20 Pins

Pitch: 1.0 mm Backlight Connector: JST BHR-03VS-1 Pin No: 3 Pitch: 4.0 mm Pink: High Voltage White: Low Voltage * Note: Contrast Ratio is measured in optimum common electrode voltage. CR> Luminance when LCD is White Luminance when LCD is Black 1. Topcon BM-7 (fast) luminance meter 2.0 field of view is used in the testing (after 20~30 minutes operation.) 2. Lamp Current: 6mA 3. Inverter model: TDK-347. Luminance meter: BM-5A or MB-7 fast (TOPCON) Measurement distance: 500mm +/- 50 mm Ambient illumination: < 1 Lux Measurement direction: Perpendicular to the surface of module. The test pattern is white (Gray Level 63.) * The uniformity of LCD is defined as: The Minimum Brightness of the 9 testing Points The Maximum Brightness of the 9 testing Points

Purdy Electronics Corporation • 720 Palomar Avenue • Sunnyvale, CA 94085 7-28-99 Interface Pin Assignment Connector 1: Connector 1 (28 Pins) (Elco) 6200-500-28-800 1. Pin 13 (CLKC) can select the function of pin 1 (HSY ), 3 (CSY), and 14 (VSY) as follows: 2. CKC = High: 3. CKC = Low: 4. If there is any question about CKC = 0, please contact Purdy Electronics. 5. V GH TYP ._+17V ; V GL TYP ._-15V ; V DD TYP ._+5V ; V CC TYP ._+5V 6. The frequency of PSI is 15.75 KHz. 7. Pin 16 (COMPS) can select composite sync. mode OR sync. separate mode Pin No. Symbol Function I/O 1 HSY Horizontal Sync. Input / Output Input/Output

2 POLC Video Polarity Alternating Signal Output

3 CSY/MCLK Composite Sync. Signal / Mclk Signal Input 4 V GH Gate on voltage Input 5 V GL Gate off voltage (alternate every 1-H) Input 6 V B Video Input B Input 7 V R Video Input R Input 8 V G Video Input G Input

9 GND Ground Input

Logic power for gate driver Input

12 GND Ground Input

13* CLKC Control pin for select I/O signal Input/Output 14 VSY Vertical Sync. Input / Output Input/Output

15 PSI Synchronize pulse for external clock Input

16 COMPS Select composite sync. mode & sync. separate mode Input

17 VIY

Vertical sync. input pin for sync. separate mode Input

18 U/D Up/Down control for gate driver Input

19 R/L Left/Right control for gate driver Input

20 NP NTSC/PAL Input Input

CKC Pin 1 (HSY ) Pin 3 (CSY) Pin 14 (VSY ) Hi HSY output CSY input VSY output Low External Horizontal Sync. input External Clock input External Vertical Sync input a. If CKC = 1, the phase lock loop (pll) is adopted in the LCd module. b. Inputs CSY , the controller of LCD module will separate the Vertical Sync and Horizontal Synch from CSY . c. Out put Horizontal Sync (HSY , Pin 1) and Vertical Sync (VSY , Pin 14.) d. The internal detect will detect Vertical Sync to reset the vertical counter. a. If CKC = 0, the phase lock loop (PLL) is not adopted in the LCD module. b. If CKC = 0, the external clock input frequency of Pin 3 is 6.4 MHz. c. Input external Vertical Sync. (VIY , Pin 17) and Horizontal Sync. (Pin1) to synchronize the LCD module. External Horizontal Sync and External Vertical Sync. input pulse can be high going or low going. d. The pulse width of external Horizontal SYnc. input is 4.7 µ s ±2 µ s. The pulse width of external Vertical Sync. input is 2H~4H. e. The pulse length of external input Vertical Sync. of system is 262H ±4H. Pin 16 (COMPS) Pin 3 (CSY) Pin 17 (VIY ) Hi CSY (Positive Edge) NC Low H sync (Negative Edge) V sync (Negative Edge)

Purdy Electronics Corporation • 720 Palomar Avenue • Sunnyvale, CA 94085 7-28-99 8. Default Hi (+5V) for shift Right; Input Low (0V) for inverst (shift Left.) 9. Default Hi (+5V) for DOWN; Low (0V) for UP . 10. NTSC = Hi (+5V), PAL = LOW (0V). Block Diagram

Purdy Electronics Corporation • 720 Palomar Avenue • Sunnyvale, CA 94085 7-28-99 Dimensional Outline General mechanical tolerance = 0.5mm