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INTRODUCTION TO SEMICONDUCTOR TECHNOLOGY by Microcontroller Division Applications INTRODUCTION An integrated circuit is a small but sophisticated device implementing several electronic func- tions. It is made up of two major parts: a tiny and very fragile silicon chip (die) and a package which is intended to protect the internal silicon chip and to provide users with a practical way of handling the component. This note describes the various “front-end” and “back-end” manu- facturing processes and takes the transistor as an example, because it uses the MOS tech- nology. Actually, this technology is used for the majority of the ICs manufactured at STMicro- electronics.
1 THE FABRICATION OF A SEMICONDUCTOR DEVICE
include two test steps: wafer probing and final test. Figure 1. Manufacturing Flow Chart of an Integrated Circuit
1.1 WAFER FABRICATION (FRONT-END)
ments of the individual electronic circuits. doesn't reflect the real order of fabrication process. metal: evaporation or sputtering.
INTRODUCTION TO SEMICONDUCTOR TECHNOLOGY Initially, the silicon chip forms part of a very thin (usually 650 microns), round silicon slice: the raw wafer. Wafer diameters are typically 125, 150 or 200 mm (5, 6 or 8 inches). However raw pure silicon has a main electrical property: it is an isolating material. So some of the features of silicon have to be altered, by means of well controlled processes. This is obtained by "doping" the silicon. Dopants (or doping atoms) are purposely inserted in the silicon lattice, hence changing the features of the material in predefined areas: they are divided into “N” and “P” categories rep- resenting the negative and positive carriers they hold. Many different dopants are used to achieve these desired features: Phosphorous, Arsenic (N type) and Boron (P type) are the most frequently used ones. Semiconductors manufacturers purchase wafers predoped with N or P impurities to an impurity level of.1 ppm (one doping atom per ten million atoms of silicon). There are two ways to dope the silicon. The first one is to insert the wafer into a furnace. Doping gases are then introduced which impregnate the silicon surface. This is one part of the manufacturing process called diffusion (the other part being the oxide growth). The second way to dope the silicon is called ionic implantation. In this case, doping atoms are introduced inside the silicon using an electron beam. Unlike diffusion, ionic implantation allows to put atoms at a given depth inside the silicon and basically allows a better control of all the main parameters during the process. Ionic implantation process is simpler than diffusion process but more costly (ionic implanters are very expensive machines). Passivation Wafers are sealed with a passivation layer to prevent the device from contamina- tion or moisture attack. This layer is usually made of silicon nitride or a silicon oxide composite. Back-lap It's the last step of wafer fabrication. Wafer thickness is reduced (for microcontroller chips, thickness is reduced from 650 to 380 microns), and sometimes a thin gold layer is deposited on the back of the wafer.
crons to a minimum of 180 microns (for smartcard products). (and doesn't exceed 1 micron) inside one cubic foot of air. paper) before being separated from each other at the beginning of the assembly phase.
- Process parametric test: this test is performed on some test samples and checks the
wafer fabrication process itself.
- Full wafer probing test: this test verifies the functionality of the finished product and is per-
Figure 6. Description of the Wafer Probing Operation may be corrected. The percentage of good die on an individual wafer is called its yield.
INTRODUCTION TO SEMICONDUCTOR TECHNOLOGY
1.2 ASSEMBLY (BACK-END)
The first step of assembly is to separate the silicon chips: this step is called die cutting. Then, the die are placed on a lead frame: the “leads” are the chip legs (which will be soldered or placed in a socket on a printed circuit board. On a surface smaller than a baby's fingernail we now have thousands (or millions) of electronic components, all of them interconnected and capable of implementing a subset of a complex electronic function. At this stage the device is completely functional, but it would be impossible to use it without some sort of supporting system. Any scratch would alter its behaviour (or impact its reliability), any shock would cause failure. Therefore, the die must be put into a ceramic or plastic package to be protected from the ex- ternal world. A number of operations have to be made to realize this: they are described on the following graph.
Figure 9. Wire Bonding Operation
Figure 10. Different Kinds of Plastic Packages grated circuits that passed the tests will be packed and shipped to their final destination.
2 BASIC IC ELEMENT: THE TRANSISTOR
2.1 MOS TECHNOLOGY
are used for the majority of the integrated circuits manufactured at STMicroelectronics. channel type of the MOS transistors made with the technology. named because the channel is composed of positively charged carriers. the channel is composed of negatively charged carriers. complementary transistor type. Figure 11. MOS Technologies
INTRODUCTION TO SEMICONDUCTOR TECHNOLOGY Most of the early semiconductor devices were made with PMOS technologies because it was easier to obtain stable manufacturing process with this technology. As higher speeds and greater densities were needed, new devices were implemented with NMOS. This was due to the higher speed of N-channel charge carriers (electrons) in silicon and also to the progress in the control of silicon doping. But CMOS technology has begun to see widespread commercial use in memory devices: it allowed the use of very low power devices. At the beginning, CMOS were slower than NMOS devices. Today, CMOS technology has been improved to produce higher speed devices.
2.2 FABRICATION OF A TRANSISTOR
The fabrication begins with a slice of single crystal silicon, uniformly doped P-type. The wafer is oxidized in a furnace to grow a thin layer of silicon dioxide (SiO 2) on the surface. Sil- icon nitride is then deposited on the oxidized wafer in a gas phase chemical reactor. The wafer is now ready to receive the first pattern of what is to become a many layered complex circuit. The first pattern defines the boundaries of the active regions of the integrated circuit, where transis- tors, capacitors, diffused resistors and first level interconnects will be made. The patterned wafer is then implanted with boron atoms. Boron will only reach the etched zones of the silicon substrate, creating P-type doped areas that will electrically separate active areas. Wafer is oxidized again and the thick oxide only grows in the etched areas due to silicon nitride's properties as an oxidation barrier. The remaining silicon nitride layer is removed. Now that the areas for active transistors have been defined and isolated, the transistor types can be determined. The wafer is patterned and implanted with dopant atoms.The energy and dose at which the dopant atoms are implanted determines much of the transistor's characteristics. The transistor types defined, the gate oxide of the active transistors are grown in a high temperature furnace. The gate oxide layer is then masked and holes are etched to provide direct access to buried contacts where needed. A polycristaline silicon layer is deposited on the wafer. The gate layer is then patterned to define the actual transistor gates and interconnect paths.
INTRODUCTION TO SEMICONDUCTOR TECHNOLOGY Wafer is diffused with N-type dopants to form the source and drain junction. The transistor gate material acts as a barrier to the dopant providing an undiffused channel self-aligned to the two junc- tions. The wafer is then oxidized to seal the junc- tions from contamination with a layer of SiO A thick glass layer is then deposited over the wafer (to provide better insulation), patterned with con- tact holes and placed in a high temperature fur- nace. Metal is deposited on the wafer and the in- terconnect patterns and external bonding pads are defined and etched. To prevent the device from contamination or moisture attack, wafers are sealed with a passivation layer. Patterning is done for the last time opening up windows only over the bond pads where external connections will be made. This completes basic fabrication sequence for a single poly and single metal layer process.
INTRODUCTION TO SEMICONDUCTOR TECHNOLOGY 2.3 HOW DOES A TRANSISTOR WORK? Transistor is the basic element of an MCU device. There can be hundreds of thousands of them and the size of their gate can go down to 0.35 microns. Let's explain the way a NMOS transistor operates. Basically, There's a lack of electrons be- tween the Source (S) and the Drain (D) because this area has been implanted with a P-type dopant (Boron for instance). Therefore, when no voltage is applied, there's no current between the source and the drain (case of the enhancement transistor). If we apply a positive voltage on the gate and the drain, then this will attract electrons in the channel existing between the source and the drain, therefore making it possible for an elec- trical current to flow between S and D. There are two main types of transistor: – Enhancement Transistor: channel is permanently OFF . It requires a positive applied gate voltage to turn on. Microcontrollers, for instance, mainly use this type of transistor. – Depletion Transistor: channel is permanently ON . It requires a negative applied gate volt- age to turn off. This scheme is a cross section of a real transistor obtained after about 100 steps of fabrication (see previous paragraph for the explanation of the different fabri- cation steps). The last layer is called a passivation layer and pro- tects the transistor.
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