AN827

AN827 STMICROELECTRONICS | Alldatasheet

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Reduction of line current harmonic distortion and improvement of power factor is of great concern to many de- signers of off-line switched mode power supplies. This concern has been motivated by present and impending regulatory requirements regarding line current harmonics. The reasons for improving power factor and reducing line current harmonic distortion are well known and understood. Active power factor correction using the boost topology and operating in the continuous inductor current control mode is an excellent method to comply with these requirements and is well accepted in the industry. This paper will present a practical power factor corrected design for a 500 Watt output and universal mains input application. The detailed derivations of all power, IC biasing and control component values and types will be shown. The evaluation results from an actual working demoboard will be presented as well as several relevant oscillograms. DESIGN SPECIFICATIONS The design specifications given below are realized by the implementation of a functional demoboard. The design target specifications are as follows: – Universal mains input AC voltage Virms = 88Vac to 264Vac, 60/50Hz – DC regulated output voltage Vout = 400Vdc – Full load output ripple voltage ΔVripple = ±8V – Rated output power Pout = 500W – Maximum output overvoltage Vomax = 450V – Switching frequency fsw = 80kHz – Maximum inductor current ripple ΔIL = 23% – Input power factor PF > 0.99 – Input line current total harmonic distortion <5% To meet these specifications, the selection of component values and material types is very important. The next sections will describe the component selection criteria along with some critical derivations. For detailed expla- nations on the controller operation and pin description, refer to Application Note AN628 Designing A High Power Factor Switching Preregulator With The L4981 Continuous Mode [1] and the corresponding Datasheet L4981A/B Power Factor Corrector [2]. A 500W HIGH POWER FACTOR WITH THE L4981A CONTINUOUS MODE IC The widespread use of passive AC/DC off-line converters causes low power factor and high line current harmonic distortion. To reduce these phenomena and to comply with relevant regulatory agency require- ments , designers are employing active power factor correction in their off-line SMPS applications. This paper describes a practical, low cost and easy to implement 500W power factor corrected application that employs the L4981A Continuous Mode PFC IC.

POWER COMPONENTS SELECTION The power component values and types are derived and selected in the next section. Please refer to Figure 2, 500 Watt Demoboard Schematic. Input Diode Bridge The input diode bridge, D1, can be a standard slow-recovery type. The selection criteria include the maximum peak reverse breakdown voltage, maximum forward average current, maximum surge current and thermal con- siderations. Maximum peak reverse voltage: Therefore use a 600V rated diode. Maximum forward average current: The thermal considerations require the Ifave rating to be significantly higher than the value calculated. The part chosen has a Ifave of 25A. Additionally, a small heatsink is required to keep the case temperature within speci- fication. Maximum surge current: There is a significant inrush current at start-up due to the large value bulk capacitor, C6, at the output. There is minimal impedance from the mains to this capacitor, thus at the peak of the input voltage waveform a large in- rush current exists. This inrush current can be significantly reduced by some means of current limiting such as an NTC or triac/resistor combination. The input bridge diode’s maximum surge current rating must not be ex- ceeded. This demoboard has a low cost and simple NTC for current inrush limiting. The efficiency can be im- proved by using the triac/resistor scheme, however the cost and complexity increases. Input Fuse The input fuse, F1, must open during severe current overloads without tripping during the transient inrush cur- rent condition or during normal operation. The fuse must have a current rating above the maximum continuous current (6.3Arms) that occurs at the low line voltage (88V). The fuse chosen for this demoboard has a continu- ous current rating of 10A/250VAC. Input Filter Capacitor The input filter capacitor, C3, is placed across the diode bridge output. This capacitor must smooth the high fre- quency ripple and must sustain the maximum instantaneous input voltage. In a typical application an EMI filter will be placed between the mains and the PFC circuit. This demoboard does not have the EMI filter except for V prv V irmsmax 2 1.2 safety m inarg() 264V 2 1.2 448V=⋅⋅=⋅⋅= Irmsmax P OUT Ifave Irmsmax 2⋅

this input capacitor. However, the evaluation results listed in Table 1 were made with an EMI filter placed be- tween the mains input and the PFC circuit. The design of the EMI filter is not described here. The value of the input filter capacitor can be calculated as follows: Where: Kr is the current ripple coefficient r = 0.02 to 0.08 The maximum value of this capacitor is limited to avoid line current distortion. The value chosen for this demo- board is 0.68 µF. Output Bulk Capacitor The choice of the output bulk capacitor, C6, depends on the electrical parameters that affect the filter perfor- mance and also on the subsequent application. Capacitance Value: The value shall be chosen to limit the output voltage ripple according to the following formula: Assume low ESR and ΔVripple= ±8V The value chosen is 330uf to ensure that the maximum specified voltage ripple is not exceeded. Although the ESR does not normally affect the voltage ripple, it has to be considered for the power losses due to the line and switching frequency ripple currents. It is important to verify that the low and high frequency ripple currents do not exceed the manufacturer’s specified ratings at the operating case temperature. Capacitors may be connected in parallel to decrease the equivalent ESR and to increase the ripple current handling capability. If a specific hold-up time is required, that is the capacitor has to deliver the supply voltage for a specified time and for a specified dropout voltage, then the capacitor value will be determined by the following equation: Where: P out is the maximum output power Vomin is the minimum output voltage at max. load Vopmin is the minimum operating voltage before "power fail" detection thold is the required hold-up time Voltage Rating: The capacitor output voltage rating should not be exceeded under worst case conditions. The minimum voltage rating is calculated as follows: Cin Kr Irms Cin 0.25 6.31 C out Pout Pout C out 2P out thold⋅⋅ V o min

2 V op min

Vcap > Vout + ΔVripple + Vmargin = 400 + 8 + 40 = 448V Where: Vout is the nominal regulated DC output voltage ΔVripple is the ac voltage superimposed on the regulated DC output voltage ΔVmargin is the allowance for tolerances in Vout and additional margin before OVP intervention The capacitor chosen has a voltage rating of 450VDC. The overvoltage trip level of Pin 3 (OVP) must be set below 450VDC. Power Mosfet The power mosfet, Q1, is used as the active switch due to its high frequency capability, ability to be driven di- rectly from the controller and availability. The main criteria for its selection include the drain to source breakdown voltage (BVdss), delivered power and temperature considerations. Voltage Rating: The power mosfet has to sustain the maximum boosted output dc voltage according to the following equation: BV dss > Vout + ΔVripple + Vmargin = 400 + 8 + 40 = 448V The power mosfet chosen has a BVdss of 500V. Power Rating: The main parameters to consider are Rdson and the thermal characteristics of the package and heatsink. The main losses in the power mosfet are the conduction and switching losses. The switching losses can be sepa- rated into two quantities, capacitive and crossover losses. The switching losses are dependent on the mosfet current di/dt. The maximum conduction (on-state) power losses can be calculated according to the following equations: I Qrmsmax = 5.42A Ponmax = IQrms 2max · R(DS)on max = 5.422 · 0.54 = 15.86W Where: IQrmsmax is the max. power mosfet rms current Virmsmin is the min. specified rms input voltage R(DS)on typ. = 0.27Ω at 25°C at 10A, VGS = 10V R(DS)on max = 0.54Ω at 100°C The capacitive switching losses at turn-on are calculated as follows: IQmsmax Pout η 2 Virms min⋅ 16 2 V irms min⋅⋅ 500 28 8⋅ P capaci cetan 3.3 C oss V out 1.5 1 2---C ext V out 2⋅+⋅  fsw 2W=⋅⋅=

Where: Coss = 650pF is the mosfet drain capacitance at 25V Cext = 100pF is the equivalent stray capacitance of the layout and external parts The estimated crossover switching losses (turnon and turn-off) are calculated as follows: Pcrossover = Vout · IQrms · fsw · tcr + Prec = 400 · 5.42 · 80k · 40ns + 1.5 = 8.43W Where: tcr is the crossover time Prec is the boost diode recovery power loss contribution To reduce the turn-off losses in the mosfet, an RCD turn-off snubber has been employed. The capacitor value is calculated as follows: Therefore, use C11 = 820pF, 1000VDC rating The resistors, R23-24, must dissipate the energy stored in the snubber capacitor upon turn-on of the power mosfet. The capacitor must fully discharge during the switching cycle. The time constant of the RC combination is determined as follows: The power dissipated in the resistors, R23-24, is calculated as follows: Therefore, use R23 = R24 = 510 Ω , 3W rating. The power mosfet chosen is the STMicoelectonics Part Number STW20NA50. This part has a BVdss = 500V, RDSon = 0.27Ω , and is in a TO-247 package. In order to keep the junction tem- perature at a safe level, the mosfet is attached to an AAVID Heatsink Part Number 61085 with a thermal resis- tance of 3.0°C/W. This will keep the mosfet junction temperature at a safe level at worst case conditions, low- line input voltage (88V) and full load (500W). The thermal resistance of the heatsink may need to decrease depending upon the ambient temperature, type of enclosure (vented or non-vented) and the method of cooling (natural or forced convection). Boost Diode The main criteria for the selection of the boost diode, D2, include the repetitive peak reverse breakdown voltage rrm), average forward current (Ifave), reverse recovery time (trr) and thermal considerations. Voltage Rating: The voltage rating of the boost diode is determined by the same equation as for the power mosfet. The value chosen is Vrrm = 600V. C11 IQ1pk trise⋅ Δ V out R 1 P diss 2---C11 V out 2 fsw

Current Rating: The power losses in the boost diode consist of the conduction and switching losses. The switching losses are a function of the reverse recovery ime (trr) and output voltage (Vout) . The switching losses are negligible com- pared to the conduction losses if a suitable ultra fast recovery diode is chosen. The conduction power losses can be calculated as follows: Where: V to = 1.15V is the threshold voltage of the diode Rd = 0.043W is the diode differential resistance The diode must sustain the average output current and also keep the power losses to a minimum in order to keep the diode junction temperature within acceptable limits. The switching losses can be significantly reduced if an ultra-fast diode is employed. Since this circuit operates in the continuous current mode, the mosfet has to recover the boost diode minority carrier charge at turn-on. Thus, a diode with a small reverse recover time, t rr, must be used. This circuit employs the STMicroelectronics Turboswitch Diode Part Number STTA806D. This part offers the best solution for the continuous current mode operation due to its very fast reverse recovery time, 25ns typical. This part has a breakdown voltage rating (V rrm) of 600V, average forward current rating (Ifave) of 8A and reverse recovery time (trr) of 25ns. The diode is attached to the same heatsink as the power mosfet, Q1. The STTA806D is non-isolated thus re- quiring a thermal insulator with good heat transfer characteristics. The STTA806DI is an isolated package and can be attached directly to the heatsink. Silicone thermal grease may be applied to improve the thermal contact between the diode and heatsink. Boost Inductor The boost inductor, T1, design starts with defining the minimum inductance value, L, to limit the high frequency current ripple, Δ IL. The next step is to define the number of turns, air gap length, ferrite core geometry, size and type for the specified power level. Finally, the wire size and type are determined. In the continuous mode approach, the acceptable current ripple factor, Kr, can be considered between 10% to 35%. For this design, the maximum specified current ripple factor is 23%. The maximum current ripple occurs when the peak of the input voltage is equal to Vout/2. Occurs at V inpk = Vout/2 = 200V; Vinrms = 141V For all other input voltages Iout P out V out IDrms P in 2V in rms min 16 2 V in rms min⋅⋅ Pcond Vto Iout IDrms Δ ILmax V out Δ IL Vinpk V out V inpk–()

The minimum boost inductor value can be calculated as follows: The Table shown below relates the current ripple to the input voltage. The number of turns, N, can be calculated according to the following formula: Where: L is the calculated inductance value to limit the ripple current, ΔIL. ILpk is the worst case inductor current occurring at low-line input voltage (88V) Aeff is the effective cross-sectional area of the core Bmax is the maximum allowable flux density of the core The air gap is determined by referring to the magnetic core manufacturer’s AL vs. air gap curves. The air gap needed for the specified inductance, turns and core type is found to be 2.8mm in the center post. To approxi- mate the minimum core size needed for the conversion, the following equation may be used: Where K is the specific energy constant that depends on the ratio of the gap length (l gap) and the effective length (leff) of the core set and the maximum Δ B swing. Practically, K can be estimated as follows: Thus, we have the following calculation for the minimum core set volume in cm3: The core chosen for this design is an ETD geometry ferrite core set with the following characteristics: Vin (rms) Vin(peak) IL(rms) Iin (rms) IL(peak) Current Ripple K r 88 124 6.31 8.92 2.13 0.119 120 170 4.63 6.55 2.44 0.186 141 199 3.94 5.57 2.50 0.224 180 255 3.09 4.37 2.31 0.264 200 283 2.78 3.93 2.07 0.263 220 311 2.53 3.58 1.73 0.242 240 339 2.31 3.27 1.29 0.197 264 373 2.10 2.97 0.63 0.106 K r Δ IL 2P in⋅ V inrms Lmin Vout N LI Lpk⋅ 211 10 6m 2 0.36T⋅⋅ Volume K L I Lpk ILpk Δ IL+()⋅[]⋅≥ K1 1 . 5 Ieff Igap

Effective core volume = 24.0 cm3. Effective magnetic path length = 114 mm Effective core area = 211 mm Ferrite material is 3C85 or equivalent Np = 59T Ns = 5T The ETD geometry has the following advantages: 1) Round center post for ease of winding 2) Commercially available from Philips, Siemens, Thomson, Magnetics, etc.. 3) Increased winding area 4) The center leg area is equal to the sum of the areas of the two external legs. The legs are working with the same flux density The wire size is determined by the maximum copper losses allowed and available winding area. For this design the wire size selected was 30AWG, 30 strand Litz. An auxiliary winding is used to supply power to the controller. The number of turns was determined experimen- tally to be 5. The worst case conditions for the auxiliary winding power supply voltage are at low-line input volt- age (88V) and full load (500Watts) and at high-line input voltage (264V) and light-load. The auxiliary winding must supply sufficient voltage to prevent turn-off (UVLO) during normal operation and also must not supply excessive voltage causing burn-out of the controller. CoilCraft Part Number R4849-A meets the above specifications and is available. IC BIASING AND CONTROL COMPONENTS SELECTION The IC biasing and control component values are derived and selected in the next section. Please refer to Figure2, 500 Watt Demoboard Schematic. Pin 1 P-GND (Power stage ground) This pin should be connected to the source of the power mosfet, Q1, with a short length and wide copper trace on the printed circuit board to minimize the copper trace resistance and inductance. Refer to Figure 3, 500 Watt Demoboard printed circuit board layout. Pin 2 IPK (Overcurrent protection input) In order to obtain a very precise overcurrent protection trip level, R12 and R13 are calculated as follows: Use R12 = 562 ohms, R13 = 5.1k The peak current threshold is set at 17A and Rsense is chosen as 0.033 ohms. Iaux V ref R12 R sense Ipeak⋅

Pin 3 OVP (Overvoltage protection input) The overvoltage protection trip level is determined by the voltage divider across the output bulk capacitor, C6. The resistor values R11, R21 and R22 are calculated as follows: Where Δ Vout = 47V is the maximum overvoltage limit. The overvoltage limit selection is dependent upon the voltage rating of the output bulk capacitor (450VDC) and the power mosfet (500BVdss). Care must be taken that the level is not set too low, thus causing false tripping of the OVP. Pin 4 IAC (AC current input) This pin must be connected through resistors R1 and R2 to the rectified line to drive the multiplier with a current IIAC proportional to the instantaneous line voltage as shown below: Thus I IAC ranges from 77µA to 231µA. The relationship between IIAC and multiplier output current, Imult, is de- scribed in section Pin 8 (MULTOUT). Pin 5 CA-OUT (Current amplifier output) The current amplifier output delivers its signal to the PWM comparator. An external network defines the suitable loop gain to process the multiplier output and the inductor current signals. To avoid oscillation problems, the maximum inductor downslope (Vout/L) must be lower than the oscillator ramp-slope (Vsrp*fsw). The current am- plifier high frequency gain can be described as follows: Where: V srp = 5.0V is the oscillator ramp peak-peak voltage G ca is the current amplifier gain fsw = 80kHz is the switching frequency Rsense = 0.033Ω is the parallel combination of R30-32 Thus, use R14=R16=2.7k, and R15=36K. To define the value of the compensation capacitor, C9, it is useful to consider the open loop current gain, defined by the ratio of the voltage across the sense resistor and the current amplifier output voltage. The crossover fre- quency is given by the following equation: To ensure a good phase margin, the zero frequency, fz, should equal approximately fc/2. R21 R22+ V out Δ V out+ V ref IIAC 88V() V inpk IIAC 264V() 22 6 4⋅ G ca R15 V srp fSW L⋅⋅ fc fsw

use C9 = 680pF Pin 6 LFF (Load feed-forward input) This pin allows the modification of the multiplier output current proportionally to the load in order to improve the load transient response time. This function is not used in this circuit and the pin is connected to VREF. Pin 7 VRMS (Voltage input) This function is very useful for universal input mains applications to compensate the gain variation related to the input voltage change. This pin is connected through an external network to the rectified line input. The best control is achieved when the VRMS voltage level is in the range of 1.5 to 5.5V. To avoid the rectified mains line ripple (2f), a two pole low-pass filter is realized with R3-R6 and C1-2. The lowest pole is set near 3Hz and the highest pole near 13 Hz to reduce the gain to -80dB at 100 Hz. Where: R3 = 33k Ω , R4 = 360kΩ , R5 = R6 = 620kΩ , C1 = C2 = 220nF At 88 Vrms, Vpin7 = 1.78 Vrms At 264 Vrms, Vpin7 = 5.33 Vrms Gain at 2f (100Hz) = -80dB For single mains operation, this pin can be connected directly to Vref (pin 11) or to ground and the RC network can be removed. If connected to ground, the Vrms multiplier input is clamped at 1.5V. Pin 8 MULT-OUT (Output of the Multiplier) This pin delivers the current Imult that is used to fix the reference voltage for the current amplifier. Pin 8 is con- nected through R14 to the negative side of the sense resistor, R30-32, to sum the (IL · Rs) and the (Imult · R14) signals, where IL is the inductor current. The sum is the error voltage signal at the current amplifier non-inverting input. The multiplier output current is determined by the equation given below: fz fsw C9 2 V rmspin7  Vrmsline= fpole1 fpole2 Imult 0.37 IAC Vva out– 1.28V–() 0.8 Vlff⋅ 1.28V–()⋅ V rms Vva out– 1.28V–() V rms

Where: Vva-out = Error amplifier output voltage range Vlff = Vref = 5.1V if not used for load feed-forward Vrms = Voltage at pin 7 IIAC = Input current at pin 4 To optimize the multiplier biasing for each application, the relationships between Imult and other input signals are reported in the Designing A High Power Factor Switching Preregulator With The L4981 Continuous Mode Application Note [1], Figures 13a-13h. Pin 9 ISENSE (Current amplifier inverting input) This pin is the current amplifier inverting input. It is externally connected to the network described at CA-OUT (pin 5). Note that R14=R16=2.7k have the same value because of the high impedance feedback network. The sense resistors, R30-R32, have a combined resistance of 0.033 ohms. The low value is chosen to minimize the power losses since the total Inductor current flows through this resistor. The value must be large enough to pro- vide a good signal to noise ratio signal to the current amplifier. Pin 10 SGND (Signal ground) This pin should be connected close to the reference voltage filter capacitor (C7). Refer to Figure 3, 500 Watt Demoboard printed circuit board layout. Pin 11 VREF (Voltage reference) An external capacitor filter of 1µF, C7, should be connected from pin 11 (Vref) to ground. This reference voltage of 5.1V is externally available and can deliver up to 10mA for external circuit needs such as the fast start-up power supply circuit as described in Pin 19. Pin 12 SS (Soft start) This feature avoids current overload through the power mosfet during the ramp-up of the output boosted volt- age. An internal switch discharges the capacitor if an output overvoltage (OVP) or a VCC undervoltage (UVLO) is detected. The voltage at the soft-start pin acts on the output of the error amplifier and the soft start time is calculated as follows: Where: Css = C8 = 1 µF Vva-out = 5.1V is the typical error amplifier voltage swing Iss is the internal soft start current generator tss C ss V va out– Iss

Pin 13 Vva-out (Error amplifier output) To ensure system stability, the compensation network must be designed with sufficient phase margin. Addition- ally, the system must not regulate the twice mains frequency output ripple voltage in order to avoid line current distortion. The compensation capacitor, C10, can be calculated as follows: Where: R9 + R10 are the resistors from the output voltage feedback resistor divider G ea is the small signal gain of the error amplifier ΔVout is the maximum output voltage ripple Ka = for 50Hz and for 60Hz mains frequency , therefore use standard value 220nF The voltage open loop gain contains two poles at the origin, causing stability problems. This can be avoided by shifting the error amplifier pole from the origin to near the crossover frequency. This can be accomplished by placing a resistor, R19, in parallel with the compensation capacitor, C10. The crossover frequency is calculated as follows: Use R19 = 120k to increase error amplifier dc gain. Pin 14 VFEED (Error amplifier input) This pin is the error amplifier inverting input. This pin is connected to the resistor divider connected across the boosted output voltage to provide regulation. The boosted output voltage is specified at 400VDC. The resistor divider network is calculated as follows: Use R9 = R10 = 412k Pin 15 P-UVLO (Programmable supply undervoltage threshold) This pin may be used to modify the turn-on and turn-off power supply thresholds. This circuit does not employ this feature and the pin is left floating. The typical turn-on threshold is 15.5V and the turn-off threshold is 10V. Pin 16 SYNC (In/Out synchronization) This function allows for synchronization in master or slave mode with other circuits in the system. This demo- board does not use this function and the pin is left floating. Pin 17 ROSC (Oscillator resistor) C10 1 Δ V out C 10 fc P out  1  500  1  11.77Hz== = R9 R10+ V out V ref

These pins determine the oscillator frequency of the circuit. A resistor, R17, is connected from pin 17 to ground. is reached and Vref forward biases Q2, pulling the gate of Q3 to ground. D6 regulates the supply voltage to 18 Volts. the switch. A 1N4148 diode, D3, is connected to the gate to provide fast turn-off of the power mosfet. Table 1. 500W Demoboard Evaluation Results

the demoboard under test, while the efficiency has been calculated without the filter contribution. Figure 1. EMI/RFI Test Filter

Part List of the Figure 2 (continued) Part Des. Description Vendor’s Part # R4 Carbon Film Res., 360k, 1/4W, 5% Digi-Key #360KQBK-ND R5 Carbon Film Res., 620k, 1/4W, 5% Digi-Key #620KQBK-ND R6 Carbon Film Res., 620k, 1/4W, 5% Digi-Key #620KQBK-ND R9 Metal Film Res., 412k, 1/4W, 1% Digi-Key #412KXBK-ND R10 Metal Film Res., 412k, 1/4W, 1% Digi-Key #412KXBK-ND R11 Metal Film Res., 21k, 1/4W, 1% Digi-Key #21.0KXBK-ND R12 Metal film Res., 562, 1/4W, 1% Digi-Key #562XBK-ND R13 Metal Film Res., 5.11k, 1/4W, 1% Digi-Key #5.11KXBK-ND R14 Carbon Film Res., 2.7k, 1/4W, 5% Digi-Key #2.7KQBK-ND R15 Carbon Film Res., 36k, 1/4W, 5% Digi-Key #36KQBK-ND R16 Carbon Film Res., 2.7k, 1/4W, 5% Digi-Key #2.7KQBK-ND R17 Metal Film Res., 30.1k, 1/4W, 1% Digi-Key #30.1KXBK-ND R18 Carbon Film Res., 15 ohms, 1/4W, 5% Digi-Key #15QBK-ND R19 Carbon Film Res., 120k, 1/4W, 5% Digi-Key #120KQBK-ND R20 Metal Film Res., 10.7k, 1/4W, 1% Digi-Key # 10.7KXBK-ND R21 Metal Film Res., 909k, 1/4W, 1% Digi-Key #909KXBK-ND R22 Metal Film Res., 909k, 1/4W, 1% Digi-Key #909KXBK-ND R23 Metal Oxide Resistor, 510 ohms, 3 Watts, 5% Digi-Key#P510W-3BK-ND R24 Metal Oxide Resistor, 510 ohms, 3 Watts, 5% Digi-Key#P510W-3BK-ND R25 Carbon Film Resistor, 10k, 1/4W, 5% Digi-Key #10KQBK-ND R26 Carbon Film Resistor, 1.1M, 1/4W, 5% Digi-Key #1.1MQBK-ND R27 Carbon Film Resistor, 1.1M, 1/4W, 5% Digi-Key #1.1MQBK-ND R28 Carbon Film Res., 10k, 1/2W, 5% Digi-Key #10KH-ND R29 Carbon Film Resistor, 33 ohms, 1/2W, 5% Digi-Key #33H-ND R30 3 Watt, non-inductive 0.1 ohms, Type LO-3-.010 Newark #96F3616 R31 3 Watt, non-inductive 0.1 ohms, Type LO-3-.010 Newark #96F3616 R32 3 Watt, non-inductive 0.1 ohms, Type LO-3-.010 Newark #96F3616 NTC 1 20 Ga (0.8mm) Jumper Wire 22 Ga Jumper NTC 2 20 Ga. (0.8mm) Jumper Wire 22 Ga Jumper Heatsink 1 AAVID type 61085, 1.5Deg C/W/3in., 1.5" length AAVID #61085 Heatsink 2 Bridge Diode attachable heatsink datogliere PCB 1 FR-4 Material CALS 95 001_A T1 Coilcraft Part# R4849-A 0.5mH CoilCraft ’Part # R4849-A Standoffs Aluminum Hex Standoff 0.375", 4-40 Thread Newark#89F1949 Q1 STW20NA50, 500V, 20A, 2.7 ohms TO-247 STMicroelectronics STW20NA50 Q2 NPN transistor high speed, 30V, .8A, TO-18 Package STMicroelectronics 2N2222 Q3 N-Channel Mosfet, STK2N50, 500V, 2A, SOT-82 STMicroelectronics STK2N50 J1 3 Pole, 15A, Terminal Block Newark #93F7182 J2 3 Pole, 15A, Terminal Block Newark #93F7182 U1 L4981A, PFC IC STMicroelectronics L4981A IC Socket 20 Pin DIP Socket, Gold Pin and Clip Digi-Key #ED56203-ND Misc. Mounting screws, nuts, insulators

Figure 2. 500W Demoboard Schematic

11 VREF

Figure 3. 500W Demoboard Printed Circuit Board Layout

and types. For example, this program can easily convert this design to single mains operation (120 or 240 Volts). copy for future reference. Two solutions at 110Vac (fig. 4) and 220Vac (fig. 5) are shown below. Figure 4. 400W/230V; Vin = 110V ± 20V

Figure 5. 800W/400V; Vin = 220V ± 20V

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners © 2003 STMicroelectronics - All rights reserved STMicroelectronics GROUP OF COMPANIES Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States AN827 APPLICATION NOTE REFERENCES [1] G. Comandatore and U. Moriconi, Application Note 628 Designing A High Power Factor Switching Preregulator With The L4981 Continuous Mode, STMicroelectronics, Inc., STMicroelectronicsMay, 1994. [2] Datasheet Power Factor Corrector, STMicroelectronics, Inc., May, 1994. [3] Designing PFC Application Program, ST Microelectronics, Inc., April, 1995.