AN644 MAXIM | Alldatasheet
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www.maxim - ic.com/an644 Page 1 of 6 ASICs Application Note 644: Mar 17, 2000 QuickChip Design Example 2 Low Power Silicon BJT LNA for 1.9GHz 1998 IEEE. Reprinted, with permission, from 1998 IEEE Microwave and Guided Wave Letters, Vol. 3, No. 3, pp. 136 - 137 Abstract A two - stage 1.9GHz monolithic low - noise amplifier (LNA) with a measured noise figure of 2.3dB and an associated gain of 15dB was fabricated in a standard silicon bipolar transistor array. It dissipates 5.2mW from a 3V supply including the bias circuitry. Input return loss and isolation are - 9dB and - 20dB, respectively. I. Introduction In portable communication equipment, such as cel lular phones and digital cordless phones, manufacturers are trying to replace as many discrete devices as possible with high - density ICs to be competitive in size, weight, power dissipation, and price. In a number of recent papers low power LNAs for S - band have been described [1,2,3]. These LNAs were fabricated using some sophisticated GaAs full - custom processes. Since the high frequency performance of state - of - the - art silicon bipolar processes are continuously improving lowcost semi - custom arrays with a li mited choice of components provide a reasonable solution for RF applications. In order to demonstrate such a solution, we present in this letter a very low - power monolithic 1.9GHz silicon LNA which draws a total current of 1.75mA including bias circuit. II. Circuit Design A schematic of the two - stage LNA is shown in Fig. 1. The circuit employs a high - gain common - emitter stage (Q1 - RL) and a emitter - follower output stage (Q2 - Q3). This approach eliminates the need for coupling capacitors. The current of the first stage is set by a resistive parallel feedback (R3 and R4), which is connected to the external matching inductor (L1) such that no noise degradation occurs. Thus, only a single supply voltage is required. This feedback also improves both the bias and RF stability of the amplifier.
Figure 3. Measured gain and noise figure (VCC = 3V, ICC = 1.75mA (bold line: this design shows low power consumption and a competitive noise figure as seen from Fig. 4.
Figure 4. Gain to DC power ratio plotted versus noise figure for several state-of-the-art from 2.7 to 5V the noise figure remains between 2.2 and 2.5dB. measured at - 21dBm input power. This is adequate for DECT handheld terminal. input and output matching inductors.
www.maxim - ic.com/an644 Page 6 of 6 [3] U. Lott, "2 GHz monolithic low noise amplifier using lower than 1 V supply voltage", 1997 Wi reless Communications Conference, pp. 138 - 140 and C - band low noise amplifiers for portable wireless applications", IEEE Trans. MTT, vol. 43, no. 12, pp. 3055 - 30 61, Dec. 1995 [5] K. R. Cioffi, "Monolithic L - band amplifiers operating at milliwatt and sub - milliwatt dc power consumptions", IEEE 1992 Microwave and Millimeter - Wave Monolithic Circuits Symposium, pp. 9 - 13 Si - MMIC low noise amplifier", IEEE 1996 - S. Int. Microwave Symp. Digest, pp. 1225 - 1228 Solid-State Circuits,vol. 3 2, no. 5, pp. 745 - 759, May 1997