AN4345 STMICROELECTRONICS | Alldatasheet
Document overview
- Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
- PDF pages: 28
Technical content
Datasheet sections
- 1 Adapter features
- 2 Circuit description
- 3 Bill of material, layout and schematic
- 4 Board testing
- 4.1 Typical waveforms
- 4.2 Precision of the regulation and output voltage ripple
- 4.3 Standby performance
- 4.4 Efficiency
- 4.5 Light load performance
- 5 Functional check
- 5.1 Startup
- 5.2 Overload protection
- 5.3 Feedback loop failure protection
- 6 Thermal measurements
- 7 EMI measurements
- 8 References
- 9 Revision history
- 800 V avalanche rugged power section,
- PWM operation at 60 kHz with frequency jittering for lower EMI
- Limiting current with adjustable set point
- On-board soft-start
- Safe auto-restart after a fault condition The available protection includes: thermal shutdown with hysteresis, delayed overload protection and open loop failure protection. Protection is in auto-restart mode.
Figure 1. Product evaluation board picture
1 Adapter features
Electrical specifications of the product evaluation board are listed in Table 1. Table 1. Electrical specifications
AN4345 Circuit description
2 Circuit description
The converter schematic is given in Figure 4. The input section includes a resistor R1 for inrush current limiting, diodes D1 and D2 and a Pi filter (C1, L1, C2) for rectification and EMC suppression. The FB pin is the inverting input of the internal transconductance error amplifier and its reference voltage is VFB_REF = 3.3 V. The output voltage VOUT1 is regulated by the voltage divider, which is composed of R4 and R5, according to the following formula: Equation 1 where R5 is split into R5A and R5B to allow a better tuning of the output voltage. VOUT2 comes from VOUT1 through a linear voltage regulator, the compensation is performed by the R-C-C network connected between COMP and GND pins. At power-up, the DRAIN pin supplies the internal HV start-up current generator, which charges the C3 capacitor up to VDDON (13 V). At this point, the power MOSFET starts switching, the generator is turned off and the IC is powered by the energy stored in C3. If the jumper J1 is not selected, the VIPer16LD is self-biased: the C3 capacitor voltage, due to the system consumption, falls down and when it reaches VDDCS_ON (10.5 V typ.), the internal HV current generator is turned on, recharging C3 up to VDDON, after that the HV generator is switched off again. The VIPer16LD is internally supplied without any external network, which minimizes the number of external components. Moreover this function allows the designer to generate output voltages below the voltage lockout (5 V for example) with a simple inductor. If the jumper J1 is selected, the HV start-up generator is activated at power on only: when V OUT1 has reached its steady-state value, IC is biased from the output through the diode D6, allowing the system to reach very low standby-consumption values. This is referred to “external biasing” and can be obtained only if V OUT1 is high enough to keep the C3 voltage always above the VDDCS_ON threshold. The shape of the VDD voltage is depicted in Figure 5 and 6 for self-biasing and external biasing respectively. The R6 resistor, if connected, reduces the default current limitation of the device IDLIM by a certain percentage depending on the resistor value, as reported in the curve ILIM vs. RLIM of the datasheet. This optimizes the design of the magnetic and power elements. REFFBOUT VR RV _1 51 ⋅ +=
3 Bill of material, layout and schematic
Table 2. Bill of material
Figure 2. Layout Figure 3. Routing
Figure 4. Schematic
4 Board testing
4.1 Typical waveforms
Figure 7. Source current and voltage at max. Figure 8. Source current and voltage at max. Figure 9. Source current and voltage at max. Figure 10. Source current and voltage at max.
4.2 Precision of the regulation and output voltage ripple
condition and by the IC biasing (external or self-biasing). Table 3. Output voltage line-load regulation - V Table 4. Output voltage line-load regulation - VOUT1 (IOUT2 = 50 mA)
4.3 Standby performance
main focus, the IC can be self-biased (by deselecting J1), saving the cost of the D6 diode. diode D6 (IC externally biased). Figure 17. No load consumption
4.4 Efficiency
increase to 70% starting from january 2016 (CoC5 Tier 2). efficiency requirement for the same power throughput is 69.9%.
- OUT1 loaded with a nominal load: I OUT1 = 130 mA (corresponding to the nominal power throughput of the board when loaded on both outputs)
- The L7805 connected but no loaded (IOUT2 = 0) AM13822V1 100 125 150 175 200 225 250 80 105 130 155 180 205 230 255 Pin [mW] Vin[V] external biasing self biasing
of load for both input voltages is also shown. Figure 18. Active mode efficiency and comparison with CoC5 and DOE standards
4.5 Light load performance
been measured and results are reported in Table 7. Table 5. CoC5 requirement and performance at 10% output load Table 6. Energy consumption criteria for no load
and POUT = 250 mW) is also shown. meet this requirement, as shown in Table 7. Table 7. Light load consumption Table 8. Light load efficiency
5 Functional check
5.1 Startup
input voltages (115 VAC and 230 VAC). Figure 19. Startup at VIN = 115 VAC full load Figure 20. Startup at V IN = 115 VAC full load Figure 21. Startup at VIN = 230 VAC full load Figure 22. Startup at V IN = 230 VAC full load
5.2 Overload protection
of repeated overload events. basis down to zero and the protection is not tripped. elapse before switching is resumed (see Figure 26). Figure 23. Output short-circuit applied: Figure 24. Output short-circuit maintained:
5.3 Feedback loop failure protection
opening the high-side resistor, R5 = R5A + R5B. Figure 25. Output short-circuit maintained: Figure 26. Output short-circuit removal and
6 Thermal measurements
Figure 31. Thermal measurement at V Figure 32. Thermal measurement at VIN = 115 VAC, full load
7 EMI measurements
230 VAC/full load have been performed and the results are shown in Figure 35 and 36. Figure 35. Average measurement at VIN = 115 VAC, full load Figure 36. Average measurement at VIN = 230 VAC, full load
AN4345 Test equipment and measurement of efficiency and light load performance If it is not clear which measurement scheme has the lesser effect on the result, both of them should be tested and then, the lower input power value should be registered. As noted in IEC 62301, instantaneous measurements are appropriate when power readings are stable. The UUT is operated at 100% of nameplate output current for at least 30 minutes (warm-up period) immediately prior to conducting efficiency measurements. After this warm-up period, the AC input power is monitored for a period of 5 minutes to assess the stability of the UUT. If the power level does not drift by more than 5% from the maximum value observed, the UUT can be considered stable and measurements can be recorded at the end of the 5-minute’s period. If AC input power is not stable over a 5- minute’s period, the average power or accumulated energy is measured overtime for both AC input and DC output. Some wattmeter models allow integration of the measured input power in a time range and then measure the energy absorbed by the UUT during the integration time. The average input power is calculated dividing by the integration time itself.
8 References
[1] Code of Conduct on energy efficiency of external power supplies, version 4 [2] VIPER16 datasheet
9 Revision history
Table 9. Document revision history 09-Dec-2014 1 Initial release.